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2020-05-25Add missing expander for vector float_extend and float_truncate.liuhongt2-0/+64
2020-05-23Adjust typo in testcase of my last commitliuhongt1-1/+1
2020-05-22i386: Fix <rounding_insn><mode>2 expander [PR95255]Uros Bizjak1-0/+8
2020-05-22Add missing vector truncmn2 expanders [PR92658]liuhongt3-0/+326
2020-05-21Add outline-atomics to target attribute.Martin Liska2-0/+54
2020-05-20[ARM]: Fix the wrong code-gen generated by MVE vector load/store intrinsics (...Srinath Parvathaneni55-105/+365
2020-05-19Fix FAIL: gcc.target/i386/pr92645-4.cRichard Biener1-3/+3
2020-05-19bpf: do not save/restore callee-saved registers in function prolog/epilogJose E. Marchesi2-0/+34
2020-05-19i386: Add missing vector zero/sign extend expanders [PR92658]Uros Bizjak3-0/+620
2020-05-19RISC-V: Handle implied extension for -march parser.Kito Cheng3-0/+17
2020-05-19RISC-V: Update march parserKito Cheng3-3/+8
2020-05-18Require powerpc_vsx_ok in gcc.target/powerpc/pr71763.cDouglas Rupp1-0/+1
2020-05-18pr94833, fix vec_first_match_index for nullsCarl Love1-0/+118
2020-05-18i386: Avoid reversing a non-trapping comparison to a trapping one [PR95169]Uros Bizjak1-0/+28
2020-05-17x86: Allow V1TI vector register pushesH.J. Lu5-0/+144
2020-05-17x86: Add gcc.target/i386/strncmp-1.cH.J. Lu1-0/+47
2020-05-15rs6000/testsuite: Use the int128 selector where neededSegher Boessenkool6-0/+6
2020-05-15rs6000/testsuite: Use lp64 in cnttzdm-0.cSegher Boessenkool1-0/+1
2020-05-15rs6000/testsuite: Don't use powerpc64 effective targetSegher Boessenkool7-7/+7
2020-05-15rs6000/testsuite: Use -mdejagnu-cpu= instead of -mcpu=Segher Boessenkool22-22/+22
2020-05-15i386: Add V2SFmode hadd/hsub instructions [PR95046]Uros Bizjak1-0/+22
2020-05-14Fold (add -1; zero_ext; add +1) operations to zero_ext when not overflow(PR37...Xionghu Luo1-0/+29
2020-05-14amdgcn: fix vcc clobber in vector load/storeAndrew Stubbs2-0/+75
2020-05-14i386: Add V2DFmode float trunc/extend functions [PR95046]Uros Bizjak1-0/+25
2020-05-14i386: Add V2DFmode conversion functions [PR95046]Uros Bizjak1-0/+44
2020-05-14aarch64: Fix arm_sve_vector_bits on typedefs [PR95105]Richard Sandiford1-0/+101
2020-05-14i386: Add V2SFmode conversion functions [PR95046]Uros Bizjak1-0/+44
2020-05-14IBM Z: Define probe_stack expanderAndreas Krebbel1-0/+17
2020-05-14IBM Z: stack clash prot: add missing updates of last_probe_offsetAndreas Krebbel1-0/+17
2020-05-14Make anti_adjust_stack_and_probe_stack_clash extern and use it for ZAndreas Krebbel1-0/+17
2020-05-13rs6000: Add vec_extracth and vec_extractlKelvin Nilsen24-0/+738
2020-05-13Fold single imm use of a FMA if it is a negation [PR95060]Jakub Jelinek25-144/+162
2020-05-12RISC-V: Add shorten_memrefs pass.Craig Blackmore7-0/+280
2020-05-12i386: Add V2SFmode copysign, xorsign and signbit expanders [PR95046]Uros Bizjak1-0/+39
2020-05-12i386: Add V2SFmode FMA insn patterns [PR95046]Uros Bizjak1-0/+42
2020-05-12i386: Add V2SFmode NEG, ABS and logic insn patterns [PR95046]Uros Bizjak2-7/+42
2020-05-12MSP430: Allow .bss section to be created in region-attribute-misuse testJozef Lawrynowicz1-1/+0
2020-05-12tree-vect-generic: Fix bitfield widths [PR94980 3/3]Richard Sandiford1-0/+10
2020-05-11rs6000: Built-in cleanups for vec_clzm, vec_ctzm, and vec_gnbKelvin Nilsen15-642/+59
2020-05-11rs6000: Add xxgenpcvwm and xxgenpcvdmCarl Love1-0/+231
2020-05-11rs6000: Vector string isolate instructionsKelvin Nilsen72-0/+2622
2020-05-11rs6000: Add xxeval and vec_ternarylogicKelvin Nilsen11-0/+1250
2020-05-11rs6000: Add pdepd and pextdKelvin Nilsen4-0/+195
2020-05-11rs6000: Add vclrlb and vclrrbKelvin Nilsen8-0/+212
2020-05-11rs6000: Add cntlzdm and cnttzdmKelvin Nilsen4-0/+217
2020-05-11i386: Add V2SFmode sqrt insn pattern [PR95046]Uros Bizjak1-0/+11
2020-05-11rs6000: Add vcfuged instructionKelvin Nilsen2-0/+121
2020-05-11rs6000: Add scalar cfuged instructionKelvin Nilsen2-0/+100
2020-05-11rs6000: Add vgnbKelvin Nilsen11-0/+800
2020-05-11rs6000: Add vector pdep/pextKelvin Nilsen4-0/+219
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