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2024-01-03Update copyright years.Jakub Jelinek1-1/+1
2023-07-14cprop: Do not set REG_EQUAL note when simplifying paradoxical subreg [PR110206]Uros Bizjak1-0/+2
2023-05-18Machine_Mode: Extend machine_mode from 8 to 16 bitsPan Li1-1/+1
2023-01-02Update copyright years.Jakub Jelinek1-1/+1
2022-05-09Come up with {,UN}LIKELY macros.Martin Liska1-2/+2
2022-01-17Change references of .c files to .cc filesMartin Liska1-2/+2
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-08-04aarch64: Don't include vec_select high-half in SIMD multiply costJonathan Wright1-0/+4
2021-07-13gcc: Add vec_select -> subreg RTL simplificationJonathan Wright1-0/+3
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-12-17rtlanal: Add some new helper classesRichard Sandiford1-0/+334