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path: root/gcc/ira-costs.c
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2010-10-13re PR rtl-optimization/45912 (Patch for PR tree-optimization/44972 caused 250...Eric Botcazou1-10/+9
2010-10-11target.def (preferred_reload_class): New hook.Anatoly Sokolov1-8/+10
2010-07-12ira-int.h (target_ira_int): Add x_max_struct_costs_size...Richard Sandiford1-25/+17
2010-07-08toplev.h: Do not include diagnostic-core.h.Manuel López-Ibáñez1-0/+1
2010-06-30re PR middle-end/44566 (configuration with multiple targets / backends is not...Joern Rennecke1-1/+2
2010-06-04re PR rtl-optimization/39871 (Code size increase on ARM due to poor register ...Bernd Schmidt1-0/+32
2010-05-21ira-costs.c (ira_tune_allocno_costs_and_cover_classes): Fix typo.Jeff Law1-1/+1
2010-05-20ira.c (ira_non_ordered_class_hard_regs): Define.Vladimir Makarov1-0/+27
2010-04-10ira-costs.c (record_reg_classes): Ignore alternatives that are not enabled.Bernd Schmidt1-0/+8
2009-11-25Remove trailing white spaces.H.J. Lu1-6/+6
2009-11-24[multiple changes]Paolo Carlini1-2/+0
2009-10-14params.def (PARAM_IRA_LOOP_RESERVED_REGS): New.Vladimir Makarov1-0/+1
2009-09-02invoke.texi (-fsched-pressure): Document it.Vladimir Makarov1-177/+299
2009-09-02invoke.texi (-fvar-tracking-assignments): New.Alexandre Oliva1-2/+2
2009-06-22alias.c: Use REG_P...Shujing Zhao1-3/+3
2009-04-20Fix enum conversions which are invalid in C++:Ian Lance Taylor1-4/+5
2009-04-16re PR rtl-optimization/39762 (IRA ICE with -msoft-float)Vladimir Makarov1-39/+24
2008-12-18ira-cost.c (copy_cost): Lazilly initialize move_cost if needed.Jan Hubicka1-4/+11
2008-12-09tm.texi (TARGET_IRA_COVER_CLASSES): Modify description.Vladimir Makarov1-11/+25
2008-11-22ira-costs.c (find_allocno_class_costs): Work out the maximum allocno_costs va...Richard Sandiford1-15/+29
2008-11-14re PR rtl-optimization/37397 (IRA performance impact on SPEC CPU 2K/2006)Vladimir Makarov1-3/+23
2008-11-10re PR rtl-optimization/37948 (IRA generates slower code)Vladimir Makarov1-5/+8
2008-10-27ira-int.h (ira_allocno): Add member updated_cover_class_cost.Vladimir Makarov1-2/+1
2008-10-27re PR middle-end/37813 (assert with IRA_COVER_CLASSES with singleton)Vladimir Makarov1-6/+17
2008-10-16re PR target/37633 (wrong register use on sh64)Vladimir Makarov1-2/+2
2008-08-26[multiple changes]Vladimir Makarov1-0/+1594