riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-08-04	Specify signed/unsigned/dontcare in calls to extract_bit_field_1.	Roger Sayle	1	-2/+6
2023-04-17	RISC-V: Optimze the reverse conditions of rotate shift	Feng Wang	1	-8/+4
2023-03-12	middle-end: Revert can_special_div_by_const changes [PR108583]	Tamar Christina	1	-17/+6
2023-01-02	Update copyright years.	Jakub Jelinek	1	-1/+1
2022-11-14	middle-end: Support not decomposing specific divisions during vectorization.	Tamar Christina	1	-6/+17
2022-10-14	middle-end, c++, i386, libgcc: std::bfloat16_t and __bf16 arithmetic support	Jakub Jelinek	1	-1/+1
2022-10-13	machmode: Introduce GET_MODE_NEXT_MODE with previous GET_MODE_WIDER_MODE mean...	Jakub Jelinek	1	-1/+1
2022-08-30	expmed: Fix store_bit_field_1 subreg offset	Richard Sandiford	1	-6/+6
2022-08-30	middle-end: intialize regnum in store_bit_field_1	Tamar Christina	1	-1/+1
2022-08-05	middle-end: Allow backend to expand/split double word compare to 0/-1.	Roger Sayle	1	-55/+56
2022-07-08	middle-end: Use subregs to expand COMPLEX_EXPR to set the lowpart.	Tamar Christina	1	-11/+17
2022-05-24	Revert "Mitigate -Wmaybe-uninitialized in expmed.cc."	Martin Liska	1	-1/+1
2022-05-24	Mitigate -Wmaybe-uninitialized in expmed.cc.	Martin Liska	1	-1/+1
2022-05-24	middle-end/105711 - properly handle CONST_INT when expanding bitfields	Richard Biener	1	-9/+13
2022-05-09	Come up with {,UN}LIKELY macros.	Martin Liska	1	-2/+2
2022-02-28	PR middle-end/80270: ICE in extract_bit_field_1	Roger Sayle	1	-0/+4
2022-01-19	ifcvt/optabs: Allow using a CC comparison for emit_conditional_move.	Robin Dapp	1	-4/+4
2022-01-17	Rename .c files to .cc files.	Martin Liska	1	-0/+6349