aboutsummaryrefslogtreecommitdiff
path: root/gcc/expmed.c
AgeCommit message (Expand)AuthorFilesLines
2017-12-16Revert accidental commitRichard Sandiford1-21/+15
2017-12-16Add a gen_int_shift_amount helper functionRichard Sandiford1-15/+21
2017-12-16Add VEC_SERIES_EXPR and associated optabRichard Sandiford1-0/+7
2017-12-07Use tree_vector_builder instead of build_vectorRichard Sandiford1-2/+3
2017-11-15re PR target/82981 (unnecessary __multi3 call for mips64r6 linux kernel)Jakub Jelinek1-4/+6
2017-11-09Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS_PER_WORDRichard Sandiford1-2/+3
2017-11-01Widening optab cleanupRichard Sandiford1-2/+2
2017-11-01Allow vector CONSTsRichard Sandiford1-1/+9
2017-10-23Use scalar_mode in expand_shift_1Richard Sandiford1-3/+1
2017-09-15Turn TRULY_NOOP_TRUNCATION into a hookRichard Sandiford1-2/+2
2017-09-14Use vec<> in build_vectorRichard Sandiford1-4/+3
2017-09-12Use hard_regno_nregs instead of HARD_REGNO_NREGSRichard Sandiford1-1/+2
2017-09-12Turn SLOW_UNALIGNED_ACCESS into a target hookRichard Sandiford1-1/+1
2017-09-12PR81285: Fix uninitialised variable in emit_store_flag_intRichard Sandiford1-10/+11
2017-09-05Make mode_for_vector return an opt_modeRichard Sandiford1-4/+5
2017-09-05Make mode_for_size return an opt_modeRichard Sandiford1-8/+3
2017-09-04Turn MODES_TIEABLE_P into a target hookRichard Sandiford1-3/+3
2017-09-04Add subreg_memory_offset helper functionsRichard Sandiford1-23/+1
2017-08-30Add a partial_subreg_p predicateRichard Sandiford1-2/+1
2017-08-30[64/77] Add a scalar_mode classRichard Sandiford1-14/+13
2017-08-30[63/77] Simplifications after type switchRichard Sandiford1-9/+3
2017-08-30[62/77] Big machine_mode to scalar_int_mode replacementRichard Sandiford1-17/+17
2017-08-30[52/77] Use scalar_int_mode in extract/store_bit_fieldRichard Sandiford1-143/+186
2017-08-30[51/77] Use opt_scalar_int_mode when iterating over integer modesRichard Sandiford1-6/+7
2017-08-30[40/77] Use scalar_int_mode for extraction_insn fieldsRichard Sandiford1-14/+16
2017-08-30[39/77] Two changes to the get_best_mode interfaceRichard Sandiford1-18/+19
2017-08-30[38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_pRichard Sandiford1-21/+20
2017-08-30[37/77] Use scalar_int_mode when emitting cstoresRichard Sandiford1-7/+10
2017-08-30[35/77] Add uses of as_a <scalar_int_mode>Richard Sandiford1-140/+143
2017-08-30[34/77] Add a SCALAR_INT_TYPE_MODE macroRichard Sandiford1-1/+1
2017-08-30[21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode>Richard Sandiford1-7/+9
2017-08-30[20/77] Replace MODE_INT checks with is_int_modeRichard Sandiford1-13/+15
2017-08-30[19/77] Add a smallest_int_mode_for_size helper functionRichard Sandiford1-1/+1
2017-08-30[18/77] Make int_mode_for_mode return an opt_scalar_int_modeRichard Sandiford1-48/+42
2017-08-30[17/77] Add an int_mode_for_size helper functionRichard Sandiford1-11/+7
2017-08-30[6/77] Make GET_MODE_WIDER return an opt_modeRichard Sandiford1-8/+7
2017-08-30[4/77] Add FOR_EACH iterators for modesRichard Sandiford1-9/+5
2017-08-30Split out parts of scompare_loc_descriptor and emit_store_flagRichard Sandiford1-150/+169
2017-08-22Make more use of paradoxical_subreg_pRichard Sandiford1-1/+1
2017-08-01re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b...Jakub Jelinek1-2/+54
2017-07-05Remove enum before machine_modeRichard Sandiford1-2/+2
2017-06-29asan.c (asan_emit_stack_protection): Update.Jan Hubicka1-3/+4
2017-05-12Patch for RTL expand bug affecting aarch64 vector code.Jim Wilson1-5/+9
2017-03-31re PR middle-end/80173 (ICE in store_bit_field_1, at expmed.c:787)Jakub Jelinek1-2/+8
2017-01-01Update copyright years.Jakub Jelinek1-1/+1
2016-11-22re PR middle-end/78416 (wrong code for division by (u128)~INT64_MAX at -O0)Jakub Jelinek1-23/+31
2016-11-18Use rtx_mode_t instead of std::make_pairRichard Sandiford1-2/+2
2016-10-17expmed.c (expand_shift_1): Add MAY_FAIL parameter and do not assert that the ...Eric Botcazou1-11/+24
2016-10-13Move MEMMODEL_* from coretypes.h to memmodel.hThomas Preud'homme1-0/+1
2016-09-16Add inline functions for various bitwise operations.Jason Merrill1-11/+9