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2023-10-20Control flow redundancy hardeningAlexandre Oliva2-0/+104
2023-10-20Document {L,R}ROTATE_EXPRRichard Biener1-7/+11
2023-10-19doc: Update contrib.texiMarek Polacek1-0/+3
2023-10-19x86: Correct ISA enabled for clients since Arrow LakeHaochen Jiang2-37/+38
2023-10-19amdgcn: deprecate Fiji device and multilibAndrew Stubbs2-3/+20
2023-10-19LoongArch:Implement the new vector cost model framework.Jiahao Xu1-0/+7
2023-10-18diagnostic: add permerror variants with optJason Merrill1-8/+14
2023-10-18Initial Panther Lake SupportHaochen Jiang2-0/+12
2023-10-18Initial Clearwater Forest SupportHaochen Jiang2-0/+12
2023-10-16diagnostics: special-case -fdiagnostics-text-art-charset=ascii for LANG=CDavid Malcolm1-1/+2
2023-10-16i386: Allow -mlarge-data-threshold with -mcmodel=largeUros Bizjak1-3/+3
2023-10-16Implement new RTL optimizations pass: fold-mem-offsetsManolis Tsamis1-0/+8
2023-10-15libgomp.texi: Update "Enabling OpenMP" + OpenACC / invoke.texi: -fopenacc/-fo...Tobias Burnus1-11/+16
2023-10-12RISCV: Bugfix for incorrect documentation heading nestingMary Bennett1-1/+1
2023-10-12Support Intel USER_MSRHu, Lin13-3/+15
2023-10-11options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P macro for Mask and I...Kito Cheng1-7/+16
2023-10-11[PATCH v4 2/2] RISC-V: Add support for XCValu extension in CV32E40PMary Bennett2-0/+97
2023-10-11[PATCH v4 1/2] RISC-V: Add support for XCVmac extension in CV32E40PMary Bennett2-0/+89
2023-10-07aarch64: Enable Cortex-X4 CPUSaurabh Jha1-3/+3
2023-10-07[APX_EGPR] Initial support for APX_FKong Lingling1-4/+7
2023-10-07[APX EGPR] middle-end: Add index_reg_class with insn argument.Hongyu Wang2-0/+16
2023-10-07[APX EGPR] middle-end: Add insn argument to base_reg_classKong Lingling2-0/+36
2023-10-06Docs: Minimally document standard C/C++ attribute syntax.Sandra Loosemore1-22/+52
2023-10-05arc: Remove unused/incomplete alignment assembly annotation.Claudiu Zissulescu1-2/+1
2023-10-05ipa/111643 - clarify flatten attribute documentationRichard Biener1-1/+3
2023-10-01RISC-V:Optimize the MASK opt generationFeng Wang1-5/+6
2023-09-27aarch64: Fine-grained policies to control ldp-stp formationManos Anagnostakis1-0/+20
2023-09-26invoke.texi: Update -fopenmp and -fopenmp-simd for omp::decl and loop semanticTobias Burnus1-6/+10
2023-09-25LoongArch: doc: Update -m[no-]explicit-relocs for r14-4160Xi Ruoyao1-4/+6
2023-09-21rust: Reintroduce TARGET_RUST_OS_INFO hookIain Buclaw2-0/+7
2023-09-21rust: Reintroduce TARGET_RUST_CPU_INFO hookIain Buclaw2-0/+20
2023-09-21rust: Add skeleton support and documentation for targetrustm hooks.Iain Buclaw2-0/+16
2023-09-20c, c++: Accept __builtin_classify_type (typename)Jakub Jelinek1-0/+24
2023-09-20tree-optimization/111489 - turn uninit limits to paramsRichard Biener1-0/+7
2023-09-19p1689r5: initial supportBen Boeckel1-0/+27
2023-09-19c++: extend cold, hot attributes to classesJavier Martinez1-2/+35
2023-09-19PR 108143/modula2 LONGREAL and powerpc64le-linuxGaius Mulley1-1/+1
2023-09-17doc: GTY((cache)) documentation tweakJason Merrill1-0/+7
2023-09-12modula2: new option -Wcase-enum and associated fixesGaius Mulley1-0/+7
2023-09-12nvptx: stack size limits are relevant for execution onlyThomas Schwinge1-0/+4
2023-09-12riscv: Add support for str(n)cmp inline expansionChristoph Müllner1-1/+19
2023-09-12riscv: Add support for strlen inline expansionChristoph Müllner1-1/+10
2023-09-12testsuite: Port 'check-function-bodies' to nvptxThomas Schwinge1-3/+6
2023-09-06libgcc _BitInt helper documentation [PR102989]Jakub Jelinek1-0/+83
2023-09-06Middle-end _BitInt support [PR102989]Jakub Jelinek3-0/+26
2023-09-05LoongArch: Add Loongson SX base instruction support.Lulu Cheng1-0/+11
2023-09-05arc: Remove obsolete mbbit-peephole option and unused patterns.Claudiu Zissulescu1-1/+1
2023-09-05LoongArch: add new configure option --with-strict-align-libYang Yujie1-0/+4
2023-09-05LoongArch: improved target configuration interfaceYang Yujie2-10/+74
2023-09-02LoongArch: Implement 128-bit floating point functions in gcc.chenxiaolong1-3/+17
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