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2024-09-23dwarf2: add hooks for architecture-specific CFIsMatthieu Longo1-1/+4
2024-09-18reload1.cc: rtl-optimization/116326 - Use RELOAD_ELIMINABLE_REGS.Georg-Johann Lay1-0/+8
2024-08-01Add TARGET_MODE_CAN_TRANSFER_BITSRichard Biener1-0/+2
2024-07-22middle-end: Implement conditonal store vectorizer pattern [PR115531]Tamar Christina1-0/+2
2024-06-25Replace {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE with new hook mode_for_floating_typeKewen Lin1-20/+7
2024-06-13[APX CCMP] Add targetm.have_ccmp hook [PR115370]Hongyu Wang1-0/+2
2024-06-07enable adjustment of return_pc debug attrsAlexandre Oliva1-0/+2
2024-05-10c++, mingw: Fix up types of dtor hooks to __cxa_{,thread_}atexit/__cxa_throw ...Jakub Jelinek1-0/+2
2024-01-310From: Alexandre Oliva <oliva@adacore.com>Alexandre Oliva1-0/+29
2024-01-03Update copyright years.Jakub Jelinek1-1/+1
2023-12-16Add support for target_version attributeAndrew Carlotti1-0/+2
2023-12-07strub: enable conditional supportAlexandre Oliva1-0/+2
2023-12-05Introduce strub: machine-independent stack scrubbingAlexandre Oliva1-0/+19
2023-12-05Add a new target hook: TARGET_START_CALL_ARGSRichard Sandiford1-0/+2
2023-12-05Add a target hook for sibcall epiloguesRichard Sandiford1-0/+2
2023-12-05Allow prologues and epilogues to be inserted laterRichard Sandiford1-0/+2
2023-11-27aarch64: Use br instead of ret for eh_returnSzabolcs Nagy1-0/+12
2023-11-23gcc: Introduce -fhardenedMarek Polacek1-0/+2
2023-11-21Add register filter operand to define_register_constraintRichard Sandiford1-1/+2
2023-11-18Add TARGET_HAVE_LIBATOMICSebastian Huber1-0/+2
2023-11-18gcov: Remove TARGET_GCOV_TYPE_SIZE target hookSebastian Huber1-2/+0
2023-11-11mode-switching: Add a backprop hookRichard Sandiford1-0/+2
2023-11-11mode-switching: Add a target-configurable confluence operatorRichard Sandiford1-0/+2
2023-11-11mode-switching: Allow targets to set the mode for EH handlersRichard Sandiford1-0/+2
2023-11-11mode-switching: Tweak the macro/hook documentationRichard Sandiford1-11/+15
2023-10-07[APX EGPR] middle-end: Add index_reg_class with insn argument.Hongyu Wang1-0/+8
2023-10-07[APX EGPR] middle-end: Add insn argument to base_reg_classKong Lingling1-0/+18
2023-09-21rust: Reintroduce TARGET_RUST_OS_INFO hookIain Buclaw1-0/+2
2023-09-21rust: Reintroduce TARGET_RUST_CPU_INFO hookIain Buclaw1-0/+7
2023-09-21rust: Add skeleton support and documentation for targetrustm hooks.Iain Buclaw1-0/+8
2023-09-06Middle-end _BitInt support [PR102989]Jakub Jelinek1-0/+2
2023-08-31Darwin: homogenize spelling of macOSFrancois-Xavier Coudert1-1/+1
2023-05-30stor-layout, aarch64: Express SRA intrinsics with RTL codesKyrylo Tkachov1-0/+2
2023-04-28Add targetm.libm_function_max_errorJakub Jelinek1-0/+2
2023-03-23Remove TARGET_GEN_MEMSET_SCRATCH_RTX since it's not used anymore.liuhongt1-2/+0
2023-03-12middle-end: Implement preferred_div_as_shifts_over_mult [PR108583]Tamar Christina1-0/+1
2023-03-12middle-end: Revert can_special_div_by_const changes [PR108583]Tamar Christina1-1/+0
2023-03-03c++, v3: Emit fundamental tinfos for _Float16/decltype(0.0bf16) types on ia32...Jakub Jelinek1-0/+2
2023-02-23**/*.texi: Reorder index entriesArsen Arsenović1-2/+2
2023-01-16Update copyright years.Jakub Jelinek1-1/+1
2022-11-14middle-end: Support not decomposing specific divisions during vectorization.Tamar Christina1-0/+2
2022-11-14Revert "sphinx: remove texinfo files"Martin Liska1-0/+7984
2022-11-09sphinx: remove texinfo filesMartin Liska1-7984/+0
2022-10-29d: Make TARGET_D_MINFO_SECTION hooks in elfos.h the language default.Iain Buclaw1-2/+2
2022-10-07Introduce DWARF_VERSION_DEFAULT and redefine for VxWorksOlivier Hainque1-0/+6
2022-09-09Fix "address will never be NULL" warningJan-Benedict Glaw1-1/+2
2022-09-05docs: rename DEBUGGER_REGISTER_NUMBER in texiMartin Liska1-4/+4
2022-09-05rename DBX_REGISTER_NUMBER to DEBUGGER_REGNOMartin Liska1-10/+9
2022-09-02Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result.Kito Cheng1-0/+3
2022-09-02STABS: remove -gstabs and -gxcoff functionalityMartin Liska1-215/+5
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