| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2013-04-25 | arm.c (neon_builtin_type_mode): Add T_V4HF. | Kyrylo Tkachov | 1 | -0/+12 | |
| 2013-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> Julian Brown <julian@codesourcery.com> * config/arm/arm.c (neon_builtin_type_mode): Add T_V4HF. (TB_DREG): Add T_V4HF. (v4hf_UP): New macro. (neon_itype): Add NEON_FLOAT_WIDEN, NEON_FLOAT_NARROW. (arm_init_neon_builtins): Handle NEON_FLOAT_WIDEN, NEON_FLOAT_NARROW. Handle initialisation of V4HF. Adjust initialisation of reinterpret built-ins. (arm_expand_neon_builtin): Handle NEON_FLOAT_WIDEN, NEON_FLOAT_NARROW. (arm_vector_mode_supported_p): Handle V4HF. (arm_mangle_map): Handle V4HFmode. * config/arm/arm.h (VALID_NEON_DREG_MODE): Add V4HF. * config/arm/arm_neon_builtins.def: Add entries for vcvtv4hfv4sf, vcvtv4sfv4hf. * config/arm/neon.md (neon_vcvtv4sfv4hf): New pattern. (neon_vcvtv4hfv4sf): Likewise. * config/arm/neon-gen.ml: Handle half-precision floating point features. * config/arm/neon-testgen.ml: Handle Requires_FP_bit feature. * config/arm/arm_neon.h: Regenerate. * config/arm/neon.ml (type elts): Add F16. (type vectype): Add T_float16x4, T_floatHF. (type vecmode): Add V4HF. (type features): Add Requires_FP_bit feature. (elt_width): Handle F16. (elt_class): Likewise. (elt_of_class_width): Likewise. (mode_of_elt): Refactor. (type_for_elt): Handle F16, fix error messages. (vectype_size): Handle T_float16x4. (vcvt_sh): New function. (ops): Add entries for vcvt_f16_f32, vcvt_f32_f16. (string_of_vectype): Handle T_floatHF, T_float16, T_float16x4. (string_of_mode): Handle V4HF. * doc/arm-neon-intrinsics.texi: Regenerate. 2013-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * lib/target-supports.exp (check_effective_target_arm_neon_fp16_ok_nocache): New procedure. (check_effective_target_arm_neon_fp16_ok): Likewise. (add_options_for_arm_neon_fp16): Likewise. * gcc.target/arm/neon/vcvtf16_f32.c: New test. Generated. * gcc.target/arm/neon/vcvtf32_f16.c: Likewise. Co-Authored-By: Julian Brown <julian@codesourcery.com> From-SVN: r198298 | |||||
| 2013-01-10 | Update copyright years in gcc/ | Richard Sandiford | 1 | -1/+1 | |
| From-SVN: r195098 | |||||
| 2013-01-04 | Update Copyright years for files modified in 2011 and/or 2012. | Jakub Jelinek | 1 | -1/+1 | |
| From-SVN: r194903 | |||||
| 2012-12-10 | neon.ml (opcode): Add Vrintn, Vrinta, Vrintp, Vrintm, Vrintz to type. | Kyrylo Tkachov | 1 | -32/+112 | |
| gcc/ChangeLog 2012-12-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/neon.ml (opcode): Add Vrintn, Vrinta, Vrintp, Vrintm, Vrintz to type. (type features): Add Requires_arch type constructor. (ops): Define Vrintn, Vrinta, Vrintp, Vrintm, Vrintz features. * config/arm/neon-docgen.ml (intrinsic_groups): Define Vrintn, Vrinta, Vrintp, Vrintm, Vrintz, Vrintx. * config/arm/neon-testgen.ml (effective_target): Define check for Requires_arch 8. * config/arm/neon-gen.ml (print_feature_test_start): Handle Requires_arch. (print_feature_test_end): Likewise. Add 2012 to Copyright notice. * doc/arm-neon-intrinsics.texi: Regenerate. * config/arm/arm_neon.h: Regenerate. gcc/testsuite/ChangeLog 2012-12-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/arm/neon/vrndaf32.c: New test. * gcc.target/arm/neon/vrndqaf32.c: Likewise. * gcc.target/arm/neon/vrndf32.c: Likewise. * gcc.target/arm/neon/vrndqf32.c: Likewise. * gcc.target/arm/neon/vrndmf32.c: Likewise. * gcc.target/arm/neon/vrndqmf32.c: Likewise. * gcc.target/arm/neon/vrndnf32.c: Likewise. * gcc.target/arm/neon/vrndqnf32.c: Likewise. * gcc.target/arm/neon/vrndpf32.c: Likewise. * gcc.target/arm/neon/vrndqpf32.c: Likewise. From-SVN: r194353 | |||||
| 2012-10-18 | Add basic armv8-a support | Matthew Gretton-Dann | 1 | -74/+106 | |
| 2012-10-17 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/arm/lib1funcs.S (__ARM_ARCH__): Define for ARMv8-A. 2012-10-17 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gcc.target/arm/ftest-armv8a-arm.c: New testcase. * gcc.target/arm/ftest-armv8a-thumb.c: Likewise. * gcc.target/arm/ftest-support-arm.h (feature_matrix): Add ARMv8-A row. * gcc.target/arm/ftest-support-thumb.h (feature_matrix): Likewise. * gcc.target/arm/ftest-support.h (architecture): Add ARMv8-A. * lib/target-supports.exp: Add ARMv8-A architecture expectation. 2012-10-17 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config.gcc: Add support for ARMv8 for arm*-*-* targets. * config/arm/arm-arches.def: Add armv8-a * config/arm/arm-fpus.def: Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8. Add crypto field. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm.c (FL_FOR_ARCH8A): Likewise. (arm_arch8): New global variable. (ARM_FPU): Add crypto parameter. (arm_option_override): Set arm_arch8, update comments. * config/arm/arm.h (TARGET_CRYPTO): New macro. (arm_fpu_desc): Add crypto field. (base_architecture): Add ARMv8 entry. (arm_arch8): New variable declaration. * config/arm/bpabi.h: ARMv8 supports BE8. * doc/invoke.texi: Document ARMv8 options. Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> From-SVN: r192558 | |||||
| 2010-07-02 | neon.md (UNSPEC_VABA): Delete. | Sandra Loosemore | 1 | -12/+8 | |
| 2010-07-02 Sandra Loosemore <sandra@codesourcery.com> Julian Brown <julian@codesourcery.com> gcc/ * config/arm/neon.md (UNSPEC_VABA): Delete. (UNSPEC_VABAL): Delete. (UNSPEC_VABS): Delete. (UNSPEC_VMUL_N): Delete. (adddi3_neon): New. (subdi3_neon): New. (mul<mode>3add<mode>_neon): Make the pattern named. (mul<mode>3neg<mode>add<mode>_neon): Likewise. (neon_vadd<mode>): Replace with define_expand, and move the remaining unspec parts... (neon_vadd<mode>_unspec): ...to this. (neon_vmla<mode>, neon_vmla<mode>_unspec): Likewise. (neon_vlms<mode>, neon_vmls<mode>_unspec): Likewise. (neon_vsub<mode>, neon_vsub<mode>_unspec): Likewise. (neon_vaba<mode>): Rewrite in terms of vabd. (neon_vabal<mode>): Rewrite in terms of vabdl. (neon_vabs<mode>): Rewrite without unspec. * config/arm/arm.md (*arm_adddi3): Disable for TARGET_NEON. (*arm_subdi3): Likewise. * config/arm/neon.ml (Vadd, Vsub): Split out 64-bit variants and add No_op attribute to disable assembly output checks. * config/arm/arm_neon.h: Regenerated. * doc/arm-neon-intrinsics.texi: Regenerated. gcc/testsuite/ * gcc.target/arm/neon/vadds64.c: Regenerated. * gcc.target/arm/neon/vaddu64.c: Regenerated. * gcc.target/arm/neon/vsubs64.c: Regenerated. * gcc.target/arm/neon/vsubu64.c: Regenerated. * gcc.target/arm/neon-vmla-1.c: Add -ffast-math to options. * gcc.target/arm/neon-vmls-1.c: Likewise. * gcc.target/arm/neon-vsubs64.c: New execution test. * gcc.target/arm/neon-vsubu64.c: New execution test. * gcc.target/arm/neon-vadds64.c: New execution test. * gcc.target/arm/neon-vaddu64.c: New execution test. Co-Authored-By: Julian Brown <julian@codesourcery.com> From-SVN: r161762 | |||||
| 2010-07-02 | neon.md (UNSPEC_VAND): Delete. | Sandra Loosemore | 1 | -10/+0 | |
| 2010-07-02 Sandra Loosemore <sandra@codesourcery.com> gcc/ * config/arm/neon.md (UNSPEC_VAND): Delete. (UNSPEC_VBIC): Delete. (UNSPEC_VCLZ): Delete. (UNSPEC_VCNT): Delete. (UNSPEC_VEOR): Delete. (UNSPEC_VORN): Delete. (UNSPEC_VORR): Delete. (iordi3_neon): Rewrite RTL without unspec. Add alternatives to handle core registers too. (anddi3_neon): Likewise. (orndi3_neon): Likewise. (bicdi3_neon): Likewise. (xordi3_neon): Likewise. (neon_vclz<mode>): Rewrite as define_expand and clz<mode>2 to get rid of unspec and handle unused operand. (neon_vcnt<mode>): Similarly, with popcount<mode>2. * config/arm/predicates.md (imm_for_neon_logic_operand): Require TARGET_NEON. (imm_for_neon_inv_logic_operand): Likewise. * config/arm/arm.md (define_split for logical_binary_operator): Disable for NEON registers. (anddi3): Add new define_expand, and rename the insn. Disable this insn for NEON, where anddi3_neon now applies. (*anddi_notdi_di): Disable for TARGET_NEON, where bicdi3_neon applies. (iordi3): As for anddi3. (xordi3): Likewise. * config/arm/neon.ml (Vand): Split DImode variants and mark them as No_op to disable testing for exact instruction match. (Vorr): Likewise. (Veor): Likewise. (Vbic): Likewise. (Vorn): Likewise. * config/arm/arm_neon.h: Regenerated. * doc/arm-neon-intrinsics.texi: Regenerated. gcc/testsuite/ * gcc.target/arm/neon-vands64.c: New. * gcc.target/arm/neon-vandu64.c: New. * gcc.target/arm/neon-vbics64.c: New. * gcc.target/arm/neon-vbicu64.c: New. * gcc.target/arm/neon-veors64.c: New. * gcc.target/arm/neon-veoru64.c: New. * gcc.target/arm/neon-vorns64.c: New. * gcc.target/arm/neon-vornu64.c: New. * gcc.target/arm/neon-vorrs64.c: New. * gcc.target/arm/neon-vorru64.c: New. * gcc.target/arm/neon/vands64.c: Regenerated. * gcc.target/arm/neon/vandu64.c: Regenerated. * gcc.target/arm/neon/vbics64.c: Regenerated. * gcc.target/arm/neon/vbicu64.c: Regenerated. * gcc.target/arm/neon/veors64.c: Regenerated. * gcc.target/arm/neon/veoru64.c: Regenerated. * gcc.target/arm/neon/vorns64.c: Regenerated. * gcc.target/arm/neon/vornu64.c: Regenerated. * gcc.target/arm/neon/vorrs64.c: Regenerated. * gcc.target/arm/neon/vorru64.c: Regenerated. From-SVN: r161755 | |||||
| 2010-07-02 | arm.c (neon_vdup_constant): Expand into canonical RTL instead of an unspec. | Sandra Loosemore | 1 | -19/+5 | |
| 2010-07-02 Sandra Loosemore <sandra@codesourcery.com> gcc/ * config/arm/arm.c (neon_vdup_constant): Expand into canonical RTL instead of an unspec. (neon_expand_vector_init): Likewise. * config/arm/neon.md (UNSPEC_VCOMBINE): Delete. (UNSPEC_VDUP_LANE): Delete. (UNSPEC VDUP_N): Delete. (UNSPEC_VGET_HIGH): Delete. (UNSPEC_VGET_LANE): Delete. (UNSPEC_VGET_LOW): Delete. (UNSPEC_VMVN): Delete. (UNSPEC_VSET_LANE): Delete. (V_double_vector_mode): New. (vec_set<mode>_internal): Make code emitted match that for the corresponding intrinsics. (vec_setv2di_internal): Likewise. (neon_vget_lanedi): Rewrite to expand into emit_move_insn. (neon_vget_lanev2di): Rewrite to expand into vec_extractv2di. (neon_vset_lane<mode>): Combine double and quad patterns and expand into vec_set<mode>_internal instead of UNSPEC_VSET_LANE. (neon_vset_lanedi): Rewrite to expand into emit_move_insn. (neon_vdup_n<mode>): Rewrite RTL without unspec. (neon_vdup_ndi): Rewrite as define_expand and use emit_move_insn. (neon_vdup_nv2di): Rewrite RTL without unspec and merge with with neon_vdup_lanev2di, adjusting the pattern from the latter to be predicable for consistency. (neon_vdup_lane<mode>_internal): New. (neon_vdup_lane<mode>): Turn into a define_expand and rewrite to avoid using an unspec. (neon_vdup_lanedi): Rewrite RTL pattern to avoid unspec. (neon_vdup_lanev2di): Turn into a define_expand. (neon_vcombine): Rewrite pattern to eliminate UNPSEC_VCOMBINE. (neon_vget_high<mode>): Replace with.... (neon_vget_highv16qi): New pattern using canonical RTL. (neon_vget_highv8hi): Likewise. (neon_vget_highv4si): Likewise. (neon_vget_highv4sf): Likewise. (neon_vget_highv2di): Likewise. (neon_vget_low<mode>): Replace with.... (neon_vget_lowv16qi): New pattern using canonical RTL. (neon_vget_lowv8hi): Likewise. (neon_vget_lowv4si): Likewise. (neon_vget_lowv4sf): Likewise. (neon_vget_lowv2di): Likewise. * config/arm/neon.ml (Vget_lane): Add No_op attribute to suppress test for this emitting vmov. (Vset_lane): Likewise. (Vdup_n): Likewise. (Vmov_n): Likewise. * doc/arm-neon-intrinsics.texi: Regenerated. gcc/testsuite/ * gcc.target/arm/neon/vdup_ns64.c: Regenerated. * gcc.target/arm/neon/vdup_nu64.c: Regenerated. * gcc.target/arm/neon/vdupQ_ns64.c: Regenerated. * gcc.target/arm/neon/vdupQ_nu64.c: Regenerated. * gcc.target/arm/neon/vmov_ns64.c: Regenerated. * gcc.target/arm/neon/vmov_nu64.c: Regenerated. * gcc.target/arm/neon/vmovQ_ns64.c: Regenerated. * gcc.target/arm/neon/vmovQ_nu64.c: Regenerated. * gcc.target/arm/neon/vget_lanes64.c: Regenerated. * gcc.target/arm/neon/vget_laneu64.c: Regenerated. * gcc.target/arm/neon/vset_lanes64.c: Regenerated. * gcc.target/arm/neon/vset_laneu64.c: Regenerated. * gcc.target/arm/neon-vdup_ns64.c: New. * gcc.target/arm/neon-vdup_nu64.c: New. * gcc.target/arm/neon-vdupQ_ns64.c: New. * gcc.target/arm/neon-vdupQ_nu64.c: New. * gcc.target/arm/neon-vdupQ_lanes64.c: New. * gcc.target/arm/neon-vdupQ_laneu64.c: New. * gcc.target/arm/neon-vmov_ns64.c: New. * gcc.target/arm/neon-vmov_nu64.c: New. * gcc.target/arm/neon-vmovQ_ns64.c: New. * gcc.target/arm/neon-vmovQ_nu64.c: New. * gcc.target/arm/neon-vget_lanes64.c: New. * gcc.target/arm/neon-vget_laneu64.c: New. * gcc.target/arm/neon-vset_lanes64.c: New. * gcc.target/arm/neon-vset_laneu64.c: New. From-SVN: r161720 | |||||
| 2009-11-18 | * doc/arm-neon-intrinsics.texi: Regenerated. | Daniel Jacobowitz | 1 | -6/+6 | |
| From-SVN: r154302 | |||||
| 2007-07-25 | Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi. | Julian Brown | 1 | -0/+11293 | |
| gcc/ * Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi. * config.gcc (arm*-*-*): Add arm_neon.h to extra headers. (with_fpu): Allow --with-fpu=neon. * config/arm/aof.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15. * config/arm/aout.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15. * config/arm/arm-modes.def (EI, OI, CI, XI): New modes. * config/arm/arm-protos.h (neon_immediate_valid_for_move) (neon_immediate_valid_for_logic, neon_output_logic_immediate) (neon_pairwise_reduce, neon_expand_vector_init, neon_reinterpret) (neon_emit_pair_result_insn, neon_disambiguate_copy) (neon_vector_mem_operand, neon_struct_mem_operand, output_move_quad) (output_move_neon): Add prototypes. * config/arm/arm.c (FL_NEON): New flag for NEON processor capability. (all_fpus): Add FPUTYPE_NEON. (fp_model_for_fpu): Add NEON field. (arm_return_in_memory): Return vectors <= 16 bytes in ARM registers. (arm_arg_partial_bytes): Allow NEON vectors to be passed partially in registers. (arm_legitimate_address_p): Don't support fancy addressing for NEON structure moves. (thumb2_legitimate_address_p): Likewise. (neon_valid_immediate): Recognize and prepare constants suitable for NEON instructions. (neon_immediate_valid_for_move): New function. Recognize and prepare immediates for NEON move instructions. (neon_immediate_valid_for_logic): New function. Recognize and prepare immediates for NEON logic instructions. (neon_output_logic_immediate): New function. Create asm string suitable for outputting immediate logic instructions. (neon_pairwise_reduce): New function. Implement reduction using pairwise operations. (neon_expand_vector_init): New function. Expand a (possibly non-constant) vector initialization. (neon_vector_mem_operand): New function. Memory operands supported for quad-word loads/stores to/from ARM or NEON registers. Don't allow base+offset addressing for core regs. (neon_struct_mem_operand): New function. Valid mems for NEON structure moves. (coproc_secondary_reload_class): Enable NEON registers to be loaded from neon_vector_mem_operand addresses without a secondary register. (add_minipool_forward_ref): Handle >8-byte minipool entries. (add_minipool_backward_ref): Likewise. (dump_minipool): Likewise. (push_minipool_fix): Likewise. (output_move_quad): New function. Output quad-word moves, loads and stores using ARM registers. (output_move_vfp): Add support for vectors in VFP (NEON) D registers. (output_move_neon): Output a NEON load/store to/from a quadword register. (arm_print_operand): Implement new codes: - 'c' for unadorned integers (without a # sign). - 'J', 'K' for reg+2/reg+3, reg+3/reg+2 in little/big-endian mode. - 'e', 'f' for the low and high D parts of a NEON Q register. - 'q' outputs a NEON Q register. - 'h' outputs ranges of D registers for VLDM/VSTM etc. - 'T' prints NEON opcode features from a coded bitmask. - 'F' is similar to T, but signed/unsigned codes both print as 'i'. - 't' is similar to T, but 'u' is printed instead of 'p'. - 'O' prints 'r' if NEON instruction should perform rounding (as specified by bitmask), else prints nothing. - '#' is a punctuation character to stop operand numbers from running together with following digits in the assembler strings for instructions (when using mode attributes). (arm_assemble_integer): Handle extra NEON vector modes. Permute constant vectors in big-endian mode, where necessary. (arm_hard_regno_mode_ok): Allow vectors in VFP/NEON registers. Handle EI, OI, CI, XI modes. (ashlv4hi3, ashlv2si3, lshrv4hi3, lshrv2si3, ashrv4hi3) (ashrv2si3): Rename IWMMXT2_BUILTINs to... (ashlv4hi3_iwmmxt, ashlv2si3_iwmmxt, lshrv4hi3_iwmmxt) (lshrv2si3_iwmmxt, ashrv4hi3_iwmmxt, ashrv2si3_iwmmxt): New names. (neon_builtin_type_bits): Add enumeration, one bit for each vector type. (v8qi_UP, v4hi_UP, v2si_UP, v2sf_UP, di_UP, v16qi_UP, v8hi_UP) (v4si_UP, v4sf_UP, v2di_UP, ti_UP, ei_UP, oi_UP, UP): Define macros to turn v8qi, etc. into bits defined above. (neon_itype): New enumeration. Classifications of NEON builtins. (neon_builtin_datum): Define struct. Contains information about a single builtin (with multiple modes). (CF): Define helper macro for... (VAR1...VAR10): Define builtins with a type, name and 1-10 different modes. (neon_builtin_data): New array. Define information about builtins for use during initialization/expansion. (arm_init_neon_builtins): New function. (arm_init_builtins): Call arm_init_neon_builtins if TARGET_NEON is true. (neon_builtin_compare): New function. (locate_neon_builtin_icode): New function. Find an insn code for a builtin given a function code for that builtin. Also return type of builtin (NEON_BINOP, NEON_UNOP etc.). (builtin_arg): New enumeration. Types of arguments for builtins. (arm_expand_neon_args): New function. Expand a generic NEON builtin. Takes a variable argument list of builtin_arg types, terminated by NEON_ARG_STOP. (arm_expand_neon_builtin): New function. Expand a NEON builtin. (neon_reinterpret): New function. Expand NEON reinterpret intrinsic. (neon_emit_pair_result_insn): New function. Support returning pairs of vectors via a pointer. (neon_disambiguate_copy): New function. Set up operands for a multi-word copy such that registers do not get clobbered. (arm_expand_builtin): Call arm_expand_neon_builtin if fcode >= ARM_BUILTIN_NEON_BASE. (arm_file_start): Set float-abi attribute for NEON. (arm_vector_mode_supported_p): Enable NEON vector modes. (arm_mangle_map_entry): New. (arm_mangle_map): New. (arm_mangle_vector_type): New. * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_NEON__ when appropriate. (TARGET_NEON): New macro. Target supports NEON. (fputype): Add FPUTYPE_NEON. (UNITS_PER_SIMD_WORD): Define. Allow quad-word registers to be used for vectorization based on command-line arg. (NEON_REGNO_OK_FOR_NREGS): Define. (VALID_NEON_DREG_MODE, VALID_NEON_QREG_MODE) (VALID_NEON_STRUCT_MODE): Define. (PRINT_OPERAND_PUNCT_VALID_P): '#' is valid punctuation. (arm_builtins): Add ARM_BUILTIN_NEON_BASE. * config/arm/arm.md (VUNSPEC_POOL_16): Insert constant for unspec. (consttable_16): Add pattern for outputting 16-byte minipool entries. (movv2si, movv4hi, movv8qi): Remove blank expanders (redefined in vec-common.md). (vec-common.md, neon.md): Include md files. * config/arm/arm.opt (mvectorize-with-neon-quad): Add option. * config/arm/constraints.md (constraint "Dn", "Dl", "DL"): Define. (memory_constraint "Ut", "Un", "Us"): Define. * config/arm/iwmmxt.md (VMMX, VSHFT): New mode macros. (MMX_char): New mode attribute. (addv8qi3, addv4hi3, addv2si3): Remove. Replace with... (*add<mode>3_iwmmxt): New insn pattern. (subv8qi3, subv4hi3, subv2si3): Remove. Replace with... (*sub<mode>3_iwmmxt): New insn pattern. (mulv4hi3): Rename to... (*mulv4hi3_iwmmxt): This. (smaxv8qi3, smaxv4hi3, smaxv2si3, umaxv8qi3, umaxv4hi3) (umaxv2si3, sminv8qi3, sminv4hi3, sminv2si3, uminv8qi3) (uminv4hi3, uminv2si3): Remove. Replace with... (*smax<mode>3_iwmmxt, *umax<mode>3_iwmmxt, *smin<mode>3_iwmmxt) (*umin<mode>3_iwmmxt): These. (ashrv4hi3, ashrv2si3, ashrdi3_iwmmxt): Replace with... (ashr<mode>3_iwmmxt): This new pattern. (lshrv4hi3, lshrv2si3, lshrdi3_iwmmxt): Replace with... (lshr<mode>3_iwmmxt): This new pattern. (ashlv4hi3, ashlv2si3, ashldi3_iwmmxt): Replace with... (ashl<mode>3_iwmmxt): This new pattern. * config/arm/neon-docgen.ml: New file. Generate documentation for intrinsics. * config/arm/neon-gen.ml: New file. Generate arm_neon.h header. * config/arm/arm_neon.h: New (autogenerated). * config/arm/neon-testgen.ml: New file. Generate NEON tests automatically. * config/arm/neon.md: New file. Define NEON instructions. * config/arm/neon.ml: New file. Abstract description of NEON instructions, used to generate arm_neon.h header, documentation and tests. * config/arm/t-arm (MD_INCLUDES): Add vec-common.md, neon.md. * vec-common.md: New file. Shared parts for iWMMXt and NEON vector support. * doc/extend.texi (ARM Built-in Functions): Rename and remove extraneous comma. (ARM NEON Intrinsics): New subsection. * doc/arm-neon-intrinsics.texi: New (autogenerated). gcc/testsuite/ * gcc.dg/vect/vect.exp: Check is-effective-target arm_neon_hw. * gcc.dg/vect/tree-vect.h: Check for NEON SIMD support. * lib/gcc-dg.exp (cleanup-saved-temps): Fix comment. * lib/target-supports.exp (check_effective_target_arm_neon_ok) (check_effective_target_arm_neon_hw): New. * gcc.target/arm/neon/neon.exp: New file. * gcc.target/arm/neon/polytypes.c: New file. * gcc.target/arm/neon/v*.c (1870 files): New (autogenerated). Co-Authored-By: Joseph Myers <joseph@codesourcery.com> Co-Authored-By: Mark Shinwell <shinwell@codesourcery.com> Co-Authored-By: Paul Brook <paul@codesourcery.com> From-SVN: r126911 | |||||
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