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2020-03-18[ARM][GCC][2/4x]: MVE intrinsics with quaternary operands.Srinath Parvathaneni3-2/+4235
2020-03-18[ARM][GCC][1/4x]: MVE intrinsics with quaternary operands.Srinath Parvathaneni4-21/+498
2020-03-18[ARM][GCC][3/3x]: MVE intrinsics with ternary operands.Srinath Parvathaneni3-54/+4066
2020-03-18[ARM][GCC][2/3x]: MVE intrinsics with ternary operands.Srinath Parvathaneni5-3/+4008
2020-03-18amdgcn: Fix vector compare modesAndrew Stubbs2-2/+6
2020-03-18amdgcn: Add cond_add/sub/and/ior/xor for all vector modesAndrew Stubbs1-15/+12
2020-03-18Fix up duplicated duplicated words in commentsJakub Jelinek1-1/+1
2020-03-18aarch64: Fix SYMBOL_TINY_GOT handling for ILP32 [PR94201]Duan bo2-8/+31
2020-03-18aarch64: Treat p12-p15 as call-preserved in SVE PCS functionsRichard Sandiford1-7/+24
2020-03-17aarch64: Fix bf16_v(ld|st)n.c failures for big-endianRichard Sandiford1-1/+2
2020-03-17[ARM][GCC][1/3x]: MVE intrinsics with ternary operands.Srinath Parvathaneni4-295/+995
2020-03-17[ARM][GCC][5/2x]: MVE intrinsics with binary operands.Srinath Parvathaneni3-328/+3413
2020-03-17[ARM][GCC][4/2x]: MVE intrinsics with binary operands.Srinath Parvathaneni5-4/+5000
2020-03-17[ARM][GCC][3/2x]: MVE intrinsics with binary operands.Srinath Parvathaneni4-4/+238
2020-03-17[ARM][GCC][2/2x]: MVE intrinsics with binary operands.Srinath Parvathaneni6-4/+256
2020-03-17[ARM][GCC][1/2x]: MVE intrinsics with binary operands.Srinath Parvathaneni6-4/+206
2020-03-17[ARM][GCC][4/1x]: MVE intrinsics with unary operand.Srinath Parvathaneni4-1/+79
2020-03-17[ARM][GCC][3/1x]: MVE intrinsics with unary operand.Srinath Parvathaneni5-6/+1063
2020-03-17Fix up duplicated duplicated words mostly in commentsJakub Jelinek16-21/+21
2020-03-17[GCC][PATCH][ARM] Add multilib mapping for Armv8.1-M+MVE with -mfloat-abi=hardMihail Ionescu1-6/+7
2020-03-17[ARM][GCC][2/1x]: MVE intrinsics with unary operand.Srinath Parvathaneni4-2/+217
2020-03-17[ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with unary operand.Srinath Parvathaneni4-1/+536
2020-03-17[ARM][GCC][4/x]: MVE ACLE vector interleaving store intrinsics.Srinath Parvathaneni7-10/+463
2020-03-16[ARM][GCC][3/x]: MVE ACLE intrinsics framework patch.Srinath Parvathaneni1-3/+19
2020-03-16[ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.Srinath Parvathaneni8-71/+131
2020-03-16[ARM][GCC][1/x]: MVE ACLE intrinsics framework patch.Srinath Parvathaneni17-150/+611
2020-03-16i386: Use ix86_output_ssemov for SImode TYPE_SSEMOVH.J. Lu2-28/+2
2020-03-15i386: Use ix86_output_ssemov for SFmode TYPE_SSEMOVH.J. Lu2-24/+11
2020-03-15driver: Fix redundant descriptions in optionsLewis Hyatt2-3/+3
2020-03-14i386: Use ix86_output_ssemov for DImode TYPE_SSEMOVH.J. Lu1-29/+2
2020-03-14Fix doubled indefinite articles, mostly in comments.Jakub Jelinek2-2/+2
2020-03-13Fix UBSAN error, shifting 64 bit value by 64.Aaron Sawdey1-1/+4
2020-03-13aarch64: Fix another bug in aarch64_add_offset_1 [PR94121]Jakub Jelinek1-1/+2
2020-03-13i386: Use ix86_output_ssemov for DFmode TYPE_SSEMOVH.J. Lu2-41/+9
2020-03-13aarch64: Add --params to control the number of recip steps [PR94154]Bu Le2-3/+14
2020-03-12Support for the CPEN control register was removed in rev .50 of the RXv1 Inst...Jeff Law2-2/+0
2020-03-12i386: Use ix86_output_ssemov for MMX TYPE_SSEMOVH.J. Lu2-27/+21
2020-03-11[rs6000] Fix a wrong GC issueBin Bin Lv3-4/+5
2020-03-11Bug fix: cannot convert 'const short int*' to 'const __bf16*'Delia Burduv2-13/+15
2020-03-11pdp11: Fix handling of common (local and global) vars [PR94134]Jakub Jelinek1-1/+2
2020-03-11aarch64: Fix ICE in aarch64_add_offset_1 [PR94121]Jakub Jelinek1-1/+1
2020-03-10Fix length computation for movsi_insv which resulted in regressions due to ou...Jeff Law1-1/+2
2020-03-11rs6000: Check -+0 and NaN for smax/smin generationJiufu Guo1-1/+5
2020-03-10PR90763: PowerPC vec_xl_len should take const argument.Will Schmidt1-0/+13
2020-03-10i386: Fix up *testqi_ext_3 insn&split for the *testdi_1 changes [PR94088]Jakub Jelinek1-6/+11
2020-03-09rs6000: Fix -mlong-double documentationCarl Love1-1/+2
2020-03-09Restore alignment in rs6000 target.Martin Liska1-5/+0
2020-03-06[AArch64] Use intrinsics for widening multiplies (PR91598)Wilco Dijkstra5-200/+157
2020-03-06[AArch64] Fix lane specifier syntaxWilco Dijkstra1-10/+10
2020-03-06[AArch64][SVE] Add missing movprfx attribute to some ternary arithmetic patternsKyrylo Tkachov1-0/+2
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