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2011-01-19sysv4.h (SHARED_LIB_SUPPORT): Remove conditional.Joseph Myers1-17/+2
* config/rs6000/sysv4.h (SHARED_LIB_SUPPORT): Remove conditional. (NO_SHARED_LIB_SUPPORT): Remove. (LINK_SHLIB_SPEC): Remove one conditional definition. From-SVN: r169025
2011-01-19linux64.h (LINK_SPEC): Remove %{non_shared} %{call_shared}.Joseph Myers5-8/+5
* config/mips/linux64.h (LINK_SPEC): Remove %{non_shared} %{call_shared}. * config/mips/mips.h (LINK_SPEC): Remove %{non_shared}. * config/mips/netbsd.h (LINK_SPEC): Remove %{call_shared}. * config/mips/openbsd.h (LINK_SPEC): Remove %{non_shared} %{call_shared} and conditionals on these options not being passed. * config/mips/sde.h (LINK_SPEC): Remove %{non_shared} %{call_shared}. From-SVN: r169024
2011-01-19mn10300: Use reg_or_am33_const_operand in mulsi3.Richard Henderson1-8/+8
From-SVN: r169017
2011-01-19* config/spu/spu.h (MOVE_RATIO): Return 4 in the !speed case.Ulrich Weigand1-1/+1
From-SVN: r169015
2011-01-19mn10300: Implement adddi3, subdi3.Richard Henderson2-0/+326
Via expander, pre- and post-reload patterns. The pre-reload pattern is defined to allow lower_subregs totally split the DImode values. From-SVN: r169014
2011-01-19mn10300: Emit retf instructionRichard Henderson3-49/+61
Now that we properly track the life of MDR, we can emit the RETF instruction if MDR has not been modified. This insn is 3-4 cycles faster since the return address is already loaded. From-SVN: r169013
2011-01-19mn10300: tidy pic address loadingRichard Henderson4-218/+99
There's little reason to greatly complicate things by splitting the pic_load patterns and using complex rtl to make it work out. Instead, use the %= marker to generate unique numbers and emit the entire load_pic sequence at once. At the same time, collect all references to outgoing_args_size into mn10300_frame_size, and all computations of register save area size into mn10300_initial_offset. From-SVN: r169012
2011-01-19mn10300: Cleanup all arithmetic.Richard Henderson6-950/+685
For addition and logicals, define an operation-plus-flags update pattern in preparation for compare elimination. In addition, clean up the way we compare and validate CC_MODEs. Define NEG in terms of NOT; this is smaller and allows a non-clobbering destination alternative. From-SVN: r169010
2011-01-19mn10300: Explicitly represent MDR in multiply and divide.Richard Henderson1-116/+154
Note that the mulsidi3_internal pattern is structured so as to let the lower-subregs pass fully split the result. From-SVN: r169008
2011-01-19mn10300: Expose the MDR register to register allocation.Richard Henderson4-19/+55
Note that nothing uses the "z" constraint yet except the one move pattern; this merely defines the register class properly. From-SVN: r169007
2011-01-19mn10300: Cleanup legitimate addressesRichard Henderson3-97/+147
Allow REG+REG and POST_MODIFY addressing for AM33. Fix AM33 base and index register classes. Remove a bunch of register class combinations that aren't really useful after this cleanup. From-SVN: r169006
2011-01-19mn10300: Cleanup secondary reloadsRichard Henderson4-82/+102
Handles output reloads for QI/HImode properly; previously we were only handing input reloads properly. Handles reloads involving the stack pointer better; note that the AM33 allows copying SP to DATA_REGS as well as ADDRESS and EXTENDED. From-SVN: r169005
2011-01-19mn10300: Re-write move patterns.Richard Henderson1-762/+173
Use the "D" and "A" constraints, and the enabled attribute to unify all ofthe integer move patterns. Delete the fake double word move patterns; let the middle-end generate subregs as required. Unfortunately, this somehow exposes a register pressure problem with the udivmod pattern. This is properly fixed with subsequent patches that expose the MDR register. In the meantime it is highly desirable to to preserve bisect-ability of the patch series, so disable this pattern for AM30. From-SVN: r169004
2011-01-18re PR target/46997 (new ia64 vector instructions are broken on HP-UX ↵Steve Ellcey2-30/+100
(big-endian)) PR target/46997 * ia64.c (ia64_expand_unpack): Fix code for TARGET_BIG_ENDIAN. (a64_expand_widen_sum): Ditto. * vect.md (mulv2si3): Disable for TARGET_BIG_ENDIAN. (vec_extract_evenodd_help): Ditto. (vec_extract_evenv4hi): Ditto. (vec_extract_oddv4hi): Ditto. (vec_extract_evenv2si): Ditto. (vec_extract_oddv2si): Ditto. (vec_extract_evenv2sf): Ditto. (vec_extract_oddv2sf): Ditto. (vec_pack_trunc_v4hi: Ditto. (vec_pack_trunc_v2si): Ditto. (vec_interleave_lowv8qi): Fix for TARGET_BIG_ENDIAN. (vec_interleave_highv8qi): Ditto. (mix1_r): Ditto. (vec_extract_oddv8qi): Ditto. (vec_interleave_lowv4hi): Ditto. (vec_interleave_highv4hi): Ditto. (vec_interleave_lowv2si): Ditto. (vec_interleave_highv2si): Ditto. From-SVN: r168970
2011-01-18extend.texi: Mention __float128 support on hppa HP-UX.John David Anglin4-5/+142
* doc/extend.texi: Mention __float128 support on hppa HP-UX. * config/pa/pa-hpux.h (HPUX_LONG_DOUBLE_LIBRARY): Define to 1. * config/pa/pa.c (pa_expand_builtin): New. Include "langhooks.h". (pa_c_mode_for_suffix): New. (TARGET_EXPAND_BUILTIN): Define. (TARGET_C_MODE_FOR_SUFFIX): Define. (pa_builtins): Define. (pa_init_builtins): Register __float128 type and init new support builtins. * config/pa/pa.h (HPUX_LONG_DOUBLE_LIBRARY): Define if not defined. * config/pa/quadlib.c (_U_Qfcopysign): New. From-SVN: r168969
2011-01-18re PR tree-optimization/47179 (SPU: errno misoptimization around malloc call)Ulrich Weigand1-0/+28
PR tree-optimization/47179 * config/spu/spu.c (spu_ref_may_alias_errno): New function. (TARGET_REF_MAY_ALIAS_ERRNO): Define. From-SVN: r168961
2011-01-18cortex-a9.md (cortex-a9-neon.md): Actually include.Ramana Radhakrishnan1-4/+8
2011-01-18 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/arm/cortex-a9.md (cortex-a9-neon.md): Actually include. (cortex_a9_dp): Handle neon types correctly. From-SVN: r168950
2011-01-17rx: Split adddi3 and subdi3 after reload.Richard Henderson2-51/+214
The formulation of the pre-reload pattern allows the lower_subreg pass to properly split the patterns. This also required re-writing rx_source_operand and related predicates to accept subregs. From-SVN: r168929
2011-01-17rx: Replace sat builtin with ssaddsi3 pattern.Richard Henderson2-14/+31
A standalone __builtin_rx_sat isn't implementable due to needing to keep the flags live before reload. Instead provide a saturating add pattern, which hopefully will be pattern-matched by high-level optimizations. From-SVN: r168928
2011-01-17rx: Rewrite the bit manipulation patterns.Richard Henderson4-88/+166
The patterns represented with ashift 1 canonically need to have the ashift as the first operand of the logical operation. Leave insv represented as a zero_extract store. Implement a variable store to a 1 bit field as tst+bmne. Implement a variable store of a condition into a 1 bit field with bmcc. From-SVN: r168927
2011-01-17rx: Fix incorrect usage of + in output operands.Richard Henderson1-5/+5
From-SVN: r168926
2011-01-17rx: Cleanup non-VOIDmode SETs.Richard Henderson2-194/+76
SET should always have VOIDmode. A number of places used SImode or QImode for the mode of the SET rtx itself. From-SVN: r168925
2011-01-17rx: Cleanup flags generation.Richard Henderson3-69/+266
All arithmetic should only clobber the flags by default; setting the flags to a useful value should be done by a separate pattern. From-SVN: r168924
2011-01-17rx: Implement cstoresf4.Richard Henderson1-0/+92
From-SVN: r168923
2011-01-17rx: Remove %B workaround.Richard Henderson1-2/+0
This was delayed until all compare+operate patterns were converted. From-SVN: r168922
2011-01-17rx: Split movsicc post-reload.Richard Henderson1-38/+69
This will allow elimination of the compare. From-SVN: r168921
2011-01-17rx: Split cstoresi4 post-reload.Richard Henderson3-16/+29
This will allow elimination of the compare. From-SVN: r168920
2011-01-17rx: Cleanup conditional branches.Richard Henderson4-318/+436
Use match_operator, not code_iterators. Use a new helper function, rx_split_cbranch. Get the modes right on the comparisons. Distinguish fp comparisons with CC_Fmode. From-SVN: r168919
2011-01-17rx: Remove rx_compare_redundant.Richard Henderson3-156/+1
To be replaced by the generic compare_elim pass, but we need to disable this before fiddling with the arrangement of the arithmetic instructions, as required by the generic pass. From-SVN: r168916
2011-01-17rx: Move SELECT_CC_MODE to function.Richard Henderson4-9/+34
Rewrite to look at comparison codes, not arithmetic codes. From-SVN: r168915
2011-01-17sparc.c (sparc_sr_alias_set): Don't define.Ian Lance Taylor1-19/+6
* config/sparc/sparc.c (sparc_sr_alias_set): Don't define. (struct_value_alias_set): Don't define. (sparc_option_override): Don't set sparc_sr_alias_set and struct_value_alias_set. (save_or_restore_regs): Use gen_frame_mem rather than calling set_mem_alias_set. (sparc_struct_value_rtx): Likewise. From-SVN: r168901
2011-01-17Correct mask operand for AVX mask load/store.H.J. Lu4-42/+42
gcc/ 2011-01-17 H.J. Lu <hongjiu.lu@intel.com> PR target/47318 * config/i386/avxintrin.h (_mm_maskload_pd): Change mask to __m128i. (_mm_maskstore_pd): Likewise. (_mm_maskload_ps): Likewise. (_mm_maskstore_ps): Likewise. (_mm256_maskload_pd): Change mask to __m256i. (_mm256_maskstore_pd): Likewise. (_mm256_maskload_ps): Likewise. (_mm256_maskstore_ps): Likewise. * config/i386/i386-builtin-types.def: Updated. (ix86_expand_special_args_builtin): Likewise. * config/i386/i386.c (bdesc_special_args): Update __builtin_ia32_maskloadpd, __builtin_ia32_maskloadps, __builtin_ia32_maskloadpd256, __builtin_ia32_maskloadps256, __builtin_ia32_maskstorepd, __builtin_ia32_maskstoreps, __builtin_ia32_maskstorepd256 and __builtin_ia32_maskstoreps256. * config/i386/sse.md (avx_maskload<ssemodesuffix><avxmodesuffix>): Use <avxpermvecmode> on mask register. (avx_maskstore<ssemodesuffix><avxmodesuffix>): Likewise. gcc/testsuite/ 2011-01-17 H.J. Lu <hongjiu.lu@intel.com> PR target/47318 * gcc.target/i386/avx-vmaskmovpd-1.c: New. * gcc.target/i386/avx-vmaskmovpd-2.c: Likewise. * gcc.target/i386/avx-vmaskmovps-1.c: Likewise. * gcc.target/i386/avx-vmaskmovps-1.c: Likewise. * gcc.target/i386/avx-vmaskmovpd-256-1.c (avx_test): Load mask as __m256i. * gcc.target/i386/avx-vmaskmovpd-256-2.c (avx_test): Likewise. * gcc.target/i386/avx-vmaskmovps-256-1.c (avx_test): Likewise. * gcc.target/i386/avx-vmaskmovps-256-2.c (avx_test): Likewise. From-SVN: r168899
2011-01-16mips.c (mips_classify_symbol): Don't return SYMBOL_PC_RELATIVE for nonlocal ↵Richard Sandiford1-4/+7
labels. gcc/ * config/mips/mips.c (mips_classify_symbol): Don't return SYMBOL_PC_RELATIVE for nonlocal labels. From-SVN: r168874
2011-01-15* config/sparc/sol2-bi.h (CC1_SPEC): Fix typo.Eric Botcazou1-1/+1
From-SVN: r168845
2011-01-14i386.h (CC1_CPU_SPEC_1): Don't handle -msse5.Joseph Myers2-5/+7
* config/i386/i386.h (CC1_CPU_SPEC_1): Don't handle -msse5. * config/i386/i386.opt (msse5): New Alias. From-SVN: r168821
2011-01-14linux.h (CC1_SPEC): Remove %{sun4:} %{target:}.Joseph Myers4-13/+3
* config/sparc/linux.h (CC1_SPEC): Remove %{sun4:} %{target:}. * config/sparc/linux64.h (CC1_SPEC): Likewise. * config/sparc/netbsd-elf.h (CC1_SPEC32, CC1_SPEC64): Likewise. * config/sparc/sparc.h (CC1_SPEC): Likewise. From-SVN: r168820
2011-01-14linux.h (CC1_SPEC): Don't handle old equivalents of -mcpu options.Joseph Myers6-62/+15
* config/sparc/linux.h (CC1_SPEC): Don't handle old equivalents of -mcpu options. * config/sparc/linux64.h (CC1_SPEC): Likewise. * config/sparc/netbsd-elf.h (CC1_SPEC32, CC1_SPEC64): Likewise. * config/sparc/sol2-bi.h (CPP_CPU_SPEC, CC1_SPEC): Likewise. * config/sparc/sparc.h (CPP_CPU_SPEC, CC1_SPEC, ASM_CPU_SPEC): Likewise. * config/sparc/t-elf (MULTILIB_MATCHES): Don't handle -mv8. From-SVN: r168819
2011-01-14vxworks.h (CC1_SPEC): Don't handle -fvec or -fvec-eabi.Joseph Myers1-3/+2
* config/rs6000/vxworks.h (CC1_SPEC): Don't handle -fvec or -fvec-eabi. From-SVN: r168818
2011-01-14alpha.md (umk_mismatch_args): Don't put a mode on set.Mike Stump4-94/+94
* config/alpha/alpha.md (umk_mismatch_args): Don't put a mode on set. * config/fr30/fr30.md: Likweise (movsi_push): Likewise. (movsi_pop): Likewise. (enter_func): Likewise. * config/moxie/moxie.md (movsi_push): Likewise. (movsi_pop): Likewise. From-SVN: r168817
2011-01-14linux64.h (LINK_SPEC): Remove %{bestGnum} %{no_archive} %{exact_version}.Joseph Myers6-15/+11
* config/mips/linux64.h (LINK_SPEC): Remove %{bestGnum} %{no_archive} %{exact_version}. * config/mips/mips.h (LINK_SPEC): Remove %{bestGnum}. * config/mips/netbsd.h (LINK_SPEC): Remove %{bestGnum} %{no_archive} %{exact_version}. * config/mips/openbsd.h (LINK_SPEC): Likewise. * config/mips/sde.h (LINK_SPEC): Remove %{bestGnum}. * config/mips/vxworks.h: Likewise. From-SVN: r168813
2011-01-14microblaze.h (ASM_SPEC): Remove %{microblaze1}.Joseph Myers1-1/+0
* config/microblaze/microblaze.h (ASM_SPEC): Remove %{microblaze1}. From-SVN: r168812
2011-01-14little.h (CPP_ENDIAN_SPEC, [...]): Remove.Joseph Myers1-13/+1
* config/m32r/little.h (CPP_ENDIAN_SPEC, CC1_ENDIAN_SPEC, ASM_ENDIAN_SPEC, LINK_ENDIAN_SPEC): Remove. From-SVN: r168810
2011-01-14nwld.h (LINK_SPEC): Check -nodefaultlibs not -nodefaultlib.Joseph Myers1-2/+2
* config/i386/nwld.h (LINK_SPEC): Check -nodefaultlibs not -nodefaultlib. From-SVN: r168809
2011-01-14cris.h (ASM_SPEC, [...]): Check for mcpu not cpu.Joseph Myers2-19/+13
* config/cris/cris.h (ASM_SPEC, CRIS_ASM_SUBTARGET_SPEC): Check for mcpu not cpu. * config/cris/linux.h (CRIS_CPP_SUBTARGET_SPEC, CRIS_CC1_SUBTARGET_SPEC, CRIS_ASM_SUBTARGET_SPEC): Check for mcpu not cpu. (CRIS_LINK_SUBTARGET_SPEC): Don't generate -rpath-link options. Don't handle -shlib. From-SVN: r168808
2011-01-14avr.h (CPP_SPEC): Don't handle -posix.Joseph Myers1-3/+3
* config/avr/avr.h (CPP_SPEC): Don't handle -posix. (CC1_SPEC): Don't handle -profile. From-SVN: r168807
2011-01-14microblaze.h (CC1_SPEC): Remove -gline spec.Joseph Myers2-2/+1
* config/microblaze/microblaze.h (CC1_SPEC): Remove -gline spec. * config/mips/mips.h (CC1_SPEC): Likewise. From-SVN: r168805
2011-01-14microblaze.h (CC1_SPEC): Remove %{save-temps: }.Joseph Myers2-4/+2
* config/microblaze/microblaze.h (CC1_SPEC): Remove %{save-temps: }. * config/mips/mips.h (CC1_SPEC): Likewise. From-SVN: r168803
2011-01-14linux.h (LINK_SPEC): Don't use %{!ibcs:} conditional.Joseph Myers7-59/+50
* config/i386/linux.h (LINK_SPEC): Don't use %{!ibcs:} conditional. * config/m32r/linux.h (LINK_SPEC): Likewise. * config/mips/linux.h (LINK_SPEC): Likewise. * config/mips/linux64.h (LINK_SPEC): Likewise. * config/sparc/linux.h (LINK_SPEC): Likewise. * config/sparc/linux64.h (LINK_ARCH32_SPEC, LINK_ARCH64_SPEC, LINK_SPEC): Likewise. * config/xtensa/linux.h (LINK_SPEC): Likewise. From-SVN: r168802
2011-01-14linux-elf.h (LINUX_TARGET_LINK_SPEC): Remove %{version:-v}.Joseph Myers2-3/+3
* config/arm/linux-elf.h (LINUX_TARGET_LINK_SPEC): Remove %{version:-v}. * config/lm32/uclinux-elf.h (LINK_SPEC): Likewise. From-SVN: r168801
2011-01-14sp-elf.h (ASM_SPEC): Remove %{v:-V}.Joseph Myers2-4/+5
* config/sparc/sp-elf.h (ASM_SPEC): Remove %{v:-V}. * config/sparc/sp64-elf.h (ASM_SPEC): Likewise. From-SVN: r168799
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