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2024-03-19rs6000: Fix up setup_incoming_varargs [PR114175]Jakub Jelinek1-1/+2
2024-03-15Regenerate opt.urlsYunQiang Su1-1/+1
2024-03-07rs6000: Don't ICE when compiling the __builtin_vsx_splat_2di [PR113950]Jeevitha1-2/+2
2024-03-04Regenerate opt.urlsMark Wielaard1-3/+0
2024-02-21rs6000: Neuter option -mpower{8,9}-vector [PR109987]Kewen Lin6-81/+22
2024-02-21ipa: Convert lattices from pure array to vector (PR 113476)Martin Jambor1-0/+2
2024-01-30libgcc: Make heap trampoline support dynamic [PR113403].Iain Sandoe1-0/+3
2024-01-25rs6000: Enable block compare expand on P9 with m32 and mpowerpc64Haochen Gui1-5/+7
2024-01-12Darwin, powerpc: Fix bootstrap.Iain Sandoe1-1/+1
2024-01-12rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284]Ilya Leoshkevich1-0/+1
2024-01-09rs6000: Eliminate zext fed by vclzlsbb [PR111480]Kewen Lin1-23/+18
2024-01-09rs6000: Make copysign (x, -1) back to -abs (x) for IEEE128 float [PR112606]Kewen Lin1-1/+19
2024-01-05Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABELIlya Leoshkevich1-2/+2
2024-01-04Add generated .opt.urls filesDavid Malcolm7-0/+346
2024-01-03Update copyright years.Jakub Jelinek143-145/+145
2023-12-27rs6000: Clean up the pre-checkings of expand_block_compareHaochen Gui1-25/+10
2023-12-27rs6000: Call library for block memory compare when optimizing for sizeHaochen Gui1-0/+3
2023-12-27rs6000: Correct definition of macro of fixed point efficient unalignedHaochen Gui2-10/+9
2023-12-25rs6000: Change GPR2 to volatile & non-fixed register for function that does n...Jeevitha2-2/+6
2023-12-13rs6000: using pli for constant splittingJiufu Guo1-0/+7
2023-12-13rs6000: accurate num_insns_constant_gprJiufu Guo1-138/+146
2023-12-11rs6000: Guard fctid on PowerPC64 and PowerPC476Haochen Gui2-2/+4
2023-12-11rs6000: Enable lrint<mode>si2 on old archs with stfiwx enabledHaochen Gui1-1/+29
2023-12-05rs6000: Canonicalize copysign (x, -1) back to -abs (x) in the backend [PR112606]Jakub Jelinek1-1/+19
2023-12-05Restore build with GCC 4.8 to GCC 5Richard Sandiford1-1/+1
2023-12-05Allow targets to add USEs to asmsRichard Sandiford1-1/+2
2023-12-02Allow target attributes in non-gnu namespacesRichard Sandiford1-2/+11
2023-11-29rs6000: Fix up c-c++-common/builtin-classify-type-1.c failure [PR112725]Jakub Jelinek1-1/+2
2023-11-17rs6000: Fix regression cases caused 16-byte by pieces moveHaochen Gui1-0/+21
2023-11-17rs6000: Enable vector mode for by pieces equality compareHaochen Gui3-0/+57
2023-11-06rs6000: Consider inline asm as safe if no assembler complains [PR111828]Kewen Lin1-1/+4
2023-10-30rs6000: Change bitwise xor to an equality operator [PR106907]Jeevitha1-4/+4
2023-10-12PR111778, PowerPC: Do not depend on an undefined shiftMichael Meissner1-3/+26
2023-10-12rs6000: Make 32 bit stack_protect support prefixed insn [PR111367]Kewen Lin1-46/+27
2023-10-09rs6000: support 32bit inline lrintHaochen Gui1-1/+9
2023-10-09rs6000: enable SImode in FP register on P7Haochen Gui2-8/+9
2023-10-08rs6000: build constant via li/lis;rldicJiufu Guo1-1/+60
2023-10-08rs6000: build constant via li/lis;rldicl/rldicrJiufu Guo1-1/+60
2023-10-08rs6000: build constant via lis;rotldiJiufu Guo1-5/+37
2023-10-08rs6000: build constant via li;rotldiJiufu Guo1-6/+41
2023-10-07rs6000: use mtvsrws to move sf from si p9Jiufu Guo1-6/+19
2023-10-07rs6000: optimize moving to sf from highpart diJiufu Guo2-5/+12
2023-10-02Replace UNSPEC_COPYSIGN with copysign RTLMichael Meissner3-20/+13
2023-09-25rs6000: Skip empty inline asm in rs6000_update_ipa_fn_target_info [PR111366]Kewen Lin1-3/+6
2023-09-25rs6000: Use default target option node for callee by default [PR111380]Kewen Lin1-35/+30
2023-09-19Disable generation of scalar modulo instructions.Pat Haugen3-6/+44
2023-09-17rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_indexAjit Kumar Agarwal1-3/+14
2023-09-04Darwin, ppc: Add system stubs for all 32b PPCIain Sandoe1-3/+3
2023-08-31rs6000: Don't allow AltiVec address in movoo & movxo pattern [PR110411]Jeevitha2-5/+5
2023-08-31rs6000: call vector load/store with length only on 64-bit Power10Haochen Gui1-4/+10