aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/rs6000/rs6000.c
AgeCommit message (Expand)AuthorFilesLines
2016-09-20rs6000.c (rs6000_expand_vector_init): For V4SF inits on power8 and above, use...Michael Meissner1-5/+20
2016-09-16re PR target/77613 (Powerpc64le: redundant swaps in autovectorised loop)Bill Schmidt1-1/+6
2016-09-01re PR target/72827 (gnat bootstrap broken on powerpc64le-linux-gnu)Bill Schmidt1-6/+10
2016-08-30rs6000: Don't emit a use of LR in returns and sibcallsSegher Boessenkool1-68/+48
2016-08-23rs6000.c (rs6000_expand_vector_init): Set initialization of all 0's to the 0 ...Michael Meissner1-21/+185
2016-08-19Implement C _FloatN, _FloatNx types.Joseph Myers1-4/+52
2016-08-12rs6000.c (rs6000_builtin_vectorization_cost): Correct costs for vec_construct.Bill Schmidt1-5/+9
2016-08-12re PR c/7652 (-Wswitch-break : Warn if a switch case falls through)Marek Polacek1-0/+3
2016-08-10altivec.h (vec_extract_exp): New macro.Kelvin Nilsen1-0/+24
2016-08-10re PR target/72853 (gcc/testsuite/gcc.c-torture/execute/20021120-1.c generate...Michael Meissner1-0/+3
2016-08-08[RS6000] TOC refs generated during reloadAlan Modra1-8/+12
2016-08-08[RS6000] PR72802 part 1, fix constraints for lxssp/stxsspAlan Modra1-2/+28
2016-08-05[RS6000] rs6000_preferred_reload_classAlan Modra1-19/+0
2016-08-03rs6000.c (rs6000_option_override_internal): Make LRA the default for the rs60...Peter Bergner1-0/+4
2016-08-03[RS6000] cost SLOW_UNALIGNED_ACCESSAlan Modra1-0/+5
2016-08-03[RS6000] Delete duplicate codeAlan Modra1-41/+17
2016-08-01rs6000-c.c (altivec_resolve_overloaded_builtin): Add support for vec_extract ...Michael Meissner1-3/+50
2016-07-30rs6000-protos.h (rs6000_adjust_vec_address): New function that takes a vector...Michael Meissner1-1/+171
2016-07-29re PR c/7652 (-Wswitch-break : Warn if a switch case falls through)Marek Polacek1-0/+2
2016-07-28rs6000-protos.h (rs6000_split_vec_extract_var): New declaration.Michael Meissner1-2/+119
2016-07-28merge adjust_cost and adjust_cost_2 target hooksTrevor Saunders1-7/+9
2016-07-27vector.md (vec_extract<mode>): Change the calling signature of rs6000_expand_...Michael Meissner1-13/+20
2016-07-27re PR target/71869 (__builtin_isgreater raises an invalid exception on PPC64 ...Michael Meissner1-22/+59
2016-07-26[RS6000] push_secondary_reload ICEAlan Modra1-0/+1
2016-07-22rs6000.c (rs6000_option_override_internal): Add comments to explain why certa...Kelvin Nilsen1-3/+19
2016-07-22Subject: [PATCH] rs6000: Fix logic for when to emit .machine (PR71216)Segher Boessenkool1-2/+2
2016-07-19re PR target/71493 (accidental ABI change for structure return on PowerPC)Michael Meissner1-1/+2
2016-07-14[RS6000] -mno-vsx should force -mno-power9-dformAlan Modra1-8/+8
2016-07-08re PR target/71806 (PowerPC -mcpu=power9 enables __float128 without an explic...Michael Meissner1-9/+12
2016-07-05rs6000-protos.h (rs6000_split_signbit): New prototype.Michael Meissner1-0/+42
2016-07-01re PR target/71698 (ICE related to decimal float when compiling with -mcpu=po...Peter Bergner1-2/+3
2016-06-30altivec.md (darn_32): Change the condition to TARGET_P9_MISC instead of TARGE...Kelvin Nilsen1-0/+27
2016-06-29predicates.md (const_0_to_7_operand): New predicate, recognize 0..7.Michael Meissner1-0/+24
2016-06-28rs6000.md ('type' attribute): Add htmsimple/dfp types.Pat Haugen1-35/+287
2016-06-28rs6000.md ('type' attribute): Add veclogical,veccmpfx,vecexts,vecmove insn ty...Pat Haugen1-1/+3
2016-06-27re PR target/71656 (ICE in reload when generating code for -mcpu=power9 -mpow...Peter Bergner1-53/+29
2016-06-24rs6000-builtin.def (BU_FLOAT128_2): New #define.Bill Schmidt1-1/+72
2016-06-23predicates.md (splat_input_operand): Rework.Michael Meissner1-15/+8
2016-06-15vsx.md (VSINT_84): Add DImode to enable loading DImode constants with XXSPLTI...Michael Meissner1-11/+45
2016-06-07This patch adds support for the missing versions of the vec_mul altivec...Bill Seurer1-0/+2
2016-05-26rs6000.c (rs6000_emit_p9_fp_minmax): New function for ISA 3.0 min/max support.Michael Meissner1-0/+107
2016-05-25This patch adds support for the vec_cmpne altivec builtins from the Power...Bill Seurer1-0/+6
2016-05-23re PR target/71201 (PowerPC XXPERM instruction fails on ISA 3.0 system.)Michael Meissner1-23/+39
2016-05-20This patch adds support for the signed and unsigned int versions of the...Bill Seurer1-0/+2
2016-05-19darn-0.c: New test.Kelvin Nilsen1-9/+134
2016-05-18re PR target/70915 (Improve loading 0/-1 in VSX registers on PowerPC)Michael Meissner1-22/+201
2016-05-11predicates.md (quad_memory_operand): Move most of the code into quad_address_...Michael Meissner1-104/+433
2016-05-11[RS6000] complex long double ABI_V4 fixAlan Modra1-20/+38
2016-05-10[RS6000] Stop regrename twiddling with split-stack prologueAlan Modra1-0/+5
2016-05-09rs6000.c (rs6000_reassociation_width): Add function for TARGET_SCHED_REASSOCI...Aaron Sawdey1-0/+37
generated by cgit v1.1 at 2024-10-31 21:10:52 +0000