riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-08-16	RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES}	Juzhe-Zhong	1	-0/+95
2023-08-15	RISC-V: Support RVV VFREC7 rounding mode intrinsic API	Pan Li	1	-3/+9
2023-08-10	RISC-V: Add missing modes to the iterators	Juzhe-Zhong	1	-0/+3
2023-08-08	RISC-V: Support VLS basic operation auto-vectorization	Juzhe-Zhong	1	-0/+93
2023-07-27	RISC-V: Enable basic VLS modes support	Juzhe-Zhong	1	-0/+476
2023-07-26	RISC-V: Fix vector tuple intrinsic	Li Xu	1	-0/+1
2023-07-20	RISC-V: Refactor RVV machine modes	Juzhe-Zhong	1	-1151/+1085
2023-07-18	RISC-V: Support basic floating-point dynamic rounding mode	Pan Li	1	-1/+3
2023-07-13	RISC-V: RISC-V: Support gather_load/scatter RVV auto-vectorization	Ju-Zhe Zhong	1	-19/+99
2023-07-05	RISC-V:Add float16 tuple type support	yulong	1	-0/+37
2023-06-29	RISC-V: Support vfadd static rounding mode by mode switching	Pan Li	1	-0/+2
2023-06-27	RISC-V: Add autovect widening/narrowing Integer/FP conversions.	Robin Dapp	1	-0/+8
2023-06-27	RISC-V: Add autovec FP widening/narrowing.	Robin Dapp	1	-0/+14
2023-06-27	RISC-V: Implement autovec copysign.	Robin Dapp	1	-7/+3
2023-06-27	RISC-V: Split VF iterators for Zvfh(min).	Robin Dapp	1	-23/+40
2023-06-25	Revert "RISC-V:Add float16 tuple type support"	Pan Li	1	-37/+0
2023-06-19	RISC-V: Fix VWEXTF iterator requirement	Li Xu	1	-6/+6
2023-06-19	RISC-V: Bugfix for RVV widenning reduction in ZVE32/64	Pan Li	1	-103/+0
2023-06-19	RISC-V: Bugfix for RVV float reduction in ZVE32/64	Pan Li	1	-84/+44
2023-06-19	RISC-V: Add autovec FP binary operations.	Robin Dapp	1	-0/+28
2023-06-19	RISC-V: Add sign-extending variants for vmv.x.s.	Robin Dapp	1	-0/+5
2023-06-18	RISC-V:Add float16 tuple type support	yulong	1	-0/+37
2023-06-17	RISC-V: Bugfix for RVV integer reduction in ZVE32/64.	Pan Li	1	-0/+61
2023-06-13	RISC-V: Fix V_WHOLE && V_FRACT iterator requirement	Juzhe-Zhong	1	-7/+10
2023-06-09	RISC-V: Refactor requirement of ZVFH and ZVFHMIN.	Pan Li	1	-10/+13
2023-06-06	RISC-V: Support RVV FP16 ZVFH Reduction floating-point intrinsic API	Pan Li	1	-0/+12
2023-06-06	RISC-V: Fix 'REQUIREMENT' for machine_mode 'MODE' in vector-iterators.md.	Li Xu	1	-13/+13
2023-06-06	RISC-V: Fix some typo in vector-iterators.md	Pan Li	1	-4/+4
2023-06-05	RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API	Pan Li	1	-0/+21
2023-06-04	RISC-V: Support RVV FP16 ZVFHMIN intrinsic API	Pan Li	1	-0/+10
2023-06-04	RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill	Pan Li	1	-0/+25
2023-05-30	RISC-V: Add floating-point to integer conversion RVV auto-vectorization support	Juzhe-Zhong	1	-0/+5
2023-05-26	RISC-V: Add autovec sign/zero extension and truncation.	Robin Dapp	1	-3/+30
2023-05-16	RISC-V: Add FRM and rounding mode operand into floating point intrinsics	Juzhe-Zhong	1	-3/+6
2023-05-12	RISC-V: Add basic vec_init for VLS RVV auto-vectorization	Juzhe Zhong	1	-0/+9
2023-05-11	RISC-V: Split off shift patterns for autovectorization.	Robin Dapp	1	-0/+4
2023-05-03	RISC-V: Support segment intrinsics	Ju-Zhe Zhong	1	-0/+280
2023-05-03	RISC-V: Add tuple types support	Ju-Zhe Zhong	1	-0/+186
2023-05-02	RISC-V: ICE for vlmul_ext_v intrinsic API	Yanzhang Wang	1	-1/+2
2023-04-24	RISC-V: Optimize fault only first load	Juzhe-Zhong	1	-0/+1
2023-04-19	RISC-V: Support 128 bit vector chunk	Juzhe-Zhong	1	-231/+340
2023-04-12	RISC-V: Fix supporting data type according to RVV ISA. [PR109479]	Ju-Zhe Zhong	1	-34/+34
2023-04-04	RISC-V: Fix typos	Li Xu	1	-2/+2
2023-03-23	RISC-V: Fix wrong RTL pattern for ternary instructions.	Ju-Zhe Zhong	1	-4/+4
2023-03-14	RISC-V: Fine tunning merge operand constraint	Ju-Zhe Zhong	1	-3/+3
2023-03-10	RISC-V: Add fault first load C/C++ support	Ju-Zhe Zhong	1	-0/+1
2023-03-10	RISC-V: Fine tune merge operand constraint for integer/load/store	Ju-Zhe Zhong	1	-38/+176
2023-03-05	RISC-V: Add RVV misc intrinsic support	Ju-Zhe Zhong	1	-0/+96
2023-03-05	RISC-V: Add permutation C/C++ support	Ju-Zhe Zhong	1	-0/+77
2023-03-05	RISC-V: Add scalar move support and fix VSETVL bugs	Ju-Zhe Zhong	1	-22/+22