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path: root/gcc/config/riscv/riscv-vsetvl.cc
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2024-11-22build: Remove INCLUDE_MEMORY [PR117737]Andrew Pinski1-1/+0
2024-11-13RISC-V: Bugfix for max_sew_overlap_and_next_ratio_valid_for_prev_sew_p[pr117483]xuli1-2/+9
2024-10-24Use unique_ptr in more places in pretty_printer/diagnostics [PR116613]David Malcolm1-0/+1
2024-09-12RISC-V: Eliminate latter vsetvl when fusedBohan Lei1-0/+3
2024-09-12RISC-V: Fix vl_used_by_non_rvv_insn logic of vsetvl passgarthlei1-5/+11
2024-07-25rtl-ssa: Define INCLUDE_ARRAYRichard Sandiford1-0/+1
2024-05-10RISC-V: Fix typos in code or comment [NFC]Kito Cheng1-32/+32
2024-02-19RISC-V: Suppress the vsetvl fusion for conflict successorsJuzhe-Zhong1-0/+25
2024-02-06RISC-V: Fix infinite compilation of VSETVL PASSJuzhe-Zhong1-5/+4
2024-02-02RISC-V: Remove vsetvl_pre bogus instructions in VSETVL PASSJuzhe-Zhong1-0/+64
2024-01-31RISC-V: Fix VSETLV PASS compile-time issueJuzhe-Zhong1-124/+60
2024-01-26RISC-V: Refine some codes of VSETVL PASS [NFC]Juzhe-Zhong1-42/+27
2024-01-26RISC-V: Fix incorrect LCM delete bug [VSETVL PASS]Juzhe-Zhong1-9/+10
2024-01-25RISC-V: Add LCM delete block predecessors dump informationJuzhe-Zhong1-0/+42
2024-01-25RISC-V: Remove redundant full available computation [NFC]Juzhe-Zhong1-34/+23
2024-01-25RISC-V: Add optim-no-fusion compile option [VSETVL PASS]Juzhe-Zhong1-10/+12
2024-01-24RISC-V: Fix large memory usage of VSETVL PASS [PR113495]Juzhe-Zhong1-182/+51
2024-01-19RISC-V: Fix RVV_VLMAXJuzhe-Zhong1-1/+1
2024-01-18RISC-V: Add has compatible check for conflict vsetvl fusionJuzhe-Zhong1-19/+24
2024-01-17RISC-V: fix some vsetvl debug info in pass's Phase 2 code [NFC]Vineet Gupta1-10/+10
2024-01-17RISC-V: RVV: add toggle to control vsetvl pass behaviorVineet Gupta1-1/+1
2024-01-07RISC-V: Use MAX instead of std::max [VSETVL PASS]Juzhe-Zhong1-2/+2
2024-01-06RISC-V: Update MAX_SEW for available vsevl info[VSETVL PASS]Juzhe-Zhong1-0/+17
2024-01-04RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]Juzhe-Zhong1-8/+35
2024-01-03Update copyright years.Jakub Jelinek1-1/+1
2023-12-21RISC-V: Fix bug of VSETVL fusionJuzhe-Zhong1-2/+39
2023-12-13RISC-V: Postpone full available optimization [VSETVL PASS]Juzhe-Zhong1-2/+12
2023-12-11RISC-V: Fix ICE in extract_single_sourceJuzhe-Zhong1-0/+2
2023-12-06RISC-V: Fix PR112888 ICEJuzhe-Zhong1-3/+9
2023-12-06RISC-V: Fix VSETVL PASS bugJuzhe-Zhong1-3/+63
2023-12-02RISC-V: Improve style to work around PR 60994 in host compiler.Roger Sayle1-13/+13
2023-12-01RISC-V: Fix VSETVL PASS regressionJuzhe-Zhong1-7/+6
2023-11-28RISC-V: Fix VSETVL PASS regressionJuzhe-Zhong1-9/+20
2023-11-15RISC-V: fix vsetvli pass testsuite failure [PR/112447]Juzhe-Zhong1-35/+35
2023-11-13RISC-V: vsetvl: Refine REG_EQUAL equality.Robin Dapp1-1/+5
2023-11-08RISC-V: Fix VSETVL VL check condition bugJuzhe-Zhong1-1/+1
2023-10-25RISC-V: Export some functions from riscv-vsetvl to riscv-v[NFC]Juzhe-Zhong1-70/+0
2023-10-25RISC-V: Change MD attribute avl_type into avl_type_idx[NFC]Juzhe-Zhong1-1/+1
2023-10-24RISC-V: Fix ICE of RTL CHECK on VSETVL PASS[PR111947]Juzhe-Zhong1-6/+9
2023-10-23RISC-V: Fix ICE for the fusion case from vsetvl to scalar move[PR111927]Juzhe-Zhong1-0/+23
2023-10-23RISC-V: Fix typo[VSETVL PASS]Juzhe-Zhong1-5/+5
2023-10-20RISC-V: Rename some variables of vector_block_info[NFC]Juzhe-Zhong1-28/+29
2023-10-20RISC-V: Refactor and cleanup vsetvl passLehua Ding1-3660/+2798
2023-09-30RISC-V: Use safe_grow_cleared for vector info [PR111649]Patrick O'Neill1-2/+2
2023-09-28RISC-V: Bugfix for RTL check[PR111533]xuli1-2/+1
2023-09-25RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548]Juzhe-Zhong1-10/+6
2023-09-20RISC-V: Fix Demand comparison bug[VSETVL PASS]Juzhe-Zhong1-4/+5
2023-09-18RISC-V: Fix VSETVL PASS fusion bugJuzhe-Zhong1-0/+8
2023-09-16RISC-V: Expand VLS mode to scalar mode move[PR111391]Juzhe-Zhong1-1/+3
2023-09-14RISC-V: Fix ICE in get_avl_or_vl_regJuzhe-Zhong1-11/+17