riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-12-07	Revert "RISC-V: Add const to function_shape::get_name [NFC]"	Kito Cheng	1	-68/+68
2024-12-05	RISC-V: Add const to function_shape::get_name [NFC]	Kito Cheng	1	-68/+68
2024-12-02	RISC-V: Add intrinsics support for SiFive Xsfvfnrclipxfqf extensions.	yulong	1	-0/+28
2024-11-29	RISC-V: Add intrinsics support for SiFive Xsfvqmaccqoq/dod extensions.	yulong	1	-0/+30
2024-10-25	gcc: Remove trailing whitespace	Jakub Jelinek	1	-1/+1
2024-07-15	RISC-V: Add Zvfbfmin and Zvfbfwma intrinsic	Feng Wang	1	-2/+29
2024-04-09	Fix up duplicated words mostly in comments, part 2	Jakub Jelinek	1	-1/+1
2024-04-08	RISC-V: Refine the error msg for RVV intrinisc required ext	Pan Li	1	-7/+11
2024-02-08	RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker	Pan Li	1	-4/+13
2024-01-18	RISC-V: Add support for xtheadvector-specific intrinsics.	Jun Sha (Joshua)	1	-0/+160
2024-01-18	RISC-V: Handle differences between XTheadvector and Vector	Jun Sha (Joshua)	1	-0/+23
2024-01-09	RISC-V: Add crypto vector builtin function.	Feng Wang	1	-1/+86
2024-01-05	Revert "RISC-V: Add crypto vector builtin function."	Pan Li	1	-86/+1
2024-01-05	RISC-V: Add crypto vector builtin function.	Feng Wang	1	-1/+86
2024-01-03	Update copyright years.	Jakub Jelinek	1	-1/+1
2023-11-06	RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic	xuli	1	-0/+1
2023-11-02	RISC-V: Support vcreate intrinsics for non-tuple types	xuli	1	-6/+19
2023-09-12	RISC-V: Add vcreate intrinsics for RVV tuple types	xuli	1	-0/+50
2023-08-17	RISC-V: Support RVV VFREDUSUM.VS rounding mode intrinsic API	Pan Li	1	-0/+39
2023-08-17	RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API	Pan Li	1	-0/+39
2023-08-02	RISC-V: Support RVV VFWADD rounding mode intrinsic API	Pan Li	1	-12/+54
2023-07-31	RISC-V: Bugfix for RVV floating-point rm suffix sequence	Pan Li	1	-5/+5
2023-07-24	RISC-V: Bugfix for allowing incorrect dyn for static rounding	Pan Li	1	-2/+1
2023-06-29	RISC-V: Allow rounding mode control for RVV floating-point add	Pan Li	1	-0/+68
2023-06-02	RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid	Juzhe-Zhong	1	-3/+2
2023-05-17	RISC-V: Introduce rounding mode operand into fixed-point intrinsics	Juzhe-Zhong	1	-0/+26
2023-05-03	RISC-V: Support segment intrinsics	Ju-Zhe Zhong	1	-0/+139
2023-03-23	RISC-V: Implement __riscv_vlenb PR109228	Ju-Zhe Zhong	1	-0/+25
2023-03-10	RISC-V: Add fault first load C/C++ support	Ju-Zhe Zhong	1	-0/+58
2023-03-05	RISC-V: Add RVV misc intrinsic support	Ju-Zhe Zhong	1	-6/+89
2023-03-05	RISC-V: Add scalar move support and fix VSETVL bugs	Ju-Zhe Zhong	1	-0/+17
2023-02-22	RISC-V: Add RVV reduction C/C++ intrinsics support	Ju-Zhe Zhong	1	-0/+29
2023-02-22	RISC-V: Add floating-point RVV C/C++ api	Ju-Zhe Zhong	1	-17/+7
2023-02-17	RISC-V: Add RVV all mask C/C++ intrinsics support	Ju-Zhe Zhong	1	-0/+38
2023-02-15	RISC-V: Add integer compare C/C++ intrinsic support	Ju-Zhe Zhong	1	-0/+2
2023-02-12	RISC-V: Add vnsrl/vnsra/vncvt/vmerge/vmv C/C++ support	Ju-Zhe Zhong	1	-0/+54
2023-02-12	RISC-V: Add vmadc/vmsbc C/C++ API support	Ju-Zhe Zhong	1	-0/+28
2023-02-12	RISC-V: Add vadc/vsbc C/C++ API support	Ju-Zhe Zhong	1	-0/+22
2023-02-12	RISC-V: Add integer widening instructions	Ju-Zhe Zhong	1	-1/+29
2023-02-12	RISC-V: Add vsext/vzext C/C++ intrinsic support	Ju-Zhe Zhong	1	-6/+15
2023-02-12	RISC-V: Add unary C/C++ API support	Ju-Zhe Zhong	1	-3/+3
2023-02-01	RISC-V: Add integer binary vv C/C++ API support	Ju-Zhe Zhong	1	-0/+25
2023-01-31	RISC-V: Add indexed loads/stores C/C++ intrinsic support	Ju-Zhe Zhong	1	-0/+49
2023-01-27	RISC-V: Fix vop_m overloaded C++ API name.	Ju-Zhe Zhong	1	-0/+4
2023-01-27	RISC-V: Add vlm/vsm C/C++ API intrinsics support	Ju-Zhe Zhong	1	-1/+2
2023-01-16	Update copyright years.	Jakub Jelinek	1	-1/+1
2022-12-23	RISC-V: Support vle.v/vse.v intrinsics	Ju-Zhe Zhong	1	-2/+36
2022-12-23	RISC-V: Update vsetvl/vsetvlmax intrinsics to the latest api name.	Ju-Zhe Zhong	1	-0/+1
2022-10-31	RISC-V: Change constexpr back to CONSTEXPR	Ju-Zhe Zhong	1	-1/+1
2022-10-24	RISC-V: Replace CONSTEXPR with constexpr	Ju-Zhe Zhong	1	-1/+1