| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2017-01-01 | Update copyright years. | Jakub Jelinek | 89 | -90/+90 | |
| From-SVN: r243994 | |||||
| 2016-12-06 | [MIPS][MSA] Fix builtins with literal integer arguments. | Robert Suchanek | 1 | -22/+61 | |
| gcc/ * config/mips/mips.c (mips_expand_builtin_insn): Check input ranges of literal integer arguments. gcc/testsuite/ * gcc.target/mips/msa-builtins-err.c: New test. From-SVN: r243301 | |||||
| 2016-11-25 | re PR ada/67205 (eliminate No_Implicit_Dynamic_Code restriction violations) | Eric Botcazou | 1 | -0/+4 | |
| PR ada/67205 * config/mips/mips.c (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): Define. From-SVN: r242868 | |||||
| 2016-11-16 | MIPS16/GCC: Emit explicit JRC from `casesi_internal_mips16_<mode>' insn | Maciej W. Rozycki | 1 | -2/+8 | |
| gcc/ * config/mips/mips.md (casesi_internal_mips16_<mode>): Explicitly switch between JR and JRC for the table jump. Adjust instruction count. From-SVN: r242517 | |||||
| 2016-11-16 | MIPS16/GCC: Improve `casesi_internal_mips16_<mode>'s instruction count estimate | Maciej W. Rozycki | 1 | -1/+1 | |
| gcc/ * config/mips/mips.md (casesi_internal_mips16_<mode>): Set `insn_count' to 11 rather than 16. From-SVN: r242516 | |||||
| 2016-11-16 | MIPS16/GCC: Correct `casesi_internal_mips16_<mode>'s RTL pattern | Maciej W. Rozycki | 1 | -1/+1 | |
| gcc/ * config/mips/mips.md (casesi_internal_mips16_<mode>): Use the `ltu' rather than `leu' operation in the RTL pattern From-SVN: r242515 | |||||
| 2016-11-16 | MIPS16/GCC: Fix DImode `casesi_internal_mips16_<mode>' assembly instructions | Maciej W. Rozycki | 1 | -6/+6 | |
| gcc/ * config/mips/mips.md (casesi_internal_mips16_<mode>): Add missing <d> instruction prefixes throughout. Correct formatting. gcc/testsuite/ * gcc.target/mips/code-readable-4.c (dg-final): Expect `dla' rather than `la'. From-SVN: r242514 | |||||
| 2016-11-16 | microMIPS/GCC: Fix PIC call relaxation | Maciej W. Rozycki | 1 | -6/+3 | |
| gcc/ * config/mips/mips.c (mips_output_jump): Output R_MICROMIPS_JALR rather than R_MIPS_JALR relocation in microMIPS code. Do not cancel short delay slots in PIC call relaxation. gcc/testsuite/ * gcc.target/mips/call-1.c (dg-options): Add `-mno-micromips'. (dg-final): Remove microMIPS JALRS mnemonic matching. * gcc.target/mips/call-2.c (dg-options): Add `-mno-micromips'. (dg-final): Remove microMIPS JALRS mnemonic matching. * gcc.target/mips/call-3.c (dg-options): Add `-mno-micromips'. (dg-final): Remove microMIPS JALRS mnemonic matching. * gcc.target/mips/call-4.c (dg-options): Add `-mno-micromips'. * gcc.target/mips/call-5.c (dg-options): Add `-mno-micromips'. * gcc.target/mips/call-6.c (dg-options): Add `-mno-micromips'. * gcc.target/mips/call-1u.c: New test case. * gcc.target/mips/call-2u.c: New test case. * gcc.target/mips/call-3u.c: New test case. * gcc.target/mips/call-4u.c: New test case. * gcc.target/mips/call-5u.c: New test case. * gcc.target/mips/call-6u.c: New test case. From-SVN: r242512 | |||||
| 2016-11-16 | MIPS/GCC: Mark text contents as code or data | Maciej W. Rozycki | 4 | -5/+104 | |
| gcc/ * config/mips/mips-protos.h (mips_set_text_contents_type): New prototype. * config/mips/mips.h (ASM_OUTPUT_BEFORE_CASE_LABEL): New macro. (ASM_OUTPUT_CASE_END): Likewise. * config/mips/mips.c (mips_set_text_contents_type): New function. (mips16_emit_constants): Record the pool's initial label number with the `consttable' insn. Emit a `consttable_end' insn at the end. (mips_final_prescan_insn): Call `mips_set_text_contents_type' for `consttable' insns. (mips_final_postscan_insn): Call `mips_set_text_contents_type' for `consttable_end' insns. * config/mips/mips.md (unspec): Add UNSPEC_CONSTTABLE_END enum value. (consttable): Add operand. (consttable_end): New insn. gcc/testsuite/ * gcc.target/mips/data-sym-jump.c: New test case. * gcc.target/mips/data-sym-pool.c: New test case. * gcc.target/mips/insn-pseudo-4.c: Adjust for constant pool annotation. From-SVN: r242502 | |||||
| 2016-11-15 | Fix instances of gen_rtx_REG (VOIDmode, ...) | Richard Sandiford | 1 | -1/+1 | |
| Several definitions of INCOMING_RETURN_ADDR_RTX used gen_rtx_REG (VOIDmode, ...), which with later patches would trip an assert. This patch converts them to use Pmode instead. gcc/ 2016-11-15 Richard Sandiford <richard.sandiford@arm.com> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> * config/i386/i386.h (INCOMING_RETURN_ADDR_RTX): Use Pmode instead of VOIDmode. * config/ia64/ia64.h (INCOMING_RETURN_ADDR_RTX): Likewise. * config/iq2000/iq2000.h (INCOMING_RETURN_ADDR_RTX): Likewise. * config/m68k/m68k.h (INCOMING_RETURN_ADDR_RTX): Likewise. * config/microblaze/microblaze.h (INCOMING_RETURN_ADDR_RTX): Likewise. * config/mips/mips.h (INCOMING_RETURN_ADDR_RTX): Likewise. * config/mn10300/mn10300.h (INCOMING_RETURN_ADDR_RTX): Likewise. * config/nios2/nios2.h (INCOMING_RETURN_ADDR_RTX): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r242447 | |||||
| 2016-11-15 | MIPS/GCC: Mark trailing labels with `.insn' | Maciej W. Rozycki | 2 | -0/+62 | |
| gcc/ * config/mips/mips.c (mips16_emit_constants): Emit `consttable' insn at the beginning of the constant pool. (mips_insert_insn_pseudos): New function. (mips_machine_reorg2): Call it. * config/mips/mips.md (unspec): Add UNSPEC_CONSTTABLE and UNSPEC_INSN_PSEUDO enum values. (insn_pseudo, consttable): New insns. gcc/testsuite/ * gcc.target/mips/insn-casesi.c: New test case. * gcc.target/mips/insn-pseudo-1.c: New test case. * gcc.target/mips/insn-pseudo-2.c: New test case. * gcc.target/mips/insn-pseudo-3.c: New test case. * gcc.target/mips/insn-pseudo-4.c: New test case. * gcc.target/mips/insn-tablejump.c: New test case. From-SVN: r242424 | |||||
| 2016-11-02 | split up some variables to use rtx_insn * more | Trevor Saunders | 1 | -28/+33 | |
| gcc/ChangeLog: 2016-11-01 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config/alpha/alpha.c (alpha_legitimize_address_1): Split up variables so some can be rtx_insn *. (alpha_emit_xfloating_libcall): Likewise. * config/mips/mips.c (mips_call_tls_get_addr): Likewise. (mips_legitimize_tls_address): Likewise. * optabs.c (expand_binop): Likewise. * reload1.c (gen_reload): Likewise. From-SVN: r241770 | |||||
| 2016-10-26 | mips.c (mips16_constant_cost): Add missing fallthru comments. | Jeff Law | 1 | -2/+4 | |
| * config/mips/mips.c (mips16_constant_cost): Add missing fallthru comments. (mips16_build_call_stub): Increase buffer size. Adjust fallthru comment. From-SVN: r241597 | |||||
| 2016-10-14 | mips.c (mips_prepare_pch_save): Initialize micromips_globals to zero. | Catherine Moore | 1 | -17/+19 | |
| 2016-10-13 Catherine Moore <clm@codesourcery.com> * gcc/config/mips/mips.c (mips_prepare_pch_save): Initialize micromips_globals to zero. From-SVN: r241165 | |||||
| 2016-10-11 | [MIPS] Disable -mbranch-likely for -Os when targetting generic arch | Robert Suchanek | 3 | -35/+52 | |
| gcc/ * config/mips/mips-cpus.def: Replace PTF_AVOID_BRANCHLIKELY with PTF_AVOID_BRANCHLIKELY_ALWAYS for generic architecture and with PTF_AVOID_BRANCHLIKELY_SPEED for others. (mips2, mips3, mips4): Add PTF_AVOID_BRANCHLIKELY_SIZE to tune flags. * config/mips/mips.c (mips_option_override): Enable the branch likely depending on the tune flags and optimization level. * config/mips/mips.h (PTF_AVOID_BRANCHLIKELY): Remove. (PTF_AVOID_BRANCHLIKELY_SPEED): Define. (PTF_AVOID_BRANCHLIKELY_SIZE): Likewise. (PTF_AVOID_BRANCHLIKELY_ALWAYS): Likewise. From-SVN: r240965 | |||||
| 2016-09-27 | MIPS/GCC/doc: Fix `d' constraint description | Maciej W. Rozycki | 1 | -2/+2 | |
| Revert a part of the `d' constraint documentation update made with commit 111868 ("Use define_constraint for MIPS"), <https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00460.html>, <https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00541.html>, which inadvertently made the registers covered to be referred to as "address" rather than "general-purpose" registers, and then further clarify the set of registers allowed with MIPS16 code. * config/mips/constraints.md (d): Fix documentation. * doc/md.texi (Machine Constraints): Update accordingly. From-SVN: r240546 | |||||
| 2016-09-26 | tree.h (memmodel_from_int, [...]): Move to ... | Thomas Preud'homme | 1 | -0/+1 | |
| 2016-09-26 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * tree.h (memmodel_from_int, memmodel_base, is_mm_relaxed, is_mm_consume, is_mm_acquire, is_mm_release, is_mm_acq_rel, is_mm_seq_cst, is_mm_sync): Move to ... * memmodel.h: This. New file. * builtins.c: Include memmodel.h. * optabs.c: Likewise. * tsan.c: Likewise. * config/aarch64/aarch64.c: Likewise. * config/alpha/alpha.c: Likewise. * config/arm/arm.c: Likewise. * config/i386/i386.c: Likewise. * config/ia64/ia64.c: Likewise. * config/mips/mips.c: Likewise. * config/rs6000/rs6000.c: Likewise. * config/sparc/sparc.c: Likewise. * genconditions.c: Include memmodel.h in generated file. * genemit.c: Likewise. * genoutput.c: Likewise. * genpeep.c: Likewise. * genpreds.c: Likewise. * genrecog.c: Likewise. gcc/c-family/ * c-common.c: Include memmodel.h. From-SVN: r240504 | |||||
| 2016-08-25 | [mips] Add support for mips*r6-*-musl | Szabolcs Nagy | 1 | -3/+6 | |
| gcc/ * config/mips/linux.h (MUSL_DYNAMIC_LINKER32): Update. (MUSL_DYNAMIC_LINKER64, MUSL_DYNAMIC_LINKERN32): Update. From-SVN: r239760 | |||||
| 2016-08-09 | MIPS: Use create_tmp_var_raw in mips_atomic_assign_expand_fenv | Matthew Fortune | 1 | -3/+3 | |
| gcc/ PR c/65345 * config/mips/mips.c (mips_atomic_assign_expand_fenv): Use create_tmp_var_raw instead of create_tmp_var. From-SVN: r239278 | |||||
| 2016-07-28 | merge adjust_cost and adjust_cost_2 target hooks | Trevor Saunders | 1 | -6/+2 | |
| gcc/ChangeLog: 2016-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config/alpha/alpha.c (alpha_adjust_cost): Adjust. * config/arm/arm-protos.h (struct tune_params): Likewise. * config/arm/arm.c (xscale_sched_adjust_cost): Likewise. (cortex_a9_sched_adjust_cost): Likewise. (fa726te_sched_adjust_cost): Likewise. (arm_adjust_cost): Likewise. * config/bfin/bfin.c (bfin_adjust_cost): Likewise. * config/c6x/c6x.c (c6x_adjust_cost): Likewise. * config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise. * config/i386/i386.c (ix86_adjust_cost): Likewise. * config/ia64/ia64.c: Likewise. * config/m68k/m68k.c: Likewise. * config/mep/mep.c (mep_adjust_cost): Likewise. * config/microblaze/microblaze.c (microblaze_adjust_cost): * Likewise. * config/mips/mips.c (mips_adjust_cost): Likewise. * config/mn10300/mn10300.c (mn10300_adjust_sched_cost): * Likewise. * config/pa/pa.c (pa_adjust_cost): Likewise. * config/rs6000/rs6000.c (rs6000_adjust_cost): Likewise. (rs6000_debug_adjust_cost): Likewise. * config/sh/sh.c (sh_adjust_cost): Likewise. * config/sparc/sparc.c (supersparc_adjust_cost): Likewise. (hypersparc_adjust_cost): Likewise. (sparc_adjust_cost): Likewise. * config/spu/spu.c (spu_sched_adjust_cost): Likewise. * config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Likewise. * config/tilepro/tilepro.c (tilepro_sched_adjust_cost): * Likewise. * config/visium/visium.c (visium_adjust_cost): Likewise. * doc/tm.texi: Regenerate. * haifa-sched.c (dep_cost_1): Adjust. * target.def: Merge adjust_cost and adjust_cost_2. From-SVN: r238814 | |||||
| 2016-07-11 | Convert TYPE_ALIGN_OK to a TYPE_LANG_FLAG. | Bernd Edlinger | 1 | -1/+1 | |
| 2016-07-11 Bernd Edlinger <bernd.edlinger@hotmail.de> Convert TYPE_ALIGN_OK to a TYPE_LANG_FLAG. * tree-core.h (tree_base::nothrow_flag): Adjust comment. (tree_type_common::lang_flag_7): New. (tree_type_common::spare): Reduce size. * tree.h (TYPE_ALIGN_OK): Remove. (TYPE_LANG_FLAG_7): New. (get_inner_reference): Adjust header. * print-tree.c (print_node): Adjust. * expr.c (get_inner_reference): Remove parameter keep_aligning. (get_bit_range, expand_assignment, expand_expr_addr_expr_1): Adjust calls to get_inner_reference. (expand_expr_real_1): Adjust call to get_inner_reference. Remove handling of TYPE_ALIGN_OK. * builtins.c (get_object_alignment_2): Adjust call to get_inner_reference. Remove handling of VIEW_CONVERT_EXPR. * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove handling of TYPE_ALIGN_OK. * asan.c (instrument_derefs): Adjust calls to get_inner_reference. * cfgexpand.c (expand_debug_expr): Likewise. * dbxout.c (dbxout_expand_expr): Likewise. * dwarf2out.c (loc_list_for_address_of_addr_expr_of_indirect_ref, loc_list_from_tree, fortran_common): Likewise. * fold-const.c (optimize_bit_field_compare, decode_field_reference, fold_unary_loc, fold_comparison, split_address_to_core_and_offset): Likewise. * gimple-laddress.c (execute): Likewise. * gimple-ssa-strength-reduction.c (slsr_process_ref): Likewise. * gimplify.c (gimplify_scan_omp_clauses): Likewise. * hsa-gen.c (gen_hsa_addr): Likewise. * simplifx-rtx.c (delegitimize_mem_from_attrs): Likewise. * tsan.c (instrument_expr): Likewise. * ubsan.c (instrument_bool_enum_load, instrument_object_size): Likewise. * tree.c (verify_type_variant): Remove handling of TYPE_ALIGN_OK. * tree-affine.c (tree_to_aff_combination, get_inner_reference_aff): Adjust calls to get_inner_reference. * tree-data-ref.c (split_constant_offset_1, dr_analyze_innermost): Likewise. * tree-scalar-evolution.c (interpret_rhs_expr): Likewise. * tree-sra.c (ipa_sra_check_caller): Likewise. * tree-ssa-loop-ivopts.c (split_address_cost): Likewise. * tree-ssa-math-opts.c (find_bswap_or_nop_load, bswap_replace): Likewise. * tree-vect-data-refs.c (vect_check_gather, vect_analyze_data_refs): Likewise. * config/mips/mips.c (r10k_safe_mem_expr_p): Likewise. * config/pa/pa.c (pa_emit_move_sequence): Remove handling of TYPE_ALIGN_OK. ada: 2016-07-11 Bernd Edlinger <bernd.edlinger@hotmail.de> Convert TYPE_ALIGN_OK to a TYPE_LANG_FLAG. * gcc-interface/ada-tree.h (TYPE_ALIGN_OK): Define. * gcc-interface/trans.c (Attribute_to_gnu): Adjust call to get_inner_reference. * gcc-interface/utils2.c (build_unary_op): Likewise. From-SVN: r238210 | |||||
| 2016-06-09 | MIPS: Stay within 79 columns in `mips_output_jump' | Maciej W. Rozycki | 1 | -2/+3 | |
| gcc/ * config/mips/mips.c (mips_output_jump): Fix formatting. From-SVN: r237267 | |||||
| 2016-06-07 | [MIPS] P5600 scheduler fix | Simon Dardis | 1 | -2/+2 | |
| gcc/ * config/mips/p5600.md (p5600_fpu_fadd): Remove checking for `fabs' and `fneg' type attributes. (p5600_fpu_fabs): Add `fmove' to the comment. Co-Authored-By: Prachi Godbole <prachi.godbole@imgtec.com> From-SVN: r237173 | |||||
| 2016-05-16 | Enable LSA/DLSA for MSA. | Robert Suchanek | 1 | -2/+4 | |
| * config/mips/mips.h (ISA_HAS_LSA): Enable for -mmsa. (ISA_HAS_DLSA): Ditto. From-SVN: r236289 | |||||
| 2016-05-16 | Correct the latency of loads in M5100 | Matthew Fortune | 1 | -1/+1 | |
| gcc/ * config/mips/m5100.md (m51_int_load): Update the latency to 2. From-SVN: r236288 | |||||
| 2016-05-16 | Fix multi-line brackets in mips-cpus.def | Matthew Fortune | 1 | -2/+2 | |
| gcc/ * config/mips/mips-cpus.def (p5600): Add multi-line brackets. From-SVN: r236284 | |||||
| 2016-05-09 | Add pipeline description for MSA. | Prachi Godbole | 2 | -4/+292 | |
| gcc/ * config/mips/i6400.md (i6400_fpu_intadd, i6400_fpu_logic) (i6400_fpu_div, i6400_fpu_cmp, i6400_fpu_float, i6400_fpu_store) (i6400_fpu_long_pipe, i6400_fpu_logic_l, i6400_fpu_float_l) (i6400_fpu_mult): New cpu units. (i6400_msa_add_d, i6400_msa_int_add, i6400_msa_short_logic3) (i6400_msa_short_logic2, i6400_msa_short_logic, i6400_msa_move) (i6400_msa_cmp, i6400_msa_short_float2, i6400_msa_div_d) (i6400_msa_div_w, i6400_msa_div_h, i6400_msa_div_b) (i6400_msa_copy, i6400_msa_branch, i6400_fpu_msa_store) (i6400_fpu_msa_load, i6400_fpu_msa_move, i6400_msa_long_logic1) (i6400_msa_long_logic2, i6400_msa_mult, i6400_msa_long_float2) (i6400_msa_long_float4, i6400_msa_long_float5) (i6400_msa_long_float8, i6400_msa_fdiv_df) (i6400_msa_fdiv_sf): New reservations. * config/mips/p5600.md (p5600_fpu_intadd, p5600_fpu_cmp) (p5600_fpu_float, p5600_fpu_logic_a, p5600_fpu_logic_b) (p5600_fpu_div, p5600_fpu_logic, p5600_fpu_float_a) (p5600_fpu_float_b, p5600_fpu_float_c, p5600_fpu_float_d) (p5600_fpu_mult, p5600_fpu_fdiv, p5600_fpu_load): New cpu units. (msa_short_int_add, msa_short_logic, msa_short_logic_move_v) (msa_short_cmp, msa_short_float2, msa_short_logic3) (msa_short_store4, msa_long_load, msa_short_store) (msa_long_logic, msa_long_float2, msa_long_float4) (msa_long_float5, msa_long_float8, msa_long_mult) (msa_long_fdiv, msa_long_div): New reservations. From-SVN: r236031 | |||||
| 2016-05-09 | Add support for MIPS SIMD Architecture (MSA). | Robert Suchanek | 13 | -67/+5998 | |
| gcc/ * config.gcc: Add MSA header file for mips*-*-* target. * config/mips/constraints.md (YI, YC, YZ, Unv5, Uuv5, Usv5, Uuv6) (Ubv8i, Urv8): New constraints. * config/mips/mips-ftypes.def: Add function types for MSA builtins. * config/mips/mips-modes.def (V16QI, V8HI, V4SI, V2DI, V4SF) (V2DF, V32QI, V16HI, V8SI, V4DI, V8SF, V4DF): New modes. * config/mips/mips-msa.md: New file. * config/mips/mips-protos.h (mips_split_128bit_const_insns): New prototype. (mips_msa_idiv_insns): Likewise. (mips_split_128bit_move): Likewise. (mips_split_128bit_move_p): Likewise. (mips_split_msa_copy_d): Likewise. (mips_split_msa_insert_d): Likewise. (mips_split_msa_fill_d): Likewise. (mips_expand_msa_branch): Likewise. (mips_const_vector_same_val_p): Likewise. (mips_const_vector_same_bytes_p): Likewise. (mips_const_vector_same_int_p): Likewise. (mips_const_vector_shuffle_set_p): Likewise. (mips_const_vector_bitimm_set_p): Likewise. (mips_const_vector_bitimm_clr_p): Likewise. (mips_msa_vec_parallel_const_half): Likewise. (mips_msa_output_division): Likewise. (mips_ldst_scaled_shift): Likewise. (mips_expand_vec_cond_expr): Likewise. * config/mips/mips.c (enum mips_builtin_type): Add MIPS_BUILTIN_MSA_TEST_BRANCH. (mips_gen_const_int_vector_shuffle): New prototype. (mips_const_vector_bitimm_set_p): New function. (mips_const_vector_bitimm_clr_p): Likewise. (mips_const_vector_same_val_p): Likewise. (mips_const_vector_same_bytes_p): Likewise. (mips_const_vector_same_int_p): Likewise. (mips_const_vector_shuffle_set_p): Likewise. (mips_symbol_insns): Forbid loading symbols via immediate for MSA. (mips_valid_offset_p): Limit offset to 10-bit for MSA loads and stores. (mips_valid_lo_sum_p): Forbid loadings symbols via %lo(base) for MSA. (mips_lx_address_p): Add support load indexed address for MSA. (mips_address_insns): Add calculation of instructions needed for stores and loads for MSA. (mips_const_insns): Move CONST_DOUBLE below CONST_VECTOR. Handle CONST_VECTOR for MSA and let it fall through. (mips_ldst_scaled_shift): New function. (mips_subword_at_byte): Likewise. (mips_msa_idiv_insns): Likewise. (mips_legitimize_move): Validate MSA moves. (mips_rtx_costs): Add UNGE, UNGT, UNLE, UNLT cases. Add calculation of costs for MSA division. (mips_split_move_p): Check if MSA moves need splitting. (mips_split_move): Split MSA moves if necessary. (mips_split_128bit_move_p): New function. (mips_split_128bit_move): Likewise. (mips_split_msa_copy_d): Likewise. (mips_split_msa_insert_d): Likewise. (mips_split_msa_fill_d): Likewise. (mips_output_move): Handle MSA moves. (mips_expand_msa_branch): New function. (mips_print_operand): Add 'E', 'B', 'w', 'v' and 'V' modifiers. Reinstate 'y' modifier. (mips_file_start): Add MSA .gnu_attribute. (mips_hard_regno_mode_ok_p): Allow TImode and 128-bit vectors in FPRs. (mips_hard_regno_nregs): Always return 1 for MSA supported mode. (mips_class_max_nregs): Add register size for MSA supported mode. (mips_cannot_change_mode_class): Allow conversion between MSA vector modes and TImode. (mips_mode_ok_for_mov_fmt_p): Allow MSA to use move.v instruction. (mips_secondary_reload_class): Force MSA loads/stores via memory. (mips_preferred_simd_mode): Add preffered modes for MSA. (mips_vector_mode_supported_p): Add MSA supported modes. (mips_autovectorize_vector_sizes): New function. (mips_msa_output_division): Likewise. (MSA_BUILTIN, MIPS_BUILTIN_DIRECT_NO_TARGET) (MSA_NO_TARGET_BUILTIN, MSA_BUILTIN_TEST_BRANCH): New macros. (CODE_FOR_msa_adds_s_b, CODE_FOR_msa_adds_s_h) (CODE_FOR_msa_adds_s_w, CODE_FOR_msa_adds_s_d) (CODE_FOR_msa_adds_u_b, CODE_FOR_msa_adds_u_h) (CODE_FOR_msa_adds_u_w, CODE_FOR_msa_adds_u_du (CODE_FOR_msa_addv_b, CODE_FOR_msa_addv_h, CODE_FOR_msa_addv_w) (CODE_FOR_msa_addv_d, CODE_FOR_msa_and_v, CODE_FOR_msa_bmnz_v) (CODE_FOR_msa_bmnzi_b, CODE_FOR_msa_bmz_v, CODE_FOR_msa_bmzi_b) (CODE_FOR_msa_bnz_v, CODE_FOR_msa_bz_v, CODE_FOR_msa_bsel_v) (CODE_FOR_msa_bseli_b, CODE_FOR_msa_ceqi_h, CODE_FOR_msa_ceqi_w) (CODE_FOR_msa_ceqi_d, CODE_FOR_msa_clti_s_b) (CODE_FOR_msa_clti_s_h, CODE_FOR_msa_clti_s_w) (CODE_FOR_msa_clti_s_d, CODE_FOR_msa_clti_u_b) (CODE_FOR_msa_clti_u_h, CODE_FOR_msa_clti_u_w) (CODE_FOR_msa_clti_u_d, CODE_FOR_msa_clei_s_b) (CODE_FOR_msa_clei_s_h, CODE_FOR_msa_clei_s_w) (CODE_FOR_msa_clei_s_d, CODE_FOR_msa_clei_u_b) (CODE_FOR_msa_clei_u_h, CODE_FOR_msa_clei_u_w) (CODE_FOR_msa_clei_u_d, CODE_FOR_msa_div_s_b) (CODE_FOR_msa_div_s_h, CODE_FOR_msa_div_s_w) (CODE_FOR_msa_div_s_d, CODE_FOR_msa_div_u_b) (CODE_FOR_msa_div_u_h, CODE_FOR_msa_div_u_w) (CODE_FOR_msa_div_u_d, CODE_FOR_msa_fadd_w, CODE_FOR_msa_fadd_d) (CODE_FOR_msa_fexdo_w, CODE_FOR_msa_ftrunc_s_w) (CODE_FOR_msa_ftrunc_s_d, CODE_FOR_msa_ftrunc_u_w) (CODE_FOR_msa_ftrunc_u_d, CODE_FOR_msa_ffint_s_w) (CODE_FOR_msa_ffint_s_d, CODE_FOR_msa_ffint_u_w) (CODE_FOR_msa_ffint_u_d, CODE_FOR_msa_fsub_w) (CODE_FOR_msa_fsub_d, CODE_FOR_msa_fmsub_d, CODE_FOR_msa_fmadd_w) (CODE_FOR_msa_fmadd_d, CODE_FOR_msa_fmsub_w, CODE_FOR_msa_fmul_w) (CODE_FOR_msa_fmul_d, CODE_FOR_msa_fdiv_w, CODE_FOR_msa_fdiv_d) (CODE_FOR_msa_fmax_w, CODE_FOR_msa_fmax_d, CODE_FOR_msa_fmax_a_w) (CODE_FOR_msa_fmax_a_d, CODE_FOR_msa_fmin_w, CODE_FOR_msa_fmin_d) (CODE_FOR_msa_fmin_a_w, CODE_FOR_msa_fmin_a_d) (CODE_FOR_msa_fsqrt_w, CODE_FOR_msa_fsqrt_d) (CODE_FOR_msa_max_s_b, CODE_FOR_msa_max_s_h) (CODE_FOR_msa_max_s_w, CODE_FOR_msa_max_s_d) (CODE_FOR_msa_max_u_b, CODE_FOR_msa_max_u_h) (CODE_FOR_msa_max_u_w, CODE_FOR_msa_max_u_d) (CODE_FOR_msa_min_s_b, CODE_FOR_msa_min_s_h) (CODE_FOR_msa_min_s_w, CODE_FOR_msa_min_s_d) (CODE_FOR_msa_min_u_b, CODE_FOR_msa_min_u_h) (CODE_FOR_msa_min_u_w, CODE_FOR_msa_min_u_d) (CODE_FOR_msa_mod_s_b, CODE_FOR_msa_mod_s_h) (CODE_FOR_msa_mod_s_w, CODE_FOR_msa_mod_s_d) (CODE_FOR_msa_mod_u_b, CODE_FOR_msa_mod_u_h) (CODE_FOR_msa_mod_u_w, CODE_FOR_msa_mod_u_d) (CODE_FOR_msa_mod_s_b, CODE_FOR_msa_mod_s_h) (CODE_FOR_msa_mod_s_w, CODE_FOR_msa_mod_s_d) (CODE_FOR_msa_mod_u_b, CODE_FOR_msa_mod_u_h) (CODE_FOR_msa_mod_u_w, CODE_FOR_msa_mod_u_d) (CODE_FOR_msa_mulv_b, CODE_FOR_msa_mulv_h, CODE_FOR_msa_mulv_w) (CODE_FOR_msa_mulv_d, CODE_FOR_msa_nlzc_b, CODE_FOR_msa_nlzc_h) (CODE_FOR_msa_nlzc_w, CODE_FOR_msa_nlzc_d, CODE_FOR_msa_nor_v) (CODE_FOR_msa_or_v, CODE_FOR_msa_ori_b, CODE_FOR_msa_nori_b) (CODE_FOR_msa_pcnt_b, CODE_FOR_msa_pcnt_h, CODE_FOR_msa_pcnt_w) (CODE_FOR_msa_pcnt_d, CODE_FOR_msa_xor_v, CODE_FOR_msa_xori_b) (CODE_FOR_msa_sll_b, CODE_FOR_msa_sll_h, CODE_FOR_msa_sll_w) (CODE_FOR_msa_sll_d, CODE_FOR_msa_slli_b, CODE_FOR_msa_slli_h) (CODE_FOR_msa_slli_w, CODE_FOR_msa_slli_d, CODE_FOR_msa_sra_b) (CODE_FOR_msa_sra_h, CODE_FOR_msa_sra_w, CODE_FOR_msa_sra_d) (CODE_FOR_msa_srai_b, CODE_FOR_msa_srai_h, CODE_FOR_msa_srai_w) (CODE_FOR_msa_srai_d, CODE_FOR_msa_srl_b, CODE_FOR_msa_srl_h) (CODE_FOR_msa_srl_w, CODE_FOR_msa_srl_d, CODE_FOR_msa_srli_b) (CODE_FOR_msa_srli_h, CODE_FOR_msa_srli_w, CODE_FOR_msa_srli_d) (CODE_FOR_msa_subv_b, CODE_FOR_msa_subv_h, CODE_FOR_msa_subv_w) (CODE_FOR_msa_subv_d, CODE_FOR_msa_subvi_b, CODE_FOR_msa_subvi_h) (CODE_FOR_msa_subvi_w, CODE_FOR_msa_subvi_d, CODE_FOR_msa_move_v) (CODE_FOR_msa_vshf_b, CODE_FOR_msa_vshf_h, CODE_FOR_msa_vshf_w) (CODE_FOR_msa_vshf_d, CODE_FOR_msa_ilvod_d, CODE_FOR_msa_ilvev_d) (CODE_FOR_msa_pckod_d, CODE_FOR_msa_pckdev_d, CODE_FOR_msa_ldi_b) (CODE_FOR_msa_ldi_hi, CODE_FOR_msa_ldi_w) (CODE_FOR_msa_ldi_d): New code_aliasing macros. (mips_builtins): Add MSA sll_b, sll_h, sll_w, sll_d, slli_b, slli_h, slli_w, slli_d, sra_b, sra_h, sra_w, sra_d, srai_b, srai_h, srai_w, srai_d, srar_b, srar_h, srar_w, srar_d, srari_b, srari_h, srari_w, srari_d, srl_b, srl_h, srl_w, srl_d, srli_b, srli_h, srli_w, srli_d, srlr_b, srlr_h, srlr_w, srlr_d, srlri_b, srlri_h, srlri_w, srlri_d, bclr_b, bclr_h, bclr_w, bclr_d, bclri_b, bclri_h, bclri_w, bclri_d, bset_b, bset_h, bset_w, bset_d, bseti_b, bseti_h, bseti_w, bseti_d, bneg_b, bneg_h, bneg_w, bneg_d, bnegi_b, bnegi_h, bnegi_w, bnegi_d, binsl_b, binsl_h, binsl_w, binsl_d, binsli_b, binsli_h, binsli_w, binsli_d, binsr_b, binsr_h, binsr_w, binsr_d, binsri_b, binsri_h, binsri_w, binsri_d, addv_b, addv_h, addv_w, addv_d, addvi_b, addvi_h, addvi_w, addvi_d, subv_b, subv_h, subv_w, subv_d, subvi_b, subvi_h, subvi_w, subvi_d, max_s_b, max_s_h, max_s_w, max_s_d, maxi_s_b, maxi_s_h, maxi_s_w, maxi_s_d, max_u_b, max_u_h, max_u_w, max_u_d, maxi_u_b, maxi_u_h, maxi_u_w, maxi_u_d, min_s_b, min_s_h, min_s_w, min_s_d, mini_s_b, mini_s_h, mini_s_w, mini_s_d, min_u_b, min_u_h, min_u_w, min_u_d, mini_u_b, mini_u_h, mini_u_w, mini_u_d, max_a_b, max_a_h, max_a_w, max_a_d, min_a_b, min_a_h, min_a_w, min_a_d, ceq_b, ceq_h, ceq_w, ceq_d, ceqi_b, ceqi_h, ceqi_w, ceqi_d, clt_s_b, clt_s_h, clt_s_w, clt_s_d, clti_s_b, clti_s_h, clti_s_w, clti_s_d, clt_u_b, clt_u_h, clt_u_w, clt_u_d, clti_u_b, clti_u_h, clti_u_w, clti_u_d, cle_s_b, cle_s_h, cle_s_w, cle_s_d, clei_s_b, clei_s_h, clei_s_w, clei_s_d, cle_u_b, cle_u_h, cle_u_w, cle_u_d, clei_u_b, clei_u_h, clei_u_w, clei_u_d, ld_b, ld_h, ld_w, ld_d, st_b, st_h, st_w, st_d, sat_s_b, sat_s_h, sat_s_w, sat_s_d, sat_u_b, sat_u_h, sat_u_w, sat_u_d, add_a_b, add_a_h, add_a_w, add_a_d, adds_a_b, adds_a_h, adds_a_w, adds_a_d, adds_s_b, adds_s_h, adds_s_w, adds_s_d, adds_u_b, adds_u_h, adds_u_w, adds_u_d, ave_s_b, ave_s_h, ave_s_w, ave_s_d, ave_u_b, ave_u_h, ave_u_w, ave_u_d, aver_s_b, aver_s_h, aver_s_w, aver_s_d, aver_u_b, aver_u_h, aver_u_w, aver_u_d, subs_s_b, subs_s_h, subs_s_w, subs_s_d, subs_u_b, subs_u_h, subs_u_w, subs_u_d, subsuu_s_b, subsuu_s_h, subsuu_s_w, subsuu_s_d, subsus_u_b, subsus_u_h, subsus_u_w, subsus_u_d, asub_s_b, asub_s_h, asub_s_w, asub_s_d, asub_u_b, asub_u_h, asub_u_w, asub_u_d, mulv_b, mulv_h, mulv_w, mulv_d, maddv_b, maddv_h, maddv_w, maddv_d, msubv_b, msubv_h, msubv_w, msubv_d, div_s_b, div_s_h, div_s_w, div_s_d, div_u_b, div_u_h, div_u_w, div_u_d, hadd_s_h, hadd_s_w, hadd_s_d, hadd_u_h, hadd_u_w, hadd_u_d, hsub_s_h, hsub_s_w, hsub_s_d, hsub_u_h, hsub_u_w, hsub_u_d, mod_s_b, mod_s_h, mod_s_w, mod_s_d, mod_u_b, mod_u_h, mod_u_w, mod_u_d, dotp_s_h, dotp_s_w, dotp_s_d, dotp_u_h, dotp_u_w, dotp_u_d, dpadd_s_h, dpadd_s_w, dpadd_s_d, dpadd_u_h, dpadd_u_w, dpadd_u_d, dpsub_s_h, dpsub_s_w, dpsub_s_d, dpsub_u_h, dpsub_u_w, dpsub_u_d, sld_b, sld_h, sld_w, sld_d, sldi_b, sldi_h, sldi_w, sldi_d, splat_b, splat_h, splat_w, splat_d, splati_b, splati_h, splati_w, splati_d, pckev_b, pckev_h, pckev_w, pckev_d, pckod_b, pckod_h, pckod_w, pckod_d, ilvl_b, ilvl_h, ilvl_w, ilvl_d, ilvr_b, ilvr_h, ilvr_w, ilvr_d, ilvev_b, ilvev_h, ilvev_w, ilvev_d, ilvod_b, ilvod_h, ilvod_w, ilvod_d, vshf_b, vshf_h, vshf_w, vshf_d, and_v, andi_b, or_v, ori_b, nor_v, nori_b, xor_v, xori_b, bmnz_v, bmnzi_b, bmz_v, bmzi_b, bsel_v, bseli_b, shf_b, shf_h, shf_w, bnz_v, bz_v, fill_b, fill_h, fill_w, fill_d, pcnt_b, pcnt_h, pcnt_w, pcnt_d, nloc_b, nloc_h, nloc_w, nloc_d, nlzc_b, nlzc_h, nlzc_w, nlzc_d, copy_s_b, copy_s_h, copy_s_w, copy_s_d, copy_u_b, copy_u_h, copy_u_w, copy_u_d, insert_b, insert_h, insert_w, insert_d, insve_b, insve_h, insve_w, insve_d, bnz_b, bnz_h, bnz_w, bnz_d, bz_b, bz_h, bz_w, bz_d, ldi_b, ldi_h, ldi_w, ldi_d, fcaf_w, fcaf_d, fcor_w, fcor_d, fcun_w, fcun_d, fcune_w, fcune_d, fcueq_w, fcueq_d, fceq_w, fceq_d, fcne_w, fcne_d, fclt_w, fclt_d, fcult_w, fcult_d, fcle_w, fcle_d, fcule_w, fcule_d, fsaf_w, fsaf_d, fsor_w, fsor_d, fsun_w, fsun_d, fsune_w, fsune_d, fsueq_w, fsueq_d, fseq_w, fseq_d, fsne_w, fsne_d, fslt_w, fslt_d, fsult_w, fsult_d, fsle_w, fsle_d, fsule_w, fsule_d, fadd_w, fadd_d, fsub_w, fsub_d, fmul_w, fmul_d, fdiv_w, fdiv_d, fmadd_w, fmadd_d, fmsub_w, fmsub_d, fexp2_w, fexp2_d, fexdo_h, fexdo_w, ftq_h, ftq_w, fmin_w, fmin_d, fmin_a_w, fmin_a_d, fmax_w, fmax_d, fmax_a_w, fmax_a_d, mul_q_h, mul_q_w, mulr_q_h, mulr_q_w, madd_q_h, madd_q_w, maddr_q_h, maddr_q_w, msub_q_h, msub_q_w, msubr_q_h, msubr_q_w, fclass_w, fclass_d, fsqrt_w, fsqrt_d, frcp_w, frcp_d, frint_w, frint_d, frsqrt_w, frsqrt_d, flog2_w, flog2_d, fexupl_w, fexupl_d, fexupr_w, fexupr_d, ffql_w, ffql_d, ffqr_w, ffqr_d, ftint_s_w, ftint_s_d, ftint_u_w, ftint_u_d, ftrunc_s_w, ftrunc_s_d, ftrunc_u_w, ftrunc_u_d, ffint_s_w, ffint_s_d, ffint_u_w, ffint_u_d, ctcmsa, cfcmsa, move_v builtins. (mips_get_builtin_decl_index): New array. (MIPS_ATYPE_QI, MIPS_ATYPE_HI, MIPS_ATYPE_V2DI, MIPS_ATYPE_V4SI) (MIPS_ATYPE_V8HI, MIPS_ATYPE_V16QI, MIPS_ATYPE_V2DF) (MIPS_ATYPE_V4SF, MIPS_ATYPE_UV2DI, MIPS_ATYPE_UV4SI) (MIPS_ATYPE_UV8HI, MIPS_ATYPE_UV16QI): New. (mips_init_builtins): Initialize mips_get_builtin_decl_index array. (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define target hook. (mips_expand_builtin_insn): Prepare operands for CODE_FOR_msa_addvi_b, CODE_FOR_msa_addvi_h, CODE_FOR_msa_addvi_w, CODE_FOR_msa_addvi_d, CODE_FOR_msa_clti_u_b, CODE_FOR_msa_clti_u_h, CODE_FOR_msa_clti_u_w, CODE_FOR_msa_clti_u_d, CODE_FOR_msa_clei_u_b, CODE_FOR_msa_clei_u_h, CODE_FOR_msa_clei_u_w, CODE_FOR_msa_clei_u_d, CODE_FOR_msa_maxi_u_b, CODE_FOR_msa_maxi_u_h, CODE_FOR_msa_maxi_u_w, CODE_FOR_msa_maxi_u_d, CODE_FOR_msa_mini_u_b, CODE_FOR_msa_mini_u_h, CODE_FOR_msa_mini_u_w, CODE_FOR_msa_mini_u_d, CODE_FOR_msa_subvi_b, CODE_FOR_msa_subvi_h, CODE_FOR_msa_subvi_w, CODE_FOR_msa_subvi_d, CODE_FOR_msa_ceqi_b, CODE_FOR_msa_ceqi_h, CODE_FOR_msa_ceqi_w, CODE_FOR_msa_ceqi_d, CODE_FOR_msa_clti_s_b, CODE_FOR_msa_clti_s_h, CODE_FOR_msa_clti_s_w, CODE_FOR_msa_clti_s_d, CODE_FOR_msa_clei_s_b, CODE_FOR_msa_clei_s_h, CODE_FOR_msa_clei_s_w, CODE_FOR_msa_clei_s_d, CODE_FOR_msa_maxi_s_b, CODE_FOR_msa_maxi_s_h, CODE_FOR_msa_maxi_s_w, CODE_FOR_msa_maxi_s_d, CODE_FOR_msa_mini_s_b, CODE_FOR_msa_mini_s_h, CODE_FOR_msa_mini_s_w, CODE_FOR_msa_mini_s_d, CODE_FOR_msa_andi_b, CODE_FOR_msa_ori_b, CODE_FOR_msa_nori_b, CODE_FOR_msa_xori_b, CODE_FOR_msa_bmzi_b, CODE_FOR_msa_bmnzi_b, CODE_FOR_msa_bseli_b, CODE_FOR_msa_fill_b, CODE_FOR_msa_fill_h, CODE_FOR_msa_fill_w, CODE_FOR_msa_fill_d, CODE_FOR_msa_ilvl_b, CODE_FOR_msa_ilvl_h, CODE_FOR_msa_ilvl_w, CODE_FOR_msa_ilvl_d, CODE_FOR_msa_ilvr_b, CODE_FOR_msa_ilvr_h, CODE_FOR_msa_ilvr_w, CODE_FOR_msa_ilvr_d, CODE_FOR_msa_ilvev_b, CODE_FOR_msa_ilvev_h, CODE_FOR_msa_ilvev_w, CODE_FOR_msa_ilvod_b, CODE_FOR_msa_ilvod_h, CODE_FOR_msa_ilvod_w, CODE_FOR_msa_pckev_b, CODE_FOR_msa_pckev_h, CODE_FOR_msa_pckev_w, CODE_FOR_msa_pckod_b, CODE_FOR_msa_pckod_h, CODE_FOR_msa_pckod_w, CODE_FOR_msa_slli_b, CODE_FOR_msa_slli_h, CODE_FOR_msa_slli_w, CODE_FOR_msa_slli_d, CODE_FOR_msa_srai_b, CODE_FOR_msa_srai_h, CODE_FOR_msa_srai_w, CODE_FOR_msa_srai_d, CODE_FOR_msa_srli_b, CODE_FOR_msa_srli_h, CODE_FOR_msa_srli_w, CODE_FOR_msa_srli_d, CODE_FOR_msa_insert_b, CODE_FOR_msa_insert_h, CODE_FOR_msa_insert_w, CODE_FOR_msa_insert_d, CODE_FOR_msa_insve_b, CODE_FOR_msa_insve_h, CODE_FOR_msa_insve_w, CODE_FOR_msa_insve_d, CODE_FOR_msa_shf_b, CODE_FOR_msa_shf_h, CODE_FOR_msa_shf_w, CODE_FOR_msa_shf_w_f, CODE_FOR_msa_vshf_b, CODE_FOR_msa_vshf_h, CODE_FOR_msa_vshf_w, CODE_FOR_msa_vshf_d. (mips_expand_builtin): Add case for MIPS_BULTIN_MSA_TEST_BRANCH. (mips_set_compression_mode): Disallow MSA with MIPS16 code. (mips_option_override): -mmsa requires -mfp64 and -mhard-float. These are set implicitly and an error is reported if overridden. (mips_expand_builtin_msa_test_branch): New function. (mips_expand_msa_shuffle): Likewise. (MAX_VECT_LEN): Increase maximum length of a vector to 16 bytes. (TARGET_SCHED_REASSOCIATION_WIDTH): Define target hook. (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Likewise. (mips_expand_vec_unpack): Add support for MSA. (mips_expand_vector_init): Likewise. (mips_expand_vi_constant): Use CONST0_RTX (element_mode) instead of const0_rtx. (mips_msa_vec_parallel_const_half): New function. (mips_gen_const_int_vector): Likewise. (mips_gen_const_int_vector_shuffle): Likewise. (mips_expand_msa_cmp): Likewise. (mips_expand_vec_cond_expr): Likewise. * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add __mips_msa and __mips_msa_width. (OPTION_DEFAULT_SPECS): Ignore --with-fp-32 if -mmsa is specified. (ASM_SPEC): Pass mmsa and mno-msa to the assembler. (ISA_HAS_MSA): New macro. (UNITS_PER_MSA_REG): Likewise. (BITS_PER_MSA_REG): Likewise. (BIGGEST_ALIGNMENT): Redefine using ISA_HAS_MSA. (MSA_REG_FIRST): New macro. (MSA_REG_LAST): Likewise. (MSA_REG_NUM): Likewise. (MSA_REG_P): Likewise. (MSA_REG_RTX_P): Likewise. (MSA_SUPPORTED_MODE_P): Likewise. (HARD_REGNO_CALL_PART_CLOBBERED): Redefine using TARGET_MSA. (ADDITIONAL_REGISTER_NAMES): Add named registers $w0-$w31. * config/mips/mips.md: Include mips-msa.md. (alu_type): Add simd_add. (mode): Add V2DI, V4SI, V8HI, V16QI, V2DF, V4SF. (type): Add simd_div, simd_fclass, simd_flog2, simd_fadd, simd_fcvt, simd_fmul, simd_fmadd, simd_fdiv, simd_bitins, simd_bitmov, simd_insert, simd_sld, simd_mul, simd_fcmp, simd_fexp2, simd_int_arith, simd_bit, simd_shift, simd_splat, simd_fill, simd_permute, simd_shf, simd_sat, simd_pcnt, simd_copy, simd_branch, simd_cmsa, simd_fminmax, simd_logic, simd_move, simd_load, simd_store. Choose "multi" for moves for "qword_mode". (qword_mode): New attribute. (insn_count): Add instruction count for quad moves. Increase the count for MIPS SIMD division. (UNITMODE): Add UNITMODEs for vector types. (addsub): New code iterator. * config/mips/mips.opt (mmsa): New option. * config/mips/msa.h: New file. * config/mips/mti-elf.h: Don't infer -mfpxx if -mmsa is specified. * config/mips/mti-linux.h: Likewise. * config/mips/predicates.md (const_msa_branch_operand): New constraint. (const_uimm3_operand): Likewise. (const_uimm4_operand): Likewise. (const_uimm5_operand): Likewise. (const_uimm8_operand): Likewise. (const_imm5_operand): Likewise. (aq10b_operand): Likewise. (aq10h_operand): Likewise. (aq10w_operand): Likewise. (aq10d_operand): Likewise. (const_m1_operand): Likewise. (reg_or_m1_operand): Likewise. (const_exp_2_operand): Likewise. (const_exp_4_operand): Likewise. (const_exp_8_operand): Likewise. (const_exp_16_operand): Likewise. (const_vector_same_val_operand): Likewise. (const_vector_same_simm5_operand): Likewise. (const_vector_same_uimm5_operand): Likewise. (const_vector_same_uimm6_operand): Likewise. (const_vector_same_uimm8_operand): Likewise. (par_const_vector_shf_set_operand): Likewise. (reg_or_vector_same_val_operand): Likewise. (reg_or_vector_same_simm5_operand): Likewise. (reg_or_vector_same_uimm6_operand): Likewise. * doc/extend.texi (MIPS SIMD Architecture Functions): New section. * doc/invoke.texi (-mmsa): Document new option. Co-Authored-By: Chao-ying Fu <chao-ying.fu@imgtec.com> Co-Authored-By: Graham Stott <graham.stott@imgtec.com> Co-Authored-By: Matthew Fortune <matthew.fortune@imgtec.com> Co-Authored-By: Sameera Deshpande <sameera.deshpande@imgtec.com> From-SVN: r236030 | |||||
| 2016-05-04 | Update MIPS P5600 processor definition to avoid IMADD | Matthew Fortune | 1 | -5/+3 | |
| gcc/ * config/mips/mips-cpus.def (p5600): Avoid IMADD by default. Clean up p5600 comments. From-SVN: r235873 | |||||
| 2016-04-18 | tree.h (TYPE_ALIGN, DECL_ALIGN): Return shifted amount. | Michael Matz | 1 | -1/+1 | |
| * tree.h (TYPE_ALIGN, DECL_ALIGN): Return shifted amount. (SET_TYPE_ALIGN, SET_DECL_ALIGN): New. * tree-core.h (tree_type_common.align): Use bit-field. (tree_type_common.spare): New. (tree_decl_common.off_align): Make smaller. (tree_decl_common.align): Use bit-field. * expr.c (expand_expr_addr_expr_1): Use SET_TYPE_ALIGN. * omp-low.c (install_var_field): Use SET_DECL_ALIGN. (scan_sharing_clauses): Ditto. (finish_taskreg_scan): Use SET_DECL_ALIGN and SET_TYPE_ALIGN. (omp_finish_file): Ditto. * stor-layout.c (do_type_align): Use SET_DECL_ALIGN. (layout_decl): Ditto. (relayout_decl): Ditto. (finalize_record_size): Use SET_TYPE_ALIGN. (finalize_type_size): Ditto. (finish_builtin_struct): Ditto. (layout_type): Ditto. (initialize_sizetypes): Ditto. * targhooks.c (std_gimplify_va_arg_expr): Use SET_TYPE_ALIGN. * tree-nested.c (insert_field_into_struct): Use SET_TYPE_ALIGN. (lookup_field_for_decl): Use SET_DECL_ALIGN. (get_chain_field): Ditto. (get_trampoline_type): Ditto. (get_nl_goto_field): Ditto. * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Use SET_DECL_ALIGN. (unpack_ts_type_common_value_fields): Use SET_TYPE_ALIGN. * gimple-expr.c (copy_var_decl): Use SET_DECL_ALIGN. * tree.c (make_node_stat): Use SET_DECL_ALIGN and SET_TYPE_ALIGN. (build_qualified_type): Use SET_TYPE_ALIGN. (build_aligned_type, build_range_type_1): Ditto. (build_atomic_base): Ditto. (build_common_tree_nodes): Ditto. * cfgexpand.c (align_local_variable): Use SET_DECL_ALIGN. (expand_one_stack_var_at): Ditto. * coverage.c (build_var): Use SET_DECL_ALIGN. * except.c (init_eh): Ditto. * function.c (assign_parm_setup_block): Ditto. * symtab.c (increase_alignment_1): Ditto. * tree-ssa-ccp.c (fold_builtin_alloca_with_align): Ditto. * tree-vect-stmts.c (ensure_base_align): Ditto. * varasm.c (align_variable): Ditto. (assemble_variable): Ditto. (build_constant_desc): Ditto. (output_constant_def_contents): Ditto. * config/arm/arm.c (arm_relayout_function): Use SET_DECL_ALIGN. * config/avr/avr.c (avr_adjust_type_node): Use SET_TYPE_ALIGN. * config/mips/mips.c (mips_std_gimplify_va_arg_expr): Ditto. * config/msp430/msp430.c (msp430_gimplify_va_arg_expr): Ditto. * config/spu/spu.c (spu_build_builtin_va_list): Use SET_DECL_ALIGN. ada/ * gcc-interface/decl.c (gnat_to_gnu_entity): Use SET_TYPE_ALIGN. (gnat_to_gnu_field): Ditto. (components_to_record): Ditto. (create_variant_part_from): Ditto. (copy_and_substitute_in_size): Ditto. (substitute_in_type): Ditto. * gcc-interface/utils.c (make_aligning_type): Use SET_TYPE_ALIGN. (make_packable_type): Ditto. (maybe_pad_type): Ditto. (finish_fat_pointer_type): Ditto. (finish_record_type): Ditto and use SET_DECL_ALIGN. (rest_of_record_type_compilation): Use SET_TYPE_ALIGN. (create_field_decl): Use SET_DECL_ALIGN. c-family/ * c-common.c (handle_aligned_attribute): Use SET_TYPE_ALIGN and SET_DECL_ALIGN. c/ * c-decl.c (merge_decls): Use SET_DECL_ALIGN and SET_TYPE_ALIGN. (grokdeclarator, parser_xref_tag, finish_enum): Use SET_TYPE_ALIGN. cp/ * class.c (build_vtable): Use SET_DECL_ALIGN and SET_TYPE_ALIGN. (layout_class_type): Ditto. (build_base_field): Use SET_DECL_ALIGN. (fixup_attribute_variants): Use SET_TYPE_ALIGN. * decl.c (duplicate_decls): Use SET_DECL_ALIGN. (record_unknown_type): Use SET_TYPE_ALIGN. (cxx_init_decl_processing): Ditto. (copy_type_enum): Ditto. (grokfndecl): Use SET_DECL_ALIGN. (copy_type_enum): Use SET_TYPE_ALIGN. * pt.c (instantiate_class_template_1): Use SET_TYPE_ALIGN. (tsubst): Ditto. * tree.c (cp_build_qualified_type_real): Use SET_TYPE_ALIGN. * lambda.c (maybe_add_lambda_conv_op): Use SET_DECL_ALIGN. * method.c (implicitly_declare_fn): Use SET_DECL_ALIGN. * rtti.c (emit_tinfo_decl): Ditto. fortran/ * trans-io.c (gfc_build_io_library_fndecls): Use SET_TYPE_ALIGN. * trans-common.c (build_common_decl): Use SET_DECL_ALIGN. * trans-types.c (gfc_add_field_to_struct): Use SET_DECL_ALIGN. go/ * go-gcc.cc (Gcc_backend::implicit_variable): Use SET_DECL_ALIGN. java/ * class.c (add_method_1): Use SET_DECL_ALIGN. (make_class_data): Ditto. (emit_register_classes_in_jcr_section): Ditto. * typeck.c (build_java_array_type): Ditto. objc/ * objc-act.c (objc_build_struct): Use SET_DECL_ALIGN. libcc1/ * plugin.cc (plugin_finish_record_or_union): Use SET_TYPE_ALIGN. From-SVN: r235172 | |||||
| 2016-02-12 | cgraph.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. | Jakub Jelinek | 1 | -2/+2 | |
| * cgraph.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * target.def: Likewise. * sel-sched.c: Likewise. * config/mips/mips.c: Likewise. * config/arc/arc.md: Likewise. * config/arm/cortex-a57.md: Likewise. * config/arm/arm.c: Likewise. * config/arm/neon.md: Likewise. * config/arm/arm-c.c: Likewise. * config/vms/vms-c.c: Likewise. * config/s390/s390.c: Likewise. * config/i386/znver1.md: Likewise. * config/i386/i386.c: Likewise. * config/ia64/hpux-unix2003.h: Likewise. * config/msp430/msp430.md: Likewise. * config/rx/rx.c: Likewise. * config/rx/rx.md: Likewise. * config/aarch64/aarch64-simd.md: Likewise. * config/aarch64/aarch64.c: Likewise. * config/nvptx/nvptx.c: Likewise. * config/bfin/bfin.c: Likewise. * config/cris/cris.opt: Likewise. * config/rs6000/rs6000.c: Likewise. * target.h: Likewise. * spellcheck.c: Likewise. * ira-build.c: Likewise. * tree-inline.c: Likewise. * builtins.c: Likewise. * lra-constraints.c: Likewise. * explow.c: Likewise. * hwint.h: Likewise. * targhooks.c: Likewise. * tree-vect-data-refs.c: Likewise. * expr.c: Likewise. * doc/tm.texi: Likewise. * doc/extend.texi: Likewise. * doc/install.texi: Likewise. * doc/md.texi: Likewise. * tree-ssa-tail-merge.c: Likewise. * sched-int.h: Likewise. * match.pd: Likewise. * sched-ebb.c: Likewise. * target.def (omit_struct_return_reg): Likewise. * gimple-ssa-isolate-paths.c: Likewise. (find_implicit_erroneous_behaviour): Renamed to... (find_implicit_erroneous_behavior): ... this. (find_explicit_erroneous_behaviour): Renamed to... (find_explicit_erroneous_behavior): ... this. (gimple_ssa_isolate_erroneous_paths): Adjust caller. gcc/cp/ * error.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * decl.c: Likewise. * typeck.c (cp_build_binary_op): Fix up behavior spelling in diagnostics. * init.c (build_delete): Likewise. gcc/objc/ * objc-act.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * objc-map.h: Likewise. gcc/go/ * gofrontend/lex.cc: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * gccgo.texi: Likewise. gcc/ada/ * prj-tree.ads: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * prep.adb: Likewise. * prj.ads: Likewise. * prepcomp.adb: Likewise. * g-socket.ads: Likewise. * s-imgrea.adb: Likewise. * a-calend.adb: Likewise. * exp_disp.adb: Likewise. * doc/gnat_ugn/gnat_utility_programs.rst: Likewise. * g-socket.adb: Likewise. * sem_ch12.adb: Likewise. * terminals.c: Likewise. gcc/testsuite/ * objc.dg/gnu-api-2-method.m: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * objc.dg/attributes/method-nonnull-1.m: Likewise. * objc.dg/gnu-api-2-class-meta.m: Likewise. * c-c++-common/Wvarargs.c: Likewise. * c-c++-common/goacc/host_data-5.c: Likewise. * obj-c++.dg/gnu-api-2-class-meta.mm: Likewise. * obj-c++.dg/attributes/method-nonnull-1.mm: Likewise. * obj-c++.dg/gnu-api-2-method.mm: Likewise. * gcc.target/aarch64/pr60697.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vqshl.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vrshl.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vqrshl.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vldX.c: Likewise. * gcc.target/aarch64/aapcs64/ice_2.c: Likewise. * gcc.target/aarch64/aapcs64/test_23.c: Likewise. * gcc.target/aarch64/vrnd_f64_1.c: Likewise. * g++.dg/warn/Wconversion-real-integer-3.C: Likewise. * g++.dg/lookup/koenig5.C: Likewise. * g++.dg/ext/no-asm-2.C: Likewise. * gfortran.dg/bounds_check_array_ctor_3.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_7.f90: Likewise. * gfortran.dg/used_types_16.f90: Likewise. * gfortran.dg/assumed_rank_bounds_1.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_1.f90: Likewise. * gfortran.dg/assumed_rank_bounds_2.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_4.f90: Likewise. * gfortran.dg/abstract_type_6.f03: Likewise. * gfortran.dg/bounds_check_array_ctor_5.f90: Likewise. * gfortran.dg/used_types_15.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_8.f90: Likewise. * gfortran.dg/exit_3.f08: Likewise. * gfortran.dg/open_status_2.f90: Likewise. * gfortran.dg/derived_pointer_recursion_2.f90: Likewise. * gfortran.dg/intrinsic_std_1.f90: Likewise. * gfortran.dg/associate_1.f03: Likewise. * gfortran.dg/bounds_check_array_ctor_2.f90: Likewise. * gfortran.dg/intrinsic_std_6.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_6.f90: Likewise. * gcc.dg/builtin-object-size-1.c: Likewise. * gcc.dg/noreturn-6.c: Likewise. * gcc.dg/builtin-stringop-chk-1.c: Likewise. * gcc.dg/globalalias.c: Likewise. * gcc.dg/builtins-config.h: Likewise. * gcc.dg/pr30457.c: Likewise. * gcc.c-torture/compile/volatile-1.c: Likewise. * gcc.c-torture/execute/20101011-1.c: Likewise. * c-c++-common/Waddress-1.c: Likewise. From-SVN: r233358 | |||||
| 2016-02-08 | Remove -fshort-double | Bernd Schmidt | 1 | -7/+2 | |
| PR target/60410 * tree.c (build_common_tree_nodes): Remove short_double argument. All callers changed. * tree.h (build_common_tree_nodes): Adjust declaration. * doc/invoke.texi (-fshort-double): Remove documentation. * config/mips/t-img-elf (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_EXCEPTIONS): Remove -fshort-double variant. * lto-wrapper.c (merge_and_complain, append_compiler_options, append_linker_options): Don't handle OPT_fshort_double. c-family/ PR target/60410 * c.opt (fshort-double): Remove. testsuite/ PR target/60410 * gcc.dg/lto/pr55113_0.c: Remove test. From-SVN: r233218 | |||||
| 2016-02-02 | Improve TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS target hook. | Wilco Dijkstra | 1 | -1/+2 | |
| Improve TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS target hook. It turns out there is another case where the register allocator uses the union of register classes without checking that the cost of the resulting register class is lower than both (see https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01765.html ). This happens when the cost of the best and alternative class are both lower than the memory cost. In this case we typically end up with ALL_REGS as the allocno class, which almost invariably results in bad allocations with many redundant int<->FP moves (which are expensive on various cores). AArch64 is affected by this significantly due to supporting many scalar integer operations in SIMD. Currently the TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS hook forces the class to GENERAL_REGS if the allocno class is ALL_REGS and the register has an integer mode. This is bad if the best class happens to be FP_REGS. To handle this case as well, an extra argument is needed in the hook to pass the best class. If the allocno class is ALL_REGS, but the best class isn't, we use the best class instead (rather than using the mode to force to GENERAL_REGS or FP_REGS). Previously this might happen: r79: preferred FP_REGS, alternative GENERAL_REGS, allocno GENERAL_REGS a1 (r79,l0) best GENERAL_REGS, allocno GENERAL_REGS a1(r79,l0) costs: CALLER_SAVE_REGS:5000,5000 GENERAL_REGS:5000,5000 FP_LO_REGS:0,0 FP_REGS:0,0 ALL_REGS:10000,10000 MEM:9000,9000 The proposed allocno is ALL_REGS (despite having the highest cost!) and is then forced by the hook to GENERAL_REGS because r79 has integer mode. However FP_REGS has the lowest cost. After this patch the choice is as follows: r79: preferred FP_REGS, alternative GENERAL_REGS, allocno FP_REGS a1 (r79,l0) best FP_REGS, allocno FP_REGS As a result it is now no longer a requirement to use register move costs that are larger than the memory move cost. So it will be feasible to use realistic costs for both without a huge penalty. 2016-02-02 Wilco Dijkstra <wdijkstr@arm.com> gcc/ * ira-costs.c (find_costs_and_classes): Add extra argument. * target.def (ira_change_pseudo_allocno_class): Add parameter. * targhooks.h (ira_change_pseudo_allocno_class): Likewise. * targhooks.c (ira_change_pseudo_allocno_class): Likewise. * config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class) Add best_class parameter, and return it if not ALL_REGS. * config/mips/mips.c (mips_ira_change_pseudo_allocno_class): Add parameter. * doc/tm.texi (TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Update target hook. From-SVN: r233084 | |||||
| 2016-01-29 | re PR target/65604 (MIPS -fno-delayed-branch generates incorrect code with ↵ | Steve Ellcey | 1 | -3/+11 | |
| -mcheck-zero-division) PR target/65604 * config/mips/mips.c (mips_output_division): Check flag_delayed_branch. From-SVN: r232985 | |||||
| 2016-01-28 | re PR target/68400 (ICE in change_address_1, at emit-rtl.c:2125) | Steve Ellcey | 1 | -3/+12 | |
| 2016-01-28 Steve Ellcey <sellcey@imgtec.com> PR target/68400 * config/mips/mips.c (and_operands_ok): Add MIPS16 check. From-SVN: r232952 | |||||
| 2016-01-25 | mips.c (mips_compute_frame_info): Skip re-computing the frame info after ↵ | Bernd Edlinger | 1 | -0/+4 | |
| reload completed. * config/mips/mips.c (mips_compute_frame_info): Skip re-computing the frame info after reload completed. From-SVN: r232803 | |||||
| 2016-01-21 | re PR target/69129 (ICE in get_attr_got, at config/mips/mips.md:694 on ↵ | Nick Clifton | 1 | -8/+20 | |
| mips-linux-gnu) PR target/69129 PR target/69012 * config/mips/mips.c (mips_compute_frame_info): Initialise args_size and hard_frame_pointer_offset fields of the frame structure before calling mips_global_pointer. PR target/69129 * gcc.target/mips/pr69129.c: New. From-SVN: r232674 | |||||
| 2016-01-18 | Handle Octeon 3 not supporting MIPS paired-single instructions. | Joseph Myers | 1 | -3/+4 | |
| The Octeon 3 processor does not support the MIPS paired-single instructions. This results in illegal instruction errors in the testsuite when vectorization tests try to use those instructions. This patch teaches the compiler about that lack of support, so that warnings are given when -mpaired-single (or something implying it) is used when compiling for such a processor. I chose to test TARGET_OCTEON as the simplest conditional; since the older Octeon processors don't support hard float at all, I don't think the choice matters for them. Tests that then failed with the warning were updated to disable them for Octeon. Tested with no regressions for cross to mips64el-linux-gnu (Octeon 3). gcc: * config/mips/mips.h (ISA_HAS_PAIRED_SINGLE): Require !TARGET_OCTEON. gcc/testsuite: * gcc.target/mips/mips-3d-1.c: Use forbid_cpu=octeon.* in dg-options. * gcc.target/mips/mips-3d-2.c: Likewise. * gcc.target/mips/mips-3d-3.c: Likewise. * gcc.target/mips/mips-3d-4.c: Likewise. * gcc.target/mips/mips-3d-5.c: Likewise. * gcc.target/mips/mips-3d-6.c: Likewise. * gcc.target/mips/mips-3d-7.c: Likewise. * gcc.target/mips/mips-3d-8.c: Likewise. * gcc.target/mips/mips-3d-9.c: Likewise. * gcc.target/mips/mips-ps-1.c: Likewise. * gcc.target/mips/mips-ps-2.c: Likewise. * gcc.target/mips/mips-ps-3.c: Likewise. * gcc.target/mips/mips-ps-4.c: Likewise. * gcc.target/mips/mips-ps-5.c: Likewise. * gcc.target/mips/mips-ps-6.c: Likewise. * gcc.target/mips/mips-ps-7.c: Likewise. * gcc.target/mips/mips-ps-type.c: Likewise. * gcc.target/mips/mips-ps-type-2.c: Likewise. * gcc.target/mips/mips16-attributes-6.c: Likewise. From-SVN: r232517 | |||||
| 2016-01-14 | [MIPS] Migrate reduction optabs in mips-ps-3d.md | Alan Lawrence | 1 | -12/+22 | |
| * config/mips/mips-ps-3d.md (reduc_splus_v2sf): Remove. (reduc_plus_scal_v2sf): New. (reduc_smax_v2sf): Rename to... (reduc_smax_scal_v2sf): ...here, make result SFmode, add vec_extract. (reduc_smin_v2sf): Rename to... (reduc_smin_scal_v2sf): ...here, make result SFmode, add vec_extract. From-SVN: r232371 | |||||
| 2016-01-06 | Reorder function types. | Robert Suchanek | 1 | -6/+6 | |
| * config/mips/mips-ftypes.def: Sort to lexicographical order. From-SVN: r232113 | |||||
| 2016-01-04 | Update copyright years. | Jakub Jelinek | 87 | -88/+88 | |
| From-SVN: r232055 | |||||
| 2015-12-14 | mips.c (mips_promote_function_mode): New function. | Steve Ellcey | 1 | -4/+27 | |
| 2015-12-14 Steve Ellcey <sellcey@imgtec.com> * config/mips/mips.c (mips_promote_function_mode): New function. (TARGET_PROMOTE_FUNCTION_MODE): Define as above function. (TARGET_PROMOTE_PROTOTYPES): Remove. From-SVN: r231634 | |||||
| 2015-12-02 | mips.c (mips_emit_probe_stack_range): Adjust. | Eric Botcazou | 1 | -16/+10 | |
| * config/mips/mips.c (mips_emit_probe_stack_range): Adjust. (mips_output_probe_stack_range): Rotate the loop and simplify. From-SVN: r231188 | |||||
| 2015-11-24 | frame-header-opt.c (gate): Check for optimize > 0. | Steve Ellcey | 3 | -16/+132 | |
| 2015-11-24 Steve Ellcey <sellcey@imgtec.com> * frame-header-opt.c (gate): Check for optimize > 0. (has_inlined_assembly): New function. (needs_frame_header_p): Remove is_leaf_function check, add argument type check. (callees_functions_use_frame_header): Add is_leaf_function and has_inlined_assembly calls.. (set_callers_may_not_allocate_frame): New function. (frame_header_opt): Add is_leaf_function call, add set_callers_may_not_allocate_frame call. * config/mips/mips.c (mips_compute_frame_info): Add check to see if callee saved regs can be put in frame header. (mips_expand_prologue): Add check to see if step1 is zero, fix cfa restores when using frame header to store regs. (mips_can_use_return_insn): Check to see if registers are stored in frame header. * config/mips/mips.h (machine_function): Add callers_may_not_allocate_frame and use_frame_header_for_callee_saved_regs fields. From-SVN: r230845 | |||||
| 2015-11-11 | Undo delay slot filling and use compact branches in selected cases. | Simon Dardis | 1 | -0/+117 | |
| gcc/ * config/mips/mips.c (mips_breakable_sequence_p): New function. (mips_break_sequence): New function. (mips_reorg_process_insns) Use them. Use compact branches in selected situations. gcc/testsuite/ * gcc.target/mips/split-ds-sequence.c: New test. From-SVN: r230160 | |||||
| 2015-11-09 | Machine modes for address printing. | Julian Brown | 1 | -3/+4 | |
| * final.c (output_asm_insn): Pass VOIDmode to output_address. (output_address): Add MODE argument. Pass to print_operand_address hook. * targhooks.c (default_print_operand_address): Add MODE argument. * targhooks.h (default_print_operand_address): Update prototype. * output.h (output_address): Update prototype. * target.def (print_operand_address): Add MODE argument. * config/vax/vax.c (print_operand_address): Pass VOIDmode to output_address. (print_operand): Pass access mode to output_address. * config/mcore/mcore.c (mcore_print_operand_address): Add MODE argument. (mcore_print_operand): Update calls to mcore_print_operand_address. * config/fr30/fr30.c (fr30_print_operand): Pass VOIDmode to output_address. * config/lm32/lm32.c (lm32_print_operand): Pass mode in calls to output_address. * config/tilegx/tilegx.c (output_memory_reference_mode): Remove global. (tilegx_print_operand): Don't set above global. Update calls to output_address. (tilegx_print_operand_address): Add MODE argument. Use instead of output_memory_reference_mode global. * config/frv/frv.c (frv_print_operand_address): Add MODE argument. (frv_print_operand): Pass mode to frv_print_operand_address calls. * config/mn10300/mn10300.c (mn10300_print_operand): Pass mode to output_address. * config/cris/cris.c (cris_print_operand_address): Add MODE argument. (cris_print_operand): Pass mode to output_address calls. * config/spu/spu.c (print_operand): Pass mode to output_address calls. * config/aarch64/aarch64.h (aarch64_print_operand) (aarch64_print_operand_address): Remove prototypes. * config/aarch64/aarch64.c (aarch64_memory_reference_mode): Delete global. (aarch64_print_operand): Make static. Update calls to output_address. (aarch64_print_operand_address): Add MODE argument. Use instead of aarch64_memory_reference_mode global. (TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS): Define target hooks. * config/aarch64/aarch64.h (PRINT_OPERAND, PRINT_OPERAND_ADDRESS): Delete macro definitions. * config/pa/pa.c (pa_print_operand): Pass mode in output_address calls. * config/xtensa/xtensa.c (print_operand): Pass mode in output_address calls. * config/h8300/h8300.c (h8300_print_operand_address): Add MODE argument. (h83000_print_operand): Update calls to h8300_print_operand_address and output_address. * config/ia64/ia64.c (ia64_print_operand_address): Add MODE argument. * config/tilepro/tilepro.c (output_memory_reference_mode): Delete global. (tilepro_print_operand): Pass mode to output_address. (tilepro_print_operand_address): Add MODE argument. Use instead of output_memory_reference_mode. * config/nvptx/nvptx.c (output_decl_chunk, nvptx_assemble_integer) (nvptx_output_call_insn, nvptx_print_address_operand): Pass VOIDmode to output_address calls. (nvptx_print_operand_address): Add MODE argument. * config/alpha/alpha.c (print_operand): Pass mode argument in output_address calls. * config/m68k/m68k.c (print_operand): Pass mode argument in output_address call. * config/avr/avr.c (avr_print_operand_address): Add MODE argument. (avr_print_operand): Update calls to avr_print_operand_address. * config/sparc/sparc.c (sparc_print_operand_address): Add MODE argument. Update calls to output_address. (sparc_print_operand): Pass mode to output_address. * config/iq2000/iq2000.c (iq2000_print_operand_address): Add MODE argument. (iq2000_print_operand): Pass mode in output_address calls. * config/stormy16/stormy16.c (xstormy16_print_operand_address): Add MODE argument. (xstormy16_print_operand): Pass mode to xstormy16_print_operand_address calls. * config/mips/mips.c (mips_print_operand): Update calls to output_address. (mips_print_operand_address): Add MODE argument. * config/epiphany/epiphany.c (epiphany_print_operand): Update calls to output_address. (epiphany_print_operand_address): Add MODE argument. Add FIXME note. * config/pdp11/pdp11.c (pdp11_asm_print_operand): Update call to output_address. * config/rx/rx.c (rx_print_operand_address): Add MODE argument. (rx_print_operand): Update calls to output_address, rx_print_operand_address. * config/nds32/nds32.c (nds32_print_operand): Update calls to output_address. (nds32_print_operand_address): Add MODE argument. * config/rs6000/rs6000.c (print_operand): Pass mem mode to output_address calls. * config/c6x/c6x.c (print_address_offset): Pass mem mode to output_address call. (c6x_print_address_operand): Update calls to output_address. (c6x_print_operand_address): Pass mode to above. * config/v850/v850.c (v850_print_operand_address): Add MODE argument. (v850_print_operand): Pass mode to v850_print_operand_address, output_address. * config/mmix/mmix.c (mmix_print_operand_address): Add MODE argument. (mmix_print_operand): Pass mode in output_address calls. * config/sh/sh.c (sh_print_operand_address): Add MODE argument. (sh_print_operand): Pass mem mode to output_address, sh_print_operand_address. * config/cr16/cr16.c (cr16_print_operand_address): Add MODE argument. (cr16_print_operand): Pass mode to output_address, cr16_print_operand_address. * config/bfin/bfin.c (print_address_operand): Pass VOIDmode to output_address. * config/microblaze/microblaze.c (print_operand): Pass mode to output_address. * config/nios2/nios2.c (nios2_print_operand): Pass VOIDmode to output_address. (nios2_print_operand_address): Add MODE argument. Update call to nios2_print_operand_address. * config/s390/s390.c (print_operand): Pass mode to output_address. * config/m32c/m32c.c (m32c_print_operand_address): Add MODE argument. * config/arc/arc.c (arc_print_operand): Pass VOIDmode to output_address. * config/arm/arm.c (arm_print_operand_address): Add MODE argument. Use instead of output_memory_reference_mode. (output_memory_reference_mode): Delete global. (arm_print_operand): Pass mem mode to output_address. * config/m32r/m32r.c (m32r_print_operand_address): Add MODE argument. (m32r_print_operand): Pass mode to output_address. * config/msp430/msp430.c (msp430_print_operand_addr): Add MODE argument. (msp430_print_operand): Pass mode to msp430_print_operand_addr. * config/i386/i386.c (ix86_print_operand): Pass mode to output_address calls. (ix86_print_operand_address): Add MODE argument. From-SVN: r230016 | |||||
| 2015-11-08 | Merge of the scalar-storage-order branch. | Eric Botcazou | 1 | -2/+2 | |
| From-SVN: r229965 | |||||
| 2015-11-06 | Update loongson vector reductions. | Simon Dardis | 1 | -24/+32 | |
| 2015-11-06 Simon Dardis <simon.dardis@imgtec.com> * config/mips/loongson.md (vec_loongson_extract_lo_<mode>): New, extract low part to scalar. (reduc_uplus_<mode>): Remove. (reduc_plus_scal_<mode>): Rename from reduc_splus_<mode>, Use vec loongson_extract_lo_<mode>. (reduc_smax_scal_<mode>, reduc_smin_scal_<mode>): Rename from reduc_smax_<mode>, reduc_smax_<mode>, use vec loongson_extract_lo_<mode>. (reduc_umax_scal_<mode>, reduc_umin_scal_<mode>): Rename. From-SVN: r229844 | |||||
| 2015-10-26 | target.def (TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P): New hook. | Simon Dardis | 1 | -0/+11 | |
| gcc/ * target.def (TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P): New hook. * doc/tm.texi.in (TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P): Document. * doc/tm.texi: Regenerated. * reorg.c (dbr_schedule): Use new hook. * config/mips/mips.c (mips_no_speculation_in_delay_slots_p): New. testsuite/ * gcc.target/mips/ds-schedule-1.c: New. * gcc.target/mips/ds-schedule-2.c: New. From-SVN: r229383 | |||||
| 2015-10-21 | Improve --help output to generate references to option aliases. | Martin Sebor | 1 | -81/+81 | |
| gcc/ PR driver/68043 * opts.c (undocumented_msg, use_diagnosed_msg): New globals. (print_filtered_help): Reference aliased option's name and encourage readers to use it in preference to the alias if the former is not documented. Mention when using an option is diagnosed. * gcc.c (display_help): End each sentence with a period. * ada/gcc-interface/lang.opt: End each sentence that describes an option with a period. * c-family/c.opt: Same. * common.opt: Same. * config/aarch64/aarch64.opt: Same. * config/alpha/alpha.opt: Same. * config/arc/arc.opt: Same. * config/arm/arm.opt: Same. * config/avr/avr.opt: Same. * config/bfin/bfin.opt: Same. * config/c6x/c6x.opt: Same. * config/cr16/cr16.opt: Same. * config/cris/cris.opt: Same. * config/cris/linux.opt: Same. * config/darwin.opt: Same. * config/epiphany/epiphany.opt: Same. * config/fr30/fr30.opt: Same. * config/frv/frv.opt: Same. * config/ft32/ft32.opt: Same. * config/g.opt: Same. * config/h8300/h8300.opt: Same. * config/i386/cygming.opt: Same. * config/i386/djgpp.opt: Same. * config/i386/i386.opt: Same. * config/i386/interix.opt: Same. * config/i386/mingw-w64.opt: Same. * config/i386/mingw.opt: Same. * config/ia64/ia64.opt: Same. * config/ia64/ilp32.opt: Same. * config/iq2000/iq2000.opt: Same. * config/linux.opt: Same. * config/lm32/lm32.opt: Same. * config/lynx.opt: Same. * config/m32c/m32c.opt: Same. * config/m32r/m32r.opt: Same. * config/m68k/ieee.opt: Same. * config/m68k/m68k.opt: Same. * config/mcore/mcore.opt: Same. * config/mep/mep.opt: Same. * config/microblaze/microblaze.opt: Same. * config/mips/mips.opt: Same. * config/mmix/mmix.opt: Same. * config/mn10300/mn10300.opt: Same. * config/moxie/moxie.opt: Same. * config/msp430/msp430.opt: Same. * config/nios2/elf.opt: Same. * config/nios2/nios2.opt: Same. * config/nvptx/nvptx.opt: Same. * config/pa/pa-hpux.opt: Same. * config/pa/pa-hpux1010.opt: Same. * config/pa/pa-hpux1111.opt: Same. * config/pa/pa-hpux1131.opt: Same. * config/pa/pa.opt: Same. * config/pa/pa64-hpux.opt: Same. * config/pdp11/pdp11.opt: Same. * config/rl78/rl78.opt: Same. * config/rs6000/476.opt: Same. * config/rs6000/aix64.opt: Same. * config/rs6000/darwin.opt: Same. * config/rs6000/linux64.opt: Same. * config/rs6000/rs6000.opt: Same. * config/rs6000/sysv4.opt: Same. * config/s390/s390.opt: Same. * config/s390/tpf.opt: Same. * config/sh/sh.opt: Same. * config/sol2.opt: Same. * config/sparc/long-double-switch.opt: Same. * config/sparc/sparc.opt: Same. * config/spu/spu.opt: Same. * config/stormy16/stormy16.opt: Same. * config/tilegx/tilegx.opt: Same. * config/tilepro/tilepro.opt: Same. * config/v850/v850.opt: Same. * config/vax/vax.opt: Same. * config/visium/visium.opt: Same. * config/vms/vms.opt: Same. * config/vxworks.opt: Same. * config/xtensa/xtensa.opt: Same. * fortran/lang.opt: Same. testsuite/ PR driver/68043 * gcc.misc-tests/help.exp: Adjust. * lib/options.exp (check_for_options): Add detail to output. From-SVN: r229155 | |||||
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