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AgeCommit message (Expand)AuthorFilesLines
2018-02-02i386: Pass INVALID_REGNUM as invalid register numberH.J. Lu1-2/+3
2018-02-02Add -march=icelake.Julia Koval4-5/+58
2018-02-02Move omp bitmask to general to use it in x86 backend.Julia Koval1-167/+163
2018-02-02PR84066 Wrong shadow stack register size is saved for x32Igor Tsimbalist1-25/+30
2018-02-01re PR target/84128 (i686: Stack spilling in -fstack-clash-protection prologue...Jeff Law1-15/+47
2018-01-31re PR target/83618 (_rdpid_u32 doesn't work on 64-bit targets as gas expects ...Julia Koval2-1/+31
2018-01-30re PR target/84064 (ICE in ix86_expand_prologue related to -fstack-clash-prot...Jeff Law1-18/+47
2018-01-26re PR target/81763 (Issues with BMI on 32bit x86 apps on GCC 7.1+)Uros Bizjak1-4/+4
2018-01-26Configure USE_HIDDEN_LINKONCE on Solaris/x86Rainer Orth1-6/+0
2018-01-26Fix various x86 avx512{bitalg, vpopcntdq, vbmi2} issues (PR target/83488)Julia Koval5-24/+20
2018-01-25re PR middle-end/83977 (ICE in simd_clone_clauses_extract, at omp-simd-clone....Jakub Jelinek1-2/+2
2018-01-24re PR target/83994 (%ebx is clobbered by stack-clash probing for regparm-3 fu...Jeff Law1-19/+25
2018-01-23i386: Use const reference of struct ix86_frame to avoid copyH.J. Lu1-12/+12
2018-01-19re PR debug/81570 (create_pseudo_cfg assumes that INCOMING_FRAME_SP_OFFSET is...Jakub Jelinek1-0/+4
2018-01-18Small retpoline clean-up.Martin Liska1-1/+4
2018-01-17i386.c (indirect_thunk_name): Declare regno as unsigned int.Uros Bizjak1-15/+15
2018-01-17Re-enabling of RDRND for Silvermont.Sebastian Peryt1-1/+1
2018-01-15i386: Rewrite indirect_branch_operand logicH.J. Lu1-2/+2
2018-01-15Don't check ix86_indirect_branch_register for GOT operandH.J. Lu2-12/+8
2018-01-15i386: Rewrite ix86_indirect_branch_register logicH.J. Lu1-12/+10
2018-01-15i386: Rename to ix86_indirect_branch_registerH.J. Lu4-21/+21
2018-01-15i386: Don't use ASM_OUTPUT_DEF for TARGET_MACHOH.J. Lu1-1/+2
2018-01-14x86: Disallow -mindirect-branch=/-mfunction-return= with -mcmodel=largeH.J. Lu1-0/+26
2018-01-14x86: Add 'V' register operand modifierH.J. Lu1-1/+12
2018-01-14x86: Add -mindirect-branch-registerH.J. Lu4-23/+48
2018-01-14x86: Add -mfunction-return=H.J. Lu5-16/+154
2018-01-14x86: Add -mindirect-branch=H.J. Lu6-18/+697
2018-01-12Deferring FMA transformations in tight loopsMartin Jambor2-0/+9
2018-01-12re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b...Richard Biener1-0/+36
2018-01-11re PR target/83203 (Inefficient int to avx2 vector conversion)Jakub Jelinek2-3/+97
2018-01-11i386: Align stack frame if argument is passed on stackH.J. Lu1-1/+6
2018-01-10i386: Also adjust stack frame for stack slot alignmentH.J. Lu2-47/+76
2018-01-10re PR target/81616 (Update -mtune=generic for the current Intel and AMD proce...Jan Hubicka3-1/+7
2018-01-05re PR target/83604 (ICE in copy_to_mode_reg, at explow.c:630)Jakub Jelinek6-67/+100
2018-01-05re PR target/83604 (ICE in copy_to_mode_reg, at explow.c:630)Jakub Jelinek1-54/+54
2018-01-04re PR target/83554 (ICE: in ix86_mitigate_rop, at config/i386/i386.c:41274 wi...Jakub Jelinek2-4/+4
2018-01-03re PR target/83641 (-fstack-clash-protection generates incorrect CFI on i386)Jeff Law1-4/+22
2018-01-03x86: don't use AVX512BW vmovdqu variants without -mavx512bwJan Beulich1-2/+8
2018-01-03Update copyright years.Jakub Jelinek187-187/+187
2018-01-03poly_int: PUSH_ROUNDINGRichard Sandiford3-9/+16
2018-01-03poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECTOR_SIZESRichard Sandiford1-8/+11
2018-01-03poly_int: get_mask_modeRichard Sandiford1-1/+1
2018-01-02Remove vec_perm_const optabRichard Sandiford3-116/+90
2018-01-02re PR target/81616 (Update -mtune=generic for the current Intel and AMD proce...Jan Hubicka1-2/+2
2018-01-02re PR target/81616 (Update -mtune=generic for the current Intel and AMD proce...Jan Hubicka1-8/+8
2017-12-31re PR target/83536 (One 'false' too much in r255699 for mingw target (in conf...Jakub Jelinek1-1/+1
2017-12-30sse.md (vgf2p8affineinvqb_<mode><mask_name>, [...]): Formatting fixes.Jakub Jelinek1-145/+154
2017-12-25re PR target/83488 (ICE on a CET test-case)Jakub Jelinek6-366/+399
2017-12-22re PR target/83488 (ICE on a CET test-case)Jakub Jelinek2-26/+26
2017-12-22Enable AVX512BITALGJulia Koval12-5/+522
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