Age | Commit message (Expand) | Author | Files | Lines |
2021-11-08 | Fix couple of issues in large PIC model on x86-64/VxWorks | Eric Botcazou | 2 | -5/+17 |
2021-11-05 | x86: Make stringop_algs::stringop_strategy ctor constexpr [PR100246] | Jakub Jelinek | 1 | -2/+3 |
2021-11-04 | vect: Convert cost hooks to classes | Richard Sandiford | 1 | -53/+23 |
2021-11-04 | Extend vternlog define_insn_and_split to memory_operand to enable more optimz... | liuhongt | 2 | -15/+32 |
2021-11-04 | i386: Auto vectorize sdot_prod, usdot_prod with VNNI instruction. | Hongyu Wang | 1 | -8/+56 |
2021-11-04 | i386: Fix wrong result for AMX-TILE intrinsic when parsing expression. | Hongyu Wang | 1 | -3/+3 |
2021-11-02 | x86_64: Improved implementation of TImode rotations. | Roger Sayle | 1 | -2/+18 |
2021-11-02 | ia32: Disallow mode(V1TI) [PR103020] | Jakub Jelinek | 1 | -0/+4 |
2021-11-02 | x86_64: Expand ashrv1ti (and PR target/102986) | Roger Sayle | 3 | -13/+543 |
2021-10-29 | Enable vectorization for _Float16 floor/ceil/trunc/nearbyint/rint operations. | liuhongt | 5 | -6/+69 |
2021-10-28 | AVX512FP16: Optimize _Float16 reciprocal for div and sqrt | Hongyu Wang | 3 | -19/+117 |
2021-10-26 | x86_64: Implement V1TI mode shifts/rotates by a constant | Roger Sayle | 3 | -0/+209 |
2021-10-25 | Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combine FADD(A, FMUL(B,... | konglin1 | 1 | -0/+52 |
2021-10-23 | config/i386: Commentary typo fix | Bernhard Reutner-Fischer | 1 | -1/+1 |
2021-10-23 | x86_64: Add insn patterns for V1TI mode logic operations. | Roger Sayle | 1 | -0/+25 |
2021-10-21 | i386: Fix wrong codegen for V8HF move without TARGET_AVX512F | Hongyu Wang | 1 | -3/+12 |
2021-10-20 | Revert "target: support spaces in target attribute." | Martin Liska | 1 | -2/+0 |
2021-10-20 | Rename asm_out_file function arguments. | Martin Liska | 2 | -12/+12 |
2021-10-19 | target: support spaces in target attribute. | Martin Liska | 1 | -0/+2 |
2021-10-19 | AVX512FP16: Add *_set1_pch intrinsics. | dianhong xu | 2 | -0/+39 |
2021-10-18 | i386: Fix ICE in ix86_print_opreand_address [PR 102761] | Uros Bizjak | 1 | -1/+4 |
2021-10-18 | Try placing RTL folded constants in the constant pool. | Roger Sayle | 1 | -0/+7 |
2021-10-15 | Darwin: Revise handling of some driver opts. | Iain Sandoe | 1 | -4/+5 |
2021-10-15 | Allow early sets of SSE hard registers from standard_sse_constant_p. | Roger Sayle | 1 | -1/+3 |
2021-10-15 | AVX512FP16: Enhance vector shuffle builtins | Hongyu Wang | 2 | -1/+77 |
2021-10-15 | AVX512FP16: Fix ICE for 2 v4hf vector concat | Hongyu Wang | 1 | -1/+2 |
2021-10-14 | AVX512FP16: Adjust builtin for mask complex fma | Hongyu Wang | 6 | -216/+333 |
2021-10-13 | x86_64: Some SUBREG related optimization tweaks to i386 backend. | Roger Sayle | 2 | -3/+18 |
2021-10-12 | i386: Improve workaround for PR82524 LRA limitation [PR85730] | Uros Bizjak | 1 | -55/+147 |
2021-10-12 | Support reduc_{plus,smax,smin,umax,umin}_scal_v4qi. | liuhongt | 2 | -0/+50 |
2021-10-09 | Refine movhfcc. | liuhongt | 3 | -6/+48 |
2021-10-08 | Come up with OPTION_SET_P macro. | Martin Liska | 2 | -4/+4 |
2021-10-08 | Simplify (_Float16) ceil ((double) x) to .CEIL (x) when available. | liuhongt | 1 | -8/+12 |
2021-10-08 | Support reduc_{plus,smax,smin,umax,min}_scal_v4hi. | liuhongt | 2 | -0/+41 |
2021-10-01 | Fix PR c++/64697 at -O1 or above | Eric Botcazou | 1 | -13/+8 |
2021-09-30 | i386: Eliminate sign extension after logic operation [PR89954] | Uros Bizjak | 1 | -0/+34 |
2021-09-28 | i386: Don't emit fldpi etc. if -frounding-math [PR102498] | Jakub Jelinek | 1 | -1/+2 |
2021-09-28 | AVX512FP16: Support basic 64/32bit vector type and operation. | Hongyu Wang | 4 | -15/+59 |
2021-09-28 | Support 128/256/512-bit vector plus/smin/smax reduction for _Float16. | liuhongt | 2 | -2/+11 |
2021-09-27 | Revert "Optimize v4sf reduction.". | liuhongt | 1 | -28/+11 |
2021-09-24 | AVX512FP16: Support cond_op for HFmode | Hongyu Wang | 1 | -56/+56 |
2021-09-23 | AVX512FP16: Enable vec_cmpmn/vcondmn expanders for HF modes. | Hongyu Wang | 2 | -12/+74 |
2021-09-23 | AVX512FP16: add truncmn2/extendmn2 expanders | Hongyu Wang | 1 | -7/+68 |
2021-09-23 | AVX512FP16: Add float(uns)?mn2 expander | Hongyu Wang | 1 | -8/+38 |
2021-09-23 | AVX512FP16: Add fix(uns)?_truncmn2 for HF scalar and vector modes | Hongyu Wang | 2 | -0/+72 |
2021-09-23 | AVX512FP16: Add expander for smin/maxhf3. | Hongyu Wang | 1 | -0/+11 |
2021-09-23 | AVX512FP16: Add expander for fmahf4 | liuhongt | 1 | -5/+6 |
2021-09-23 | AVX512FP16: Add expander for rint/nearbyinthf2. | liuhongt | 1 | -0/+22 |
2021-09-22 | AVX512FP16: Add permutation and mask blend intrinsics. | dianhong xu | 2 | -0/+93 |
2021-09-22 | AVX512FP16: Add complex conjugation intrinsic instructions. | dianhong xu | 2 | -0/+80 |