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2020-10-14x86: Add missing intrinsics [PR95483]Sunil K Pandey14-14/+752
2020-10-14i386: Improve chaining of _{addcarry,subborrow}_u{32,64} [PR97387]Jakub Jelinek2-12/+70
2020-10-09x86: Add <x86gprintrin.h>H.J. Lu30-270/+309
2020-10-01config/i386/t-rtems: Change from mtune to march for multilibsMichael Davidsaver1-4/+4
2020-10-01PR target/97250: i386: Add support for x86-64-v2, x86-64-v3, x86-64-v4 levels...Florian Weimer2-6/+34
2020-09-30[nvptx] Add type arg to TARGET_LIBC_HAS_FUNCTIONTom de Vries1-1/+1
2020-09-30x86: Use SET operation in MOVDIRI and MOVDIR64BH.J. Lu1-10/+10
2020-09-30i386: Define __LAHF_SAHF__ and __MOVBE__ macros, based on ISA flagsFlorian Weimer1-0/+4
2020-09-29x86: Replace <enqcmdntrin.h> with <enqcmdintrin.h>H.J. Lu1-4/+4
2020-09-29Add missing FSF copyright notes for x86 intrinsic headers.Hongyu Wang8-0/+184
2020-09-28Enable GCC support for AMX-TILE,AMX-INT8,AMX-BF16.liuhongt9-3/+201
2020-09-19Increase rtx cost of sse_to_integer in skylake_cost.liuhongt1-1/+1
2020-09-16rtl_data: Add sp_is_clobbered_by_asmH.J. Lu1-2/+4
2020-09-15Retune mask <->integer cost for non-AVX512 micro-architecture.liuhongt1-44/+44
2020-09-15i386: Fix up vector mul and div with broadcasts in -masm=intel modeJakub Jelinek1-2/+2
2020-09-14options: Save and restore opts_set for Optimization and Target optionsJakub Jelinek4-18/+29
2020-09-11i386: Fix array index in expanderNathan Sidwell1-1/+1
2020-09-09Implement __builtin_thread_pointer for x86 TLS.liuhongt1-0/+10
2020-09-03Optimize memory broadcast for constant vector under AVX512.liuhongt5-23/+187
2020-08-31Refine expander vec_unpacku_float_hi_v16si/vec_unpacku_float_lo_v16siliuhongt1-2/+2
2020-08-30x86: Fix up ssse3_pshufbv8qi splitterJakub Jelinek1-5/+2
2020-08-28Add expander for movp2hi and movp2qi.liuhongt2-0/+30
2020-08-27ia32: Fix alignment of _Atomic fields [PR65146]Jakub Jelinek1-5/+30
2020-08-26x86: Reject target("no-general-regs-only")H.J. Lu1-0/+7
2020-08-25x86: Change CTZ_DEFINED_VALUE_AT_ZERO to return 0/2H.J. Lu1-2/+2
2020-08-25Refine typo to fix ICE.liuhongt1-1/+1
2020-08-23x86: Add target("general-regs-only") function attributeH.J. Lu1-3/+41
2020-08-22Using gen_int_mode instead of GEN_INT to avoid ICE caused by type promotion.liuhongt1-3/+3
2020-08-21Enable bitwise operation for type mask.liuhongt4-63/+214
2020-08-21According to instruction_tables.pdfliuhongt1-4/+4
2020-08-21Enable direct movement between gpr and mask registers in pass_reload.liuhongt3-3/+6
2020-08-21x86: Add cost model for operation of mask registers.H.J. Lu3-0/+185
2020-08-19i386: Use code_for_ instead of gen_ for parameterized names more.Uros Bizjak1-17/+19
2020-08-18i386: Rewrite restore_stack_nonlocal expander [PR96536].Uros Bizjak1-72/+43
2020-08-18Don't use pinsr/pextr for struct initialization/extraction.liuhongt1-2/+0
2020-08-17i386: Use parametrized pattern names some more.Uros Bizjak3-65/+49
2020-08-17Force ENDBR immediate into memory.liuhongt2-0/+37
2020-08-14i386: Improve LWP builtin expanders.Uros Bizjak3-62/+67
2020-08-13i386: Improve CET builtin expanders.Uros Bizjak4-107/+78
2020-08-13Merge two define_insn: <avx512>_blendm<mode>, <avx512>_load<mode>_mask.liuhongt1-19/+15
2020-08-12PR target/96558: Only call ix86_expand_clear with GENERAL_REGS.Roger Sayle1-1/+1
2020-08-12x86_64: Use peephole2 to eliminate redundant moves.Roger Sayle1-0/+10
2020-08-10i386: Improve code generation of smin(x,0) with -m32.Roger Sayle1-1/+11
2020-08-10Using UNSPEC for vector compare to mask register.liuhongt4-107/+21
2020-08-06x86_64: Integer min/max improvements.Roger Sayle1-19/+55
2020-07-30Tune memcpy and memset for Zen cores.Martin Liska1-6/+6
2020-07-30Re-format zen memcpy/memset costs.Martin Liska1-10/+28
2020-07-24revamp intelmic-mkoffload aux dump namesAlexandre Oliva1-10/+62
2020-07-24i386: Emit mfence_sse2 for -Os [PR95750]Uros Bizjak1-1/+2
2020-07-21Add TARGET_LOWER_LOCAL_DECL_ALIGNMENT [PR95237]Sunil K Pandey2-3/+17
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