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2021-09-22AVX512FP16: Add permutation and mask blend intrinsics.dianhong xu2-0/+93
2021-09-22AVX512FP16: Add complex conjugation intrinsic instructions.dianhong xu2-0/+80
2021-09-22AVX512FP16: Add reduce operators(add/mul/min/max).dianhong xu2-0/+203
2021-09-22AVX512FP16: Support load/store/abs intrinsics.dianhong xu2-0/+116
2021-09-22Support 64bit fma/fms/fnma/fnms under avx512vl.liuhongt2-9/+15
2021-09-22AVX512FP16: Add expander for cstorehf4.liuhongt1-0/+15
2021-09-22AVX512FP16: Add expander for ceil/floor/trunc/roundeven.liuhongt2-7/+19
2021-09-22AVX512FP16: Add expander for sqrthf2.liuhongt3-8/+28
2021-09-22AVX512FP16: Add vfcmaddcsh/vfmaddcsh/vfcmulcsh/vfmulcsh.liuhongt4-0/+624
2021-09-22AVX512FP16: Add vfcmaddcph/vfmaddcph/vfcmulcph/vfmulcphliuhongt7-0/+837
2021-09-18Fix ICE in pass_rpad.liuhongt1-5/+22
2021-09-18AVX512FP16: Add scalar fma instructions.liuhongt5-163/+598
2021-09-18AVX512FP16: Enable FP16 mask load/store.H.J. Lu1-6/+6
2021-09-18AVX512FP16: Add scalar/vector bitwise operations, includingH.J. Lu4-62/+130
2021-09-18AVX512FP16: Add FP16 fma instructions.liuhongt4-96/+928
2021-09-18AVX512FP16: Add vfmaddsub[132,213,231]ph/vfmsubadd[132,213,231]ph.liuhongt4-41/+490
2021-09-18Support embedded broadcast for AVX512FP16 instructions.liuhongt3-9/+7
2021-09-17x86: Add TARGET_SSE_PARTIAL_REG_[FP_]CONVERTS_DEPENDENCYH.J. Lu4-5/+29
2021-09-17x86: Properly handle USE_VECTOR_FP_CONVERTS/USE_VECTOR_CONVERTSH.J. Lu1-3/+20
2021-09-17x86: Update memcpy/memset inline strategies for -mtune=tremontH.J. Lu3-2/+126
2021-09-17x86: Update -mtune=tremontH.J. Lu3-18/+22
2021-09-17AVX512FP16: Add intrinsics for casting between vector float16 and vector floa...liuhongt2-0/+270
2021-09-17AVX512FP16: Add vcvtsh2ss/vcvtsh2sd/vcvtss2sh/vcvtsd2sh.liuhongt5-1/+356
2021-09-17AVX512FP16: Add vcvtph2pd/vcvtph2psx/vcvtpd2ph/vcvtps2phx.liuhongt6-3/+749
2021-09-17AVX512FP16: Add vcvttsh2si/vcvttsh2usi.liuhongt3-0/+107
2021-09-17AVX512FP16: Add vcvttph2w/vcvttph2uw/vcvttph2dq/vcvttph2qq/vcvttph2udq/vcvttp...liuhongt4-0/+982
2021-09-17AVX512FP16: Add vcvtsh2si/vcvtsh2usi/vcvtsi2sh/vcvtusi2sh.liuhongt5-0/+221
2021-09-16[i386] Change ix86_decompose_address return type to bool.Uros Bizjak2-25/+25
2021-09-16AVX512FP16: Add vcvtuw2ph/vcvtw2ph/vcvtdq2ph/vcvtudq2ph/vcvtqq2ph/vcvtuqq2phliuhongt8-3/+993
2021-09-16AVX512FP16: Add vcvtph2dq/vcvtph2qq/vcvtph2w/vcvtph2uw/vcvtph2uqq/vcvtph2udqliuhongt6-0/+941
2021-09-16AVX512FP16: Add vmovw/vmovsh.liuhongt5-16/+95
2021-09-15i386: port vxworks to TARGET_CPU_P macroMartin Liska1-12/+12
2021-09-15Optimize for V{8,16,32}HFmode vec_set/extract/init.liuhongt3-98/+180
2021-09-15AVX512FP16: Adjust builtin name for FP16 builtins to match AVX512F styleHongyu Wang3-910/+910
2021-09-15Output vextract{i,f}{32x4,64x2} for (vec_select:(reg:Vmode) idx) when byte_of...liuhongt1-4/+17
2021-09-14AVX512FP16: Add fpclass/getexp/getmant instructions.liuhongt6-20/+743
2021-09-14AVX512FP16: Add vreduceph/vreducesh/vrndscaleph/vrndscalesh.liuhongt6-22/+550
2021-09-14AVX512FP16: Add vrcpph/vrcpsh/vscalefph/vscalefsh.liuhongt4-9/+340
2021-09-14AVX512FP16: Add vsqrtph/vrsqrtph/vsqrtsh/vrsqrtsh.liuhongt6-9/+337
2021-09-13c++: implement C++17 hardware interference sizeJason Merrill1-0/+6
2021-09-13i386: support micro-levels in target{,_clone} attrs [PR101696]Martin Liska1-3/+19
2021-09-13x86: Add TARGET_AVX256_[MOVE|STORE]_BY_PIECESH.J. Lu2-3/+18
2021-09-13Remove DARWIN_PREFER_DWARF and dead codeRichard Biener1-11/+0
2021-09-13Fix i686-lynx build breakageRichard Biener1-4/+0
2021-09-13Always default to DWARF2 debug for cygwin and mingwRichard Biener1-9/+0
2021-09-13[i386] Remove UNSPEC_{COPYSIGN,XORSIGN}.liuhongt1-2/+0
2021-09-10AVX512FP16: Add vcmpph/vcmpsh/vcomish/vucomish.liuhongt7-18/+363
2021-09-10AVX512FP16: Add vmaxph/vminph/vmaxsh/vminsh.liuhongt7-21/+402
2021-09-10AVX512FP16: Add vaddsh/vsubsh/vmulsh/vdivsh.Liu, Hongtao5-11/+277
2021-09-10AVX512FP16: Enable _Float16 autovectorizationH.J. Lu3-12/+30