Age | Commit message (Expand) | Author | Files | Lines |
2021-09-22 | AVX512FP16: Add permutation and mask blend intrinsics. | dianhong xu | 2 | -0/+93 |
2021-09-22 | AVX512FP16: Add complex conjugation intrinsic instructions. | dianhong xu | 2 | -0/+80 |
2021-09-22 | AVX512FP16: Add reduce operators(add/mul/min/max). | dianhong xu | 2 | -0/+203 |
2021-09-22 | AVX512FP16: Support load/store/abs intrinsics. | dianhong xu | 2 | -0/+116 |
2021-09-22 | Support 64bit fma/fms/fnma/fnms under avx512vl. | liuhongt | 2 | -9/+15 |
2021-09-22 | AVX512FP16: Add expander for cstorehf4. | liuhongt | 1 | -0/+15 |
2021-09-22 | AVX512FP16: Add expander for ceil/floor/trunc/roundeven. | liuhongt | 2 | -7/+19 |
2021-09-22 | AVX512FP16: Add expander for sqrthf2. | liuhongt | 3 | -8/+28 |
2021-09-22 | AVX512FP16: Add vfcmaddcsh/vfmaddcsh/vfcmulcsh/vfmulcsh. | liuhongt | 4 | -0/+624 |
2021-09-22 | AVX512FP16: Add vfcmaddcph/vfmaddcph/vfcmulcph/vfmulcph | liuhongt | 7 | -0/+837 |
2021-09-18 | Fix ICE in pass_rpad. | liuhongt | 1 | -5/+22 |
2021-09-18 | AVX512FP16: Add scalar fma instructions. | liuhongt | 5 | -163/+598 |
2021-09-18 | AVX512FP16: Enable FP16 mask load/store. | H.J. Lu | 1 | -6/+6 |
2021-09-18 | AVX512FP16: Add scalar/vector bitwise operations, including | H.J. Lu | 4 | -62/+130 |
2021-09-18 | AVX512FP16: Add FP16 fma instructions. | liuhongt | 4 | -96/+928 |
2021-09-18 | AVX512FP16: Add vfmaddsub[132,213,231]ph/vfmsubadd[132,213,231]ph. | liuhongt | 4 | -41/+490 |
2021-09-18 | Support embedded broadcast for AVX512FP16 instructions. | liuhongt | 3 | -9/+7 |
2021-09-17 | x86: Add TARGET_SSE_PARTIAL_REG_[FP_]CONVERTS_DEPENDENCY | H.J. Lu | 4 | -5/+29 |
2021-09-17 | x86: Properly handle USE_VECTOR_FP_CONVERTS/USE_VECTOR_CONVERTS | H.J. Lu | 1 | -3/+20 |
2021-09-17 | x86: Update memcpy/memset inline strategies for -mtune=tremont | H.J. Lu | 3 | -2/+126 |
2021-09-17 | x86: Update -mtune=tremont | H.J. Lu | 3 | -18/+22 |
2021-09-17 | AVX512FP16: Add intrinsics for casting between vector float16 and vector floa... | liuhongt | 2 | -0/+270 |
2021-09-17 | AVX512FP16: Add vcvtsh2ss/vcvtsh2sd/vcvtss2sh/vcvtsd2sh. | liuhongt | 5 | -1/+356 |
2021-09-17 | AVX512FP16: Add vcvtph2pd/vcvtph2psx/vcvtpd2ph/vcvtps2phx. | liuhongt | 6 | -3/+749 |
2021-09-17 | AVX512FP16: Add vcvttsh2si/vcvttsh2usi. | liuhongt | 3 | -0/+107 |
2021-09-17 | AVX512FP16: Add vcvttph2w/vcvttph2uw/vcvttph2dq/vcvttph2qq/vcvttph2udq/vcvttp... | liuhongt | 4 | -0/+982 |
2021-09-17 | AVX512FP16: Add vcvtsh2si/vcvtsh2usi/vcvtsi2sh/vcvtusi2sh. | liuhongt | 5 | -0/+221 |
2021-09-16 | [i386] Change ix86_decompose_address return type to bool. | Uros Bizjak | 2 | -25/+25 |
2021-09-16 | AVX512FP16: Add vcvtuw2ph/vcvtw2ph/vcvtdq2ph/vcvtudq2ph/vcvtqq2ph/vcvtuqq2ph | liuhongt | 8 | -3/+993 |
2021-09-16 | AVX512FP16: Add vcvtph2dq/vcvtph2qq/vcvtph2w/vcvtph2uw/vcvtph2uqq/vcvtph2udq | liuhongt | 6 | -0/+941 |
2021-09-16 | AVX512FP16: Add vmovw/vmovsh. | liuhongt | 5 | -16/+95 |
2021-09-15 | i386: port vxworks to TARGET_CPU_P macro | Martin Liska | 1 | -12/+12 |
2021-09-15 | Optimize for V{8,16,32}HFmode vec_set/extract/init. | liuhongt | 3 | -98/+180 |
2021-09-15 | AVX512FP16: Adjust builtin name for FP16 builtins to match AVX512F style | Hongyu Wang | 3 | -910/+910 |
2021-09-15 | Output vextract{i,f}{32x4,64x2} for (vec_select:(reg:Vmode) idx) when byte_of... | liuhongt | 1 | -4/+17 |
2021-09-14 | AVX512FP16: Add fpclass/getexp/getmant instructions. | liuhongt | 6 | -20/+743 |
2021-09-14 | AVX512FP16: Add vreduceph/vreducesh/vrndscaleph/vrndscalesh. | liuhongt | 6 | -22/+550 |
2021-09-14 | AVX512FP16: Add vrcpph/vrcpsh/vscalefph/vscalefsh. | liuhongt | 4 | -9/+340 |
2021-09-14 | AVX512FP16: Add vsqrtph/vrsqrtph/vsqrtsh/vrsqrtsh. | liuhongt | 6 | -9/+337 |
2021-09-13 | c++: implement C++17 hardware interference size | Jason Merrill | 1 | -0/+6 |
2021-09-13 | i386: support micro-levels in target{,_clone} attrs [PR101696] | Martin Liska | 1 | -3/+19 |
2021-09-13 | x86: Add TARGET_AVX256_[MOVE|STORE]_BY_PIECES | H.J. Lu | 2 | -3/+18 |
2021-09-13 | Remove DARWIN_PREFER_DWARF and dead code | Richard Biener | 1 | -11/+0 |
2021-09-13 | Fix i686-lynx build breakage | Richard Biener | 1 | -4/+0 |
2021-09-13 | Always default to DWARF2 debug for cygwin and mingw | Richard Biener | 1 | -9/+0 |
2021-09-13 | [i386] Remove UNSPEC_{COPYSIGN,XORSIGN}. | liuhongt | 1 | -2/+0 |
2021-09-10 | AVX512FP16: Add vcmpph/vcmpsh/vcomish/vucomish. | liuhongt | 7 | -18/+363 |
2021-09-10 | AVX512FP16: Add vmaxph/vminph/vmaxsh/vminsh. | liuhongt | 7 | -21/+402 |
2021-09-10 | AVX512FP16: Add vaddsh/vsubsh/vmulsh/vdivsh. | Liu, Hongtao | 5 | -11/+277 |
2021-09-10 | AVX512FP16: Enable _Float16 autovectorization | H.J. Lu | 3 | -12/+30 |