| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2022-03-16 | Fix strange binary corruption with last commit. | Roger Sayle | 1 | -1/+1 |
| 2022-03-16 | PR target/94680: Clear upper bits of V2DF using movq (like V2DI). | Roger Sayle | 1 | -3/+12 |
| 2022-03-08 | Optimize v4si broadcast for noavx512vl. | liuhongt | 1 | -1/+6 |
| 2022-03-07 | i386: Fix up cond_{and,ior,xor,mul}* [PR104779] | Jakub Jelinek | 1 | -2/+21 |
| 2022-02-24 | Fix typo in <code>v1ti3. | liuhongt | 1 | -2/+2 |
| 2022-02-10 | i386: Fix vec_unpacks_float_lo_v4si operand constraint [PR104469] | Uros Bizjak | 1 | -1/+1 |
| 2022-02-09 | ICE: QImode(not SImode) operand should be passed to gen_vec_initv16qiqi in as... | liuhongt | 1 | -1/+2 |
| 2022-01-19 | i386: Fix *aes<aeswideklvariant>u8 | Jakub Jelinek | 1 | -1/+1 |
| 2022-01-19 | i386: Fix GLC tuning with -masm=intel [PR104104] | Jakub Jelinek | 1 | -10/+10 |
| 2022-01-17 | Change references of .c files to .cc files | Martin Liska | 1 | -5/+5 |
| 2022-01-16 | [i386] GLC tuning: Break false dependency for dest register. | wwwhhhyyy | 1 | -8/+67 |
| 2022-01-15 | i386: Improve and optimize ix86_expand_sse_movcc | Uros Bizjak | 1 | -1/+1 |
| 2022-01-11 | Extend predicate of operands[1] from register_operand to vector_operand for a... | Haochen Jiang | 1 | -1/+1 |
| 2022-01-07 | Support commutative alternative for AVX512 vpcmpeq{b,w,d,q} | liuhongt | 1 | -32/+32 |
| 2022-01-07 | Optimize V16HF vector insert to element 0 for AVX2. | liuhongt | 1 | -26/+22 |
| 2022-01-04 | Force_reg operand 1. | liuhongt | 1 | -1/+2 |
| 2022-01-03 | Update copyright years. | Jakub Jelinek | 1 | -1/+1 |
| 2021-12-29 | i386: Robustify some expanders w.r.t. paradoxical SUBREGs | Uros Bizjak | 1 | -50/+65 |
| 2021-12-23 | Combine vpcmpuw + zero_extend to vpcmpuw. | liuhongt | 1 | -0/+275 |
| 2021-12-20 | i386: Fix <sse2p4_1>_pinsr<ssemodesuffix> and its splitters [PR103772] | Uros Bizjak | 1 | -27/+4 |
| 2021-12-20 | Optimize bit_and op1 float_vector_all_ones_operands to op1. | liuhongt | 1 | -0/+12 |
| 2021-12-18 | x86: PR target/103611: Splitter for DST:DI = (HI:SI<<32)|LO:SI. | Roger Sayle | 1 | -2/+2 |
| 2021-12-17 | Add combine splitter to transform vpternlogd/vpcmpeqd/vpxor/vblendvps to vble... | Haochen Jiang | 1 | -4/+40 |
| 2021-12-15 | Add combine splitter to transform vashr/vlshr/vashl_optab to ashr/lshr/ashl_o... | Haochen Jiang | 1 | -0/+14 |
| 2021-12-14 | i386: Implement VxHF vector set/insert/extract with lower ABI levels | Uros Bizjak | 1 | -11/+8 |
| 2021-12-08 | Add combine splitter to transform vpcmpeqd/vpxor/vblendvps to vblendvps for ~op0 | Haochen Jiang | 1 | -0/+27 |
| 2021-12-01 | i386: Improve V8HI and V8HF inserts [PR102811] | Uros Bizjak | 1 | -31/+139 |
| 2021-11-30 | x86_64: PR target/100711: Splitters for pandn | Roger Sayle | 1 | -0/+32 |
| 2021-11-29 | x86_64: Improved V1TImode rotations by non-constant amounts. | Roger Sayle | 1 | -2/+2 |
| 2021-11-29 | Optimize _Float16 usage for non AVX512FP16. | liuhongt | 1 | -1/+1 |
| 2021-11-29 | Fix regression introduced by r12-5536. | liuhongt | 1 | -3/+3 |
| 2021-11-11 | Extend vpcmov to handle V8HF/V16HFmode under TARGET_XOP. | liuhongt | 1 | -4/+4 |
| 2021-11-10 | i386: Support complex fma/conj_fma for _Float16. | konglin1 | 1 | -0/+23 |
| 2021-11-10 | i386: Optimization for mm512_set1_pch. | konglin1 | 1 | -0/+62 |
| 2021-11-04 | Extend vternlog define_insn_and_split to memory_operand to enable more optimz... | liuhongt | 1 | -12/+29 |
| 2021-11-04 | i386: Auto vectorize sdot_prod, usdot_prod with VNNI instruction. | Hongyu Wang | 1 | -8/+56 |
| 2021-11-02 | x86_64: Expand ashrv1ti (and PR target/102986) | Roger Sayle | 1 | -8/+19 |
| 2021-10-29 | Enable vectorization for _Float16 floor/ceil/trunc/nearbyint/rint operations. | liuhongt | 1 | -6/+6 |
| 2021-10-28 | AVX512FP16: Optimize _Float16 reciprocal for div and sqrt | Hongyu Wang | 1 | -3/+60 |
| 2021-10-26 | x86_64: Implement V1TI mode shifts/rotates by a constant | Roger Sayle | 1 | -0/+44 |
| 2021-10-25 | Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combine FADD(A, FMUL(B,... | konglin1 | 1 | -0/+52 |
| 2021-10-23 | x86_64: Add insn patterns for V1TI mode logic operations. | Roger Sayle | 1 | -0/+25 |
| 2021-10-15 | AVX512FP16: Enhance vector shuffle builtins | Hongyu Wang | 1 | -1/+53 |
| 2021-10-14 | AVX512FP16: Adjust builtin for mask complex fma | Hongyu Wang | 1 | -0/+183 |
| 2021-10-13 | x86_64: Some SUBREG related optimization tweaks to i386 backend. | Roger Sayle | 1 | -1/+2 |
| 2021-10-09 | Refine movhfcc. | liuhongt | 1 | -1/+0 |
| 2021-09-28 | Support 128/256/512-bit vector plus/smin/smax reduction for _Float16. | liuhongt | 1 | -2/+8 |
| 2021-09-27 | Revert "Optimize v4sf reduction.". | liuhongt | 1 | -28/+11 |
| 2021-09-24 | AVX512FP16: Support cond_op for HFmode | Hongyu Wang | 1 | -56/+56 |
| 2021-09-23 | AVX512FP16: Enable vec_cmpmn/vcondmn expanders for HF modes. | Hongyu Wang | 1 | -12/+72 |
