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AgeCommit message (Expand)AuthorFilesLines
2019-12-09Fix more unrecognised GCN instructionsAndrew Stubbs1-2/+2
2019-12-06Fix unrecognised GCN instruction.Andrew Stubbs1-2/+2
2019-12-06Enable QI/HImode vector movesAndrew Stubbs2-131/+162
2019-12-04Use fixed registers for queue ptr sgpr pairJulian Brown1-1/+1
2019-12-03Add missing amdgcn vcondu patternsAndrew Stubbs1-10/+10
2019-11-25config/gcn/mkoffload.c – remove unused static varsTobias Burnus1-11/+0
2019-11-25[amdgcn] Silence warnings + add gcc_unreachable()Tobias Burnus1-3/+3
2019-11-22Limit LDS usage.Andrew Stubbs1-4/+12
2019-11-22Use GFX9 granulated sgprs count correctly.Andrew Stubbs1-1/+9
2019-11-20AMD GCN symbol output with null cfunJulian Brown1-2/+4
2019-11-15[amdgcn] Unfix registers for frame pointerKwok Cheung Yeung1-2/+2
2019-11-15[amdgcn] Update lower bounds for the number of registers in non-leaf kernelsKwok Cheung Yeung1-6/+14
2019-11-15[amdgcn] Restrict registers available to non-kernel functionsKwok Cheung Yeung2-30/+39
2019-11-15[amdgcn] Reinitialize registers for every functionKwok Cheung Yeung1-0/+2
2019-11-15[amdgcn] Use first lane of v1 for zero offsetKwok Cheung Yeung1-14/+3
2019-11-15[amdgcn] Fix handling of VCC_CONDITIONAL_REGKwok Cheung Yeung1-1/+5
2019-11-14Pass the data vector mode to get_mask_modeRichard Sandiford1-2/+1
2019-11-13Use a single worker for OpenACC on AMD GCNAndrew Stubbs2-3/+3
2019-11-13GCN mkoffloadAndrew Stubbs2-0/+729
2019-11-13Move gcn-run heap into GPU memory.Andrew Stubbs1-16/+48
2019-11-05Really add gcc/config/gcn/t-omp-deviceTobias Burnus1-0/+4
2019-11-04Add gcc/config/gcn/t-omp-device for OpenMP declare variant kind/arch/isaTobias Burnus1-0/+32
2019-09-30Pass an ABI to choose_hard_reg_modeRichard Sandiford1-1/+1
2019-09-10Add call_used_or_fixed_reg_pRichard Sandiford1-3/+3
2019-09-09Remove AND_COMPL_HARD_REG_SETRichard Sandiford1-1/+1
2019-09-09Remove IOR_HARD_REG_SETRichard Sandiford1-1/+1
2019-09-09Remove AND_HARD_REG_SETRichard Sandiford1-9/+3
2019-09-09Remove COPY_HARD_REG_SETRichard Sandiford1-5/+5
2019-09-09Make note_stores take an rtx_insnRichard Sandiford1-2/+2
2019-09-05Global GCN instructions need nops too.Andrew Stubbs1-2/+2
2019-08-20Use function_arg_info for TARGET_MUST_PASS_IN_STACKRichard Sandiford1-16/+10
2019-08-20Use function_arg_info for TARGET_FUNCTION_ARG_ADVANCERichard Sandiford1-5/+5
2019-08-20Use function_arg_info for TARGET_FUNCTION_(INCOMING_)ARGRichard Sandiford1-12/+11
2019-08-20Use function_arg_info for TARGET_ARG_PARTIAL_BYTESRichard Sandiford1-5/+4
2019-08-20Add pass_va_arg_by_referenceRichard Sandiford1-1/+1
2019-08-13Use checking forms of DECL_FUNCTION_CODE (PR 91421)Richard Sandiford1-2/+2
2019-07-31Remove amdgcn expcnt waits.Andrew Stubbs3-38/+52
2019-07-06[amdgcn] Fix ambiguous .md attribute usesRichard Sandiford1-16/+16
2019-07-02Fix amdgcn regrename ICE.Andrew Stubbs1-8/+26
2019-06-25Create GCN-specific gthreadsKwok Cheung Yeung1-0/+12
2019-06-06Add -march=gfx906 for AMD GCN.Andrew Stubbs2-2/+5
2019-05-24GCN: Wait for exit value to write before exiting.Andrew Stubbs2-3/+6
2019-05-24Fix 64-bit addition in prologue.Andrew Stubbs1-3/+3
2019-05-22Add support for constructors and destuctors on GCNKwok Cheung Yeung2-27/+31
2019-05-22Fix trampoline execution failures on GCN5.Andrew Stubbs1-0/+4
2019-03-27Fix scc clobber in movdi_symbol.Andrew Stubbs1-1/+18
2019-03-18Implement circular print buffer.Andrew Stubbs1-21/+35
2019-02-19* config/gcn/gcn.c (print_operand): Fix typo.Jonathan Wakely1-1/+1
2019-01-17GCN back-end codeAndrew Stubbs13-0/+8991
2019-01-17GCN machine descriptionAndrew Stubbs4-0/+5244