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Age
Commit message (
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Author
Files
Lines
2021-07-19
amdgcn: Add -mxnack and -msram-ecc [PR 100208]
Andrew Stubbs
1
-0
/
+1
2021-06-29
amdgcn: Add clrsbsi2/clrsbdi2 implementation
Julian Brown
1
-2
/
+38
2021-06-29
amdgcn: Add [us]mulsid3/muldi3 patterns
Julian Brown
1
-0
/
+94
2021-06-29
amdgcn: Add [us]mulsi3_highpart SGPR alternatives
Julian Brown
1
-7
/
+55
2021-06-29
amdgcn: Mark s_mulk_i32 as clobbering SCC
Julian Brown
1
-1
/
+4
2021-01-12
amdgcn: Improve FP division accuracy
Julian Brown
1
-1
/
+2
2021-01-04
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2020-10-07
amdgcn: Use scalar instructions for addptrdi3
Andrew Stubbs
1
-12
/
+31
2020-09-11
amdgcn: align TImode registers
Andrew Stubbs
1
-0
/
+2
2020-09-08
amdgcn: Add waitcnt after LDS write instructions
Julian Brown
1
-4
/
+4
2020-08-04
amdgcn: TImode shifts
Andrew Stubbs
1
-0
/
+105
2020-04-29
[gcn] Fix build with RTL checking [PR94248]
Jakub Jelinek
1
-1
/
+1
2020-04-24
amdgcn: Split 64-bit constant loads post-reload
Andrew Stubbs
1
-3
/
+5
2020-03-27
amdgcn: refactor mode iterators
Andrew Stubbs
1
-0
/
+2
2020-03-02
amdgcn: Extend reductions to all types
Andrew Stubbs
1
-0
/
+1
2020-02-27
amdgcn: sub-dword vector min/max/shift/bit operators
Andrew Stubbs
1
-1
/
+1
2020-02-27
amdgcn: fix ICE on subreg of BI reg.
Andrew Stubbs
1
-0
/
+25
2020-02-21
amdgcn: Align VGPR pairs
Andrew Stubbs
1
-21
/
+17
2020-01-07
[amdgcn] Add more modes for vector comparisons
Andrew Stubbs
1
-1
/
+3
2020-01-01
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2019-12-17
Add clz and ctz for amdgcn
Andrew Stubbs
1
-2
/
+28
2019-09-05
Global GCN instructions need nops too.
Andrew Stubbs
1
-2
/
+2
2019-07-31
Remove amdgcn expcnt waits.
Andrew Stubbs
1
-29
/
+33
2019-07-02
Fix amdgcn regrename ICE.
Andrew Stubbs
1
-8
/
+26
2019-05-24
GCN: Wait for exit value to write before exiting.
Andrew Stubbs
1
-2
/
+2
2019-03-27
Fix scc clobber in movdi_symbol.
Andrew Stubbs
1
-1
/
+18
2019-01-17
GCN machine description
Andrew Stubbs
1
-0
/
+1857