riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-11-21	Make ARMv8-M attribute cmse_nonsecure_call work in Ada	Eric Botcazou	1	-11/+22
2022-10-28	c: tree: target: C2x (...) function prototypes and va_start relaxation	Joseph Myers	1	-1/+2
2022-09-30	arm, csky: Fix C++ ICEs with _Float16 and __fp16 [PR107080]	Jakub Jelinek	1	-0/+2
2022-09-05	rename DBX_REGISTER_NUMBER to DEBUGGER_REGNO	Martin Liska	1	-1/+1
2022-07-18	arm: Replace arm_builtin_vectorized_function [PR106253]	Richard Sandiford	1	-4/+0
2022-06-17	arm: fix checking ICE in arm_print_operand [PR106004]	Richard Earnshaw	1	-1/+2
2022-06-15	arm: big-endian issue in gen_cpymem_ldrd_strd [PR105981]	Richard Earnshaw	1	-8/+16
2022-06-15	arm: fix thinko in arm_bfi_1_p() [PR105974]	Richard Earnshaw	1	-3/+3
2022-06-07	arm: Improve code generation for BFI and BFC [PR105090]	Richard Earnshaw	1	-11/+102
2022-05-30	[ARM] Fix prototype for vec_perm_const hook.	Prathamesh Kulkarni	1	-2/+2
2022-05-25	Add new parameter to vec_perm_const hook for specifying operand mode.	Prathamesh Kulkarni	1	-1/+5
2022-05-13	arm: fix some issues in mve_vector_mem_operand	Richard Earnshaw	1	-9/+10
2022-05-04	arm: Restrict support of vectors of boolean immediates (PR target/104662)	Christophe Lyon	1	-0/+3
2022-03-29	arm: correctly handle zero-sized bit-fields in AAPCS [PR102024]	Richard Earnshaw	1	-3/+32
2022-03-29	arm: temporarily disable 'local' pcs selection (PR96882)	Richard Earnshaw	1	-1/+10
2022-03-08	arm: MVE: Relax addressing modes for full loads and stores	Andre Vieira	1	-12/+13
2022-03-07	arm: add missing space to error.	Martin Liska	1	-1/+1
2022-03-07	arm: fix option quoting in error messages.	Martin Liska	1	-3/+3
2022-02-22	arm: Fix vcond_mask expander for MVE (PR target/100757)	Christophe Lyon	1	-77/+40
2022-02-22	arm: Implement auto-vectorized MVE comparisons with vectors of boolean predic...	Christophe Lyon	1	-6/+50
2022-02-22	arm: Add support for VPR_REG in arm_class_likely_spilled_p	Christophe Lyon	1	-1/+1
2022-02-22	arm: Add GENERAL_AND_VPR_REGS regclass	Christophe Lyon	1	-0/+3
2022-01-21	[ARM] Add support for TLS register based stack protector canary access	Ard Biesheuvel	1	-0/+55
2022-01-20	arm: Add option for mitigating against Cortex-A CPU erratum for AES	Richard Earnshaw	1	-0/+9
2022-01-17	Change references of .c files to .cc files	Martin Liska	1	-6/+6
2022-01-17	Rename .c files to .cc files.	Martin Liska	1	-0/+34143