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2022-10-10arc: Remove obsolete mRcq and mRcw options.Claudiu Zissulescu1-4/+6
2022-10-10arc: Remove Rcq constraint.Claudiu Zissulescu3-116/+104
2022-10-10arc: Remove Rcw constraintClaudiu Zissulescu2-124/+110
2022-10-10arc: Remove Rcr constraintClaudiu Zissulescu2-28/+18
2022-10-10arc: Use negative enter pattern instruction's offsetsClaudiu Zissulescu1-3/+3
2022-10-06arc: Remove max-page-size and common-page-size forced settingClaudiu Zissulescu1-1/+0
2022-09-05rename DBX_REGISTER_NUMBER to DEBUGGER_REGNOMartin Liska2-3/+3
2022-09-02STABS: remove -gstabs and -gxcoff functionalityMartin Liska1-9/+1
2022-07-18arc: Add ARCHS release 310a tune variant.Claudiu Zissulescu8-90/+165
2022-07-18arc: Fix interrupt's epilogue.Claudiu Zissulescu1-1/+1
2022-03-01arc: Fix for new ifcvt behavior [PR104154]Robin Dapp1-0/+6
2022-02-25arc: Fail conditional move expand patternsClaudiu Zissulescu2-6/+22
2022-01-18Fix -Wformat-diag in various targets.Martin Liska1-1/+1
2022-01-17Change references of .c files to .cc filesMartin Liska5-16/+16
2022-01-17Rename .c files to .cc files.Martin Liska3-0/+0
2022-01-14arc: Add DWARF2 alternate CFA column.Claudiu Zissulescu1-3/+8
2022-01-14arc: Update stack size computation when accumulator registers are available.Claudiu Zissulescu1-5/+4
2022-01-03Update copyright years.Jakub Jelinek36-36/+36
2021-11-16arc: Update (u)maddhisi4 patternsClaudiu Zissulescu1-17/+17
2021-10-08Come up with OPTION_SET_P macro.Martin Liska1-2/+2
2021-09-14arc: Update ZOL pattern.Claudiu Zissulescu1-4/+4
2021-08-12arc: Small data doesn't need fcommon optionClaudiu Zissulescu1-3/+0
2021-06-14arc: Add --with-fpu support for ARCv2 cpusClaudiu Zissulescu1-0/+4
2021-06-09arc: Update doloop_end patternsClaudiu Zissulescu1-26/+20
2021-06-09arc: Fix (u)maddhisi patternsClaudiu Zissulescu1-25/+41
2021-06-09arc: Update 64bit move split patterns.Claudiu Zissulescu4-122/+52
2021-06-04arc: Don't allow millicode thunks with reduced register set CPUs.Claudiu Zissulescu1-2/+4
2021-06-03arc: Remove obsolete optionsClaudiu Zissulescu4-46/+7
2021-06-02arc: Remove define_insn_and_split *bbit_diKewen Lin1-28/+0
2021-06-02ARC: gcc driver default to hs38_linuxClaudiu Zissulescu1-1/+1
2021-05-26arc: Remove useless register keywordJan-Benedict Glaw1-10/+10
2021-05-18arc: Fix typo in negv2si2 patternClaudiu Zissulescu1-1/+1
2021-05-10arc: Improve vector support for ARCv2.Claudiu Zissulescu2-2/+111
2021-05-10arc: Cleanup simdext.md fileClaudiu Zissulescu1-330/+400
2021-05-10arc: Disable movmisalign patterns when aligned access is requiredClaudiu Zissulescu1-2/+2
2021-05-10arc: Fix compilation warnings.Claudiu Zissulescu1-1/+1
2021-05-10arc: Update ctz/clz patternsClaudiu Zissulescu2-23/+36
2021-05-10arc: Add alternative names for gp and fp registers.Claudiu Zissulescu1-0/+2
2021-03-09arc: Remove orphan function.Claudiu Zissulescu1-17/+0
2021-01-05arc: fix accumulator first register.Claudiu Zissulescu1-4/+4
2021-01-04Update copyright years.Jakub Jelinek36-36/+36
2020-12-29arc: generate mac(u) insn instead of macd(u) when destination is acclClaudiu Zissulescu1-10/+14
2020-12-29arc: flip if-condition predicates in secondary reload hookClaudiu Zissulescu1-1/+1
2020-12-29arc: Make use reg_renumber safe.Claudiu Zissulescu1-1/+1
2020-12-29arc: Fix cached to uncached moves.Claudiu Zissulescu1-2/+10
2020-12-29arc: Don't use predicated vadd2 instructions in mov patterns.Claudiu Zissulescu2-5/+5
2020-12-16opts: Remove all usages of Report keyword.Martin Liska1-55/+55
2020-12-11arc: Update ARC700 cache hazard detection.Claudiu Zissulescu1-29/+23
2020-12-11arc: Avoid generating brcc instructions with limmClaudiu Zissulescu1-0/+1
2020-12-11arc: Refurbish adc/sbc patternsClaudiu Zissulescu3-122/+29