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AgeCommit message (Expand)AuthorFilesLines
2018-10-01[ARC] Avoid specific constants to end in limm field.Claudiu Zissulescu2-31/+24
2018-10-01[ARC] Check for odd-even register when emitting double mac ops.Claudiu Zissulescu1-2/+2
2018-09-17[ARC] Enable DBNZ for core3 and newer CPUs.Vineet Gupta2-3/+4
2018-09-17[ARC] Update LINK_EH_SPEC linker spec.Alexey Brodkin1-1/+1
2018-07-31Add support for -nolibcOlivier Hainque1-1/+1
2018-07-25[ARC] Improve instruction selection for fp moves.Claudiu Zissulescu3-40/+50
2018-07-25[ARC] Fix uncache attribute.Claudiu Zissulescu1-14/+26
2018-07-25[ARC] Add more additional register namesClaudiu Zissulescu1-1/+9
2018-07-17[ARC] Don't use deprecated align_labels_log variable.Claudiu Zissulescu1-4/+5
2018-07-16[ARC] Update ARCHS scheduling rules.Claudiu Zissulescu1-6/+15
2018-07-16[ARC] Add support for HS4x cpus.Claudiu Zissulescu8-13/+286
2018-06-15[ARC] Fix warning in arc_return_address_register.Claudiu Zissulescu1-1/+1
2018-06-13emit-rtl.c: more typesafetyDavid Malcolm1-2/+2
2018-06-13[ARC] Update fma expansions.Claudiu Zissulescu1-0/+6
2018-06-13[ARC] Reimplement return padding operation for ARC700.Claudiu Zissulescu3-93/+90
2018-06-13[ARC] Define LINK_GCC_C_SEQUENCE_SPEC.Claudiu Zissulescu1-0/+5
2018-06-13[ARC] SYNC instruction is valid on all ARC cores.Claudiu Zissulescu1-1/+1
2018-06-13[ARC] Allow EX instruction unconditionallyClaudiu Zissulescu1-1/+1
2018-06-12[PATCH] [ARC][QuarkSE] UpdateClaudiu Zissulescu4-31/+58
2018-06-12[ARC] Update warning messges.Claudiu Zissulescu3-59/+77
2018-05-21[ARC] Add multilib support for linux targetsAlexey Brodkin1-0/+25
2018-04-30[ARC] Clear the instruction cache using syscalls.Claudiu Zissulescu1-0/+14
2018-04-30[ARC] Cleanup sdata handling.Claudiu Zissulescu4-240/+101
2018-04-30[ARC] Update movhi and movdi patterns.Claudiu Zissulescu2-13/+15
2018-04-23[ARC] Fix FLS, SETI patterns.Claudiu Zissulescu1-9/+5
2018-04-23[ARC] Update sleep builtin.Claudiu Zissulescu3-29/+2
2018-04-09[ARC] Fix stack usage info for naked functions.Alexey Brodkin1-1/+5
2018-04-09[ARC] Add/update combiner patterns.Claudiu Zissulescu2-47/+233
2018-03-06[ARC] Cleanup unused functions.Claudiu Zissulescu3-473/+4
2018-02-19re PR target/84146 (ICE with -mcet in dwarf2out_var_location, involving sigse...Jakub Jelinek1-4/+1
2018-01-31[ARC] Add 'aux' variable attribute.Claudiu Zissulescu1-1/+158
2018-01-31[ARC] Add 'uncached' attribute.Claudiu Zissulescu3-6/+73
2018-01-26[ARC] Add ARCv2 core3 tune option.Claudiu Zissulescu5-30/+42
2018-01-26[ARC] Rework delegitimate_address hookClaudiu Zissulescu1-52/+39
2018-01-26[ARC] Add support for reduced register file setClaudiu Zissulescu12-8/+59
2018-01-26[ARC] Add SJLI support.Claudiu Zissulescu4-55/+148
2018-01-26[ARC] Add JLI support.Claudiu Zissulescu9-80/+304
2018-01-08[ARC] Revamp trampoline implementationClaudiu Zissulescu3-58/+43
2018-01-08[ARC] Enable unaligned access.Claudiu Zissulescu2-1/+2
2018-01-03poly_int: GET_MODE_SIZERichard Sandiford1-2/+4
2018-01-03Update copyright years.Jakub Jelinek33-33/+33
2018-01-03poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECTOR_SIZESRichard Sandiford1-3/+7
2017-12-19[ARC][COMMITTED] Clean up build warnings.Claudiu Zissulescu1-3/+3
2017-12-19commit_messageClaudiu Zissulescu1-12/+48
2017-12-18[ARC] Update (u)maddsidi patterns.Claudiu Zissulescu1-4/+28
2017-12-18[ARC] Update legitimate constant hook.Claudiu Zissulescu1-6/+0
2017-12-16poly_int: IN_TARGET_CODERichard Sandiford3-0/+6
2017-12-15tree-core.h (struct attribute_spec): Swap affects_type_identity and handler f...Jakub Jelinek1-9/+9
2017-12-14[SFN] next/prev_nonnote_insn_bb are no more, even for portsAlexandre Oliva1-1/+1
2017-12-08arc.c (arc_attribute_table): Add exclusions to the comment.Jakub Jelinek1-1/+1
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