aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/aarch64
AgeCommit message (Expand)AuthorFilesLines
2024-08-09aarch64: Check CONSTM1_RTX in definition of Dm constraintKyrylo Tkachov1-1/+1
2024-08-08AArch64: Fix signbit mask creation after late combine [PR116229]Tamar Christina3-2/+12
2024-08-06AArch64: take gather/scatter decode overhead into accountTamar Christina14-0/+60
2024-08-05AArch64: Set instruction attribute of TST to logics_immJennifer Schmitz1-1/+1
2024-08-02AArch64: Fuse CMP+CSEL and CMP+CSET for -mcpu=neoverse-v2Jennifer Schmitz3-1/+26
2024-08-01aarch64: Improve Advanced SIMD popcount expansion by using SVE [PR113860]Pengxuan Zheng3-6/+21
2024-08-01AArch64: Add Cortex-X925 core definition and cost modelTamar Christina4-1/+249
2024-08-01AArch64: Update Neoverse N2 cost model to release costsTamar Christina1-23/+23
2024-08-01AArch64: Update Generic Armv9-a cost model to release costsTamar Christina1-25/+25
2024-08-01AArch64: Add Neoverse N3 and Cortex-A725 core definition and cost modelTamar Christina4-1/+249
2024-08-01AArch64: Add Neoverse V3AE core definition and cost modelTamar Christina4-1/+249
2024-08-01AArch64: Add Neoverse V3 core definition and cost modelTamar Christina4-2/+250
2024-08-01AArch64: Update Neoverse V2 cost model to release costsTamar Christina2-20/+20
2024-07-31aarch64: Add fpm register helper functions.Claudio Bantaloukas3-0/+82
2024-07-31aarch64: Add support for moving fpm system registerClaudio Bantaloukas4-14/+41
2024-07-31aarch64: Add march flags for +fp8 arch extensionsClaudio Bantaloukas2-0/+5
2024-07-30SVE intrinsics: Add strength reduction for division by constant.Jennifer Schmitz1-1/+48
2024-07-26aarch64: sve: Rename aarch64_bic to standard pattern, andnAndrew Pinski2-3/+3
2024-07-26aarch64: Use iorn and andn standard pattern names for scalar modesAndrew Pinski1-6/+6
2024-07-26aarch64: Rename bic/orn patterns to iorn/andn for vector modesAndrew Pinski1-10/+10
2024-07-26aarch64: Fix target/optimize option handling with transiting between O1 to O2Andrew Pinski1-1/+1
2024-07-25rtl-ssa: Define INCLUDE_ARRAYRichard Sandiford2-0/+2
2024-07-25SVE Intrinsics: Change return type of redirect_call to gcall.Jennifer Schmitz3-5/+5
2024-07-24aarch64: Extend aarch64_feature_flags to 128 bitsAndrew Carlotti4-13/+25
2024-07-24aarch64: Use constructor explicitly in get_flags_offAndrew Carlotti1-2/+3
2024-07-24aarch64: Add bool conversion to TARGET_* macrosAndrew Carlotti5-131/+79
2024-07-24aarch64: Add explicit bool cast to return valueAndrew Carlotti1-1/+1
2024-07-24aarch64: Decouple feature flag option storage typeAndrew Carlotti2-5/+10
2024-07-24aarch64: Define aarch64_get_{asm_|}isa_flagsAndrew Carlotti2-22/+25
2024-07-24aarch64: Introduce aarch64_isa_mode typeAndrew Carlotti4-77/+94
2024-07-24aarch64: Eliminate a temporary variable.Andrew Carlotti1-5/+4
2024-07-24aarch64: Move AARCH64_NUM_ISA_MODES definitionAndrew Carlotti2-5/+5
2024-07-24aarch64: Remove unused global aarch64_tune_flagsAndrew Carlotti1-4/+0
2024-07-24Revert "aarch64: Fuse CMP+CSEL and CMP+CSET for -mcpu=neoverse-v2"Kyrylo Tkachov3-25/+1
2024-07-24aarch64: Fuse CMP+CSEL and CMP+CSET for -mcpu=neoverse-v2Jennifer Schmitz3-1/+25
2024-07-22aarch64: Tighten aarch64_simd_mem_operand_p [PR115969]Richard Sandiford1-2/+3
2024-07-22AArch64: implement TARGET_VECTORIZE_CONDITIONAL_OPERATION_IS_EXPENSIVE [PR11...Tamar Christina1-0/+12
2024-07-12aarch64: Avoid alloca in target attribute parsingRichard Sandiford1-4/+8
2024-07-05AArch64: lower 2 reg TBL permutes with one zero register to 1 reg TBL.Tamar Christina1-6/+34
2024-07-05AArch64: remove aarch64_simd_vec_unpack<su>_lo_Tamar Christina2-18/+5
2024-07-04Aarch64, bugfix: Fix NEON bigendian addp intrinsic [PR114890]Alfie Richards1-2/+0
2024-07-03aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macroKyrylo Tkachov1-0/+3
2024-07-03aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macroKyrylo Tkachov1-0/+2
2024-07-02aarch64: Add vector popcount besides QImode [PR113859]Pengxuan Zheng1-1/+40
2024-06-28i386: Fix regression after refactoring legitimize_pe_coff_symbol, ix86_GOT_al...Evgeny Karpov1-1/+1
2024-06-26[aarch64] Add support for -mcpu=graceKyrylo Tkachov2-1/+3
2024-06-25aarch64: Add DLL import/export to AArch64 targetEvgeny Karpov2-2/+50
2024-06-25aarch64: Add selectany attribute handlingEvgeny Karpov2-1/+7
2024-06-25Move mingw_* declarations to the mingw folderEvgeny Karpov2-9/+0
2024-06-25Replace {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE with new hook mode_for_floating_typeKewen Lin2-6/+15
generated by cgit v1.1 at 2025-02-04 16:35:50 +0000