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2024-10-15AArch64: re-enable memory access costing after SLP change.Tamar Christina1-25/+29
2024-10-15SVE intrinsics: Fold svmul with constant power-of-2 operand to svlslJennifer Schmitz1-1/+32
2024-10-14AArch64: rename the SVE2 psel intrinsics to psel_lane [PR116371]Tamar Christina3-4/+4
2024-10-14aarch64: Fix folding of degenerate svwhilele case [PR117045]Richard Sandiford1-1/+10
2024-10-11PR target/117048 aarch64: Use more canonical and optimization-friendly repres...Kyrylo Tkachov1-4/+29
2024-10-11aarch64: Add codegen support for SVE2 faminmaxSaurabh Jha2-0/+43
2024-10-11aarch64: Add SVE2 faminmax intrinsicsSaurabh Jha5-1/+29
2024-10-09aarch64: Fix SVE ACLE gimple folds for C++ LTO [PR116629]Richard Sandiford1-1/+1
2024-10-08aarch64: Expand CTZ to RBIT + CLZ for SVE [PR109498]Soumya AR1-0/+17
2024-10-07aarch64: Fix general permutes of svbfloat16_tsRichard Sandiford2-18/+17
2024-10-07aarch64: Handle SVE modes in aarch64_evpc_reencode [PR116583]Richard Sandiford1-9/+46
2024-10-04aarch64: Fix bug with max/min (PR116934)Saurabh Jha1-4/+4
2024-10-04aarch64: Set Armv9-A generic L1 cache line size to 64 bytesKyrylo Tkachov1-1/+13
2024-10-03Aarch64: Define WIDEST_HARDWARE_FP_SIZEEric Botcazou1-0/+2
2024-10-03aarch64: Fix early ra for -fno-delete-dead-exceptions [PR116927]Andrew Pinski1-0/+6
2024-10-01aarch64: Introduce new unspecs for smax/sminSaurabh Jha2-61/+45
2024-10-01aarch64: Add fp8 scalar typesClaudio Bantaloukas4-2/+79
2024-09-30aarch64: Fix aarch64 backend-use of (u|s|us)dot_prod patternsVictor Do Nascimento8-17/+51
2024-09-23aarch64: Add codegen support for AdvSIMD faminmaxSaurabh Jha2-0/+12
2024-09-23aarch64: Add AdvSIMD faminmax intrinsicsSaurabh Jha6-0/+167
2024-09-23dwarf2: add hooks for architecture-specific CFIsMatthieu Longo1-0/+33
2024-09-23Rename REG_CFA_TOGGLE_RA_MANGLE to REG_CFA_NEGATE_RA_STATEMatthieu Longo1-2/+2
2024-09-22aarch64: Take into account when VF is higher than known scalar itersTamar Christina1-0/+13
2024-09-20AArch64: Define VECTOR_STORE_FLAG_VALUE.Tamar Christina1-0/+10
2024-09-19SVE intrinsics: Fold svmul with all-zero operands to zero vectorJennifer Schmitz1-1/+16
2024-09-19aarch64: Define l1_cache_line_size for -mcpu=neoverse-v2Kyrylo Tkachov1-1/+14
2024-09-17SVE intrinsics: Fold svdiv with all-zero operands to zero vectorJennifer Schmitz1-9/+20
2024-09-16aarch64: Improve vector constant generation using SVE INDEX instruction [PR11...Pengxuan Zheng1-1/+12
2024-09-16aarch64: Emit ADD X, Y, Y instead of SHL X, Y, #1 for SVE instructions.Soumya AR1-3/+15
2024-09-10Pass host specific ABI opts from mkoffload.Prathamesh Kulkarni1-2/+2
2024-09-06aarch64: Use is_attribute_namespace_p and get_attribute_name inside aarch64_l...Andrew Pinski1-6/+2
2024-09-03SVE intrinsics: Fold constant operands for svmul.Jennifer Schmitz1-1/+14
2024-09-03SVE intrinsics: Fold constant operands for svdiv.Jennifer Schmitz3-3/+52
2024-08-29Use std::unique_ptr for optinfo_itemDavid Malcolm1-0/+1
2024-08-28aarch64: Assume zero gather/scatter set-up cost for -mtune=genericRichard Sandiford1-2/+2
2024-08-28aarch64: Fix gather x32/x64 selectionRichard Sandiford1-2/+5
2024-08-23optabs-query: Use opt_machine_mode for smallest_int_mode_for_size [PR115495].Robin Dapp1-2/+4
2024-08-22PR target/116365: Add user-friendly arguments to --param aarch64-autovec-pref...Jennifer Schmitz3-8/+45
2024-08-21aarch64: Fix caller saves of VNx2QI [PR116238]Richard Sandiford1-3/+4
2024-08-21aarch64: Implement popcountti2 pattern [PR113042]Andrew Pinski1-0/+13
2024-08-19aarch64: Fix ls64 intrinsic availabilityAndrew Carlotti2-4/+8
2024-08-19aarch64: Fix memtag intrinsic availabilityAndrew Carlotti2-33/+13
2024-08-19aarch64: Fix tme intrinsic availabilityAndrew Carlotti2-59/+34
2024-08-19aarch64: Move check_required_extensionsAndrew Carlotti3-103/+106
2024-08-19aarch64: Refactor check_required_extensionsAndrew Carlotti1-18/+20
2024-08-19aarch64: Reduce FP reassociation width for Neoverse V2 and set AARCH64_EXTRA_...Kyrylo Tkachov1-3/+4
2024-08-19aarch64: Implement 16-byte vector mode const0 store by TImodeHaochen Gui1-1/+10
2024-08-15aarch64: Improve popcount for bytes [PR113042]Andrew Pinski1-13/+24
2024-08-15aarch64: Rename svpext to svpext_lane [PR116371]Richard Sandiford3-4/+4
2024-08-12aarch64: Emit ADD X, Y, Y instead of SHL X, Y, #1 for Advanced SIMDKyrylo Tkachov2-5/+13
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