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AgeCommit message (Expand)AuthorFilesLines
2024-07-30RISC-V: Add configure check for B extention supportEdwin Lu1-0/+6
2024-07-30RISC-V: Remove configure check for zabhaPatrick O'Neill1-6/+0
2024-07-15varasm: Add support for emitting binary data with the new gas .base64 directiveJakub Jelinek1-0/+6
2024-07-03RISC-V: Add support for Zabha extensionGianluca Guida1-0/+6
2024-06-17RISC-V: Add configure check for Zaamo/Zalrsc assembler supportPatrick O'Neill1-0/+6
2024-05-07Remove obsolete Solaris 11.3 supportRainer Orth1-13/+0
2024-02-23x86-64: Check R_X86_64_CODE_6_GOTTPOFF supportH.J. Lu1-0/+7
2024-01-24MIPS: Accept arguments for -mexplicit-relocsYunQiang Su1-0/+6
2024-01-14AVR: Support .rodata in Flash for AVR64* and AVR128* Devices.Georg-Johann Lay1-0/+12
2024-01-02LoongArch: Added TLS Le Relax support.Lulu Cheng1-0/+6
2023-11-24gcc: configure: drop Valgrind 3.1 compatibilityAlexander Monakov1-12/+0
2023-11-23gcc: Introduce -fhardenedMarek Polacek1-0/+18
2023-11-18LoongArch: Add code generation support for call36 function calls.Lulu Cheng1-0/+6
2023-11-14LoongArch: Disable relaxation if the assembler don't support conditional bran...Xi Ruoyao1-1/+34
2023-11-06rs6000: Consider inline asm as safe if no assembler complains [PR111828]Kewen Lin1-0/+6
2023-10-22Darwin, rpaths: Add --with-darwin-extra-rpath.Iain Sandoe1-0/+13
2023-10-18Darwin: Check as for .build_version support and use it if available.Iain Sandoe1-0/+6
2023-09-20LoongArch: Check whether binutils supports the relax function. If supported, ...Lulu Cheng1-0/+6
2023-08-31Darwin: homogenize spelling of macOSFrancois-Xavier Coudert1-4/+2
2023-07-21Darwin: Handle linker '-demangle' option.Iain Sandoe1-1/+8
2023-06-12Remove DEFAULT_MATCHPD_PARTITIONS macroTamar Christina1-6/+0
2023-06-12Regenerate config.inTamar Christina1-2/+7
2022-12-14Merge modula-2 front end onto gcc.Gaius Mulley1-6/+6
2022-10-25MIPS: fix building on multiarch platformYunQiang Su1-0/+6
2022-10-19gcc: Add 'mcf' thread model support from mcfgthreadLIU Hao1-4/+6
2022-10-09MIPS: improve -march=native arch detectionYunQiang Su1-0/+10
2022-09-07Restore detection of HAVE_XCOFF_DWARF_EXTRASMartin Liska1-0/+7
2022-09-02STABS: remove -gstabs and -gxcoff functionalityMartin Liska1-19/+0
2022-08-22jobserver: detect properly O_NONBLOCKMartin Liska1-0/+6
2022-07-29LoongArch: Define the macro ASM_PREFERRED_EH_DATA_FORMAT by checking the asse...Lulu Cheng1-1/+7
2022-06-06arm: reinstate HAVE_GAS_ARM_EXTENDED_ARCHAndrew Stubbs1-0/+7
2022-05-24amdgcn: Remove LLVM 9 assembler/linker supportAndrew Stubbs1-73/+6
2022-01-12aix: handle 64bit inodes for include directoriesClément Chigot1-0/+12
2021-11-15configure, Darwin: Check ld64 support for -platform-version.Iain Sandoe1-0/+6
2021-10-07amdgcn: Support LLVM 13 assembler syntaxAndrew Stubbs1-4/+40
2021-09-21arm: pass architecture extensions to assembler if supportedRichard Earnshaw1-0/+7
2021-08-17Darwin, X86, config: Adjust 'as' command lines [PR100340].Iain Sandoe1-0/+7
2021-08-12Make -no-pie option work for native WindowsEric Botcazou1-0/+6
2021-07-28amdgcn: Fix attributes for LLVM-12 [PR 100208]Andrew Stubbs1-0/+24
2021-07-05Darwin, configury : Allow for specification and detection of dsymutil.Iain Sandoe1-0/+12
2021-06-18gcc/configure.ac: fix register issue for global_load assembler functionsMarcel Vollweiler1-0/+6
2021-04-29Add parallelism support to gcov for MinGW platformsEric Botcazou1-0/+12
2021-04-28offload-defaulted: Config option to silently ignore uninstalled offload compi...Tobias Burnus1-0/+6
2021-03-31i386, debug: Default to -gdwarf-4 on Windows targets with broken ld.bfd [PR98...Jakub Jelinek1-0/+6
2020-12-24C++ : Add the -stdlib= option.Iain Sandoe1-0/+6
2020-12-02Use the section flag 'o' for __patchable_function_entriesH.J. Lu1-0/+6
2020-12-01Use SHF_GNU_RETAIN to preserve symbol definitionsH.J. Lu1-0/+7
2020-12-01IBM Z: Configure excess precision for float at compile-timeMarius Hillenbrand1-0/+4
2020-11-19config: Add tests for modules-desired featuresNathan Sidwell1-12/+48
2020-11-18RISC-V: Support version controling for ISA standard extensionsKito Cheng1-0/+12