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AgeCommit message (Expand)AuthorFilesLines
2016-11-16Optimise CONCAT handling in emit_group_loadRichard Sandiford1-0/+8
2016-11-16Fix handling of unknown sizes in rtx_addr_can_trap_pRichard Sandiford1-0/+6
2016-11-16Fix nb_iterations_estimate calculation in tree-vect-loop.cRichard Sandiford1-0/+8
2016-11-16Fix pdp11 buildRichard Sandiford1-0/+4
2016-11-16Fix missing brackets in arc.cRichard Sandiford1-0/+4
2016-11-16[ARM] PR target/78364: Add proper restrictions to zero and sign_extract patte...Kyrylo Tkachov1-0/+7
2016-11-16re PR tree-optimization/78348 ([7 REGRESSION] 15% performance drop for corema...Richard Biener1-0/+8
2016-11-16re PR sanitizer/77823 (ICE: in ubsan_encode_value, at ubsan.c:137 with -fsani...Jakub Jelinek1-0/+18
2016-11-15install.texi: Remove references to java/libjava.Matthias Klose1-0/+4
2016-11-15tree-ssa-coalesce.c (register_default_def): Remove register_ssa_partition.Kugan Vivekanandarajah1-0/+7
2016-11-15genattrtab.c (attr_rtx_1): Avoid allocating new rtx objects.Bernd Edlinger1-0/+17
2016-11-15install.texi: Remove references to java/libjava.Matthias Klose1-0/+2
2016-11-15install.texi: Remove references to java/libjava.Matthias Klose1-0/+5
2016-11-15Fix instances of gen_rtx_REG (VOIDmode, ...)Richard Sandiford1-0/+14
2016-11-15Use MEM_SIZE rather than GET_MODE_SIZE in dce.cRichard Sandiford1-0/+8
2016-11-15Use simplify_gen_binary in canon_rtxRichard Sandiford1-0/+6
2016-11-15Add a load_extend_op wrapperRichard Sandiford1-0/+18
2016-11-15Fix simplify_shift_const_1 handling of vector shiftsRichard Sandiford1-0/+9
2016-11-15Move misplaced assignment in num_sign_bit_copies1Richard Sandiford1-0/+7
2016-11-15config-ml.in: Remove references to GCJ.Matthias Klose1-0/+5
2016-11-15tree-ssa-threadbackward.c (fsm_find_thread_path): Remove unneeded parameter.Jeff Law1-0/+10
2016-11-15ChangeLog: Fix ChangeLog entry.Uros Bizjak1-13/+0
2016-11-15[ARC] New option handling, refurbish multilib support.Claudiu Zissulescu1-0/+62
2016-11-15MIPS/GCC: Mark trailing labels with `.insn'Maciej W. Rozycki1-0/+10
2016-11-15re PR target/77881 (Non-optimal signed comparison on x86_64 since r146817)Michael Matz1-0/+8
2016-11-15Fix scripto in ChangeLogRichard Sandiford1-2/+0
2016-11-15Fix a GET_MODE_CLASS typo in mem_loc_descriptorRichard Sandiford1-0/+9
2016-11-14rs6000.c (rs6000_expand_vector_set): Add support for using xxinsertw and vins...Michael Meissner1-1/+10
2016-11-14c-cppbuiltin.c (c_cpp_builtins): Define __cpp_structured_bindings.Jakub Jelinek1-19/+19
2016-11-14tree-ssa-math-opts.c (find_bswap_or_nop): Zero out bytes in cmpxchg and cmpno...Thomas Preud'homme1-0/+8
2016-11-14i386.md (*andndi3_doubleword): Merge operand constraints.Uros Bizjak1-0/+5
2016-11-14Fix dump output in dse_optimize_stmtMartin Liska1-0/+5
2016-11-14Make-lang.in (C_AND_OBJC_OBJS): Add gimple-parser.o.Prasad Ghangal1-0/+36
2016-11-14Introduce -fprofile-update=prefer-atomicMartin Liska1-0/+11
2016-11-14The second patch updates the Cortex-A57 scheduler now that we can differentia...Wilco Dijkstra1-0/+5
2016-11-14Currently the SBFM, UBFM and BFM instructions all use the attribute "bfm".Wilco Dijkstra1-0/+22
2016-11-14The existing vector costs stop some beneficial vectorization.Wilco Dijkstra1-0/+5
2016-11-14re PR tree-optimization/78312 (wrong code due to ssa-backprop)Richard Biener1-0/+6
2016-11-14re PR target/78093 ([avr] New variable attribute "absdata" and option "-mabsd...Georg-Johann Lay1-0/+13
2016-11-14Implement P0217R3 - C++17 structured bindingsJakub Jelinek1-0/+5
2016-11-13pr78268.C: New test.Kugan Vivekanandarajah1-0/+13
2016-11-13re PR tree-optimization/35503 (Warning about restricted pointers?)Prathamesh Kulkarni1-0/+20
2016-11-13ipa-icf.c (sem_function::merge): Do not create a wrapper also if the original...Eric Botcazou1-0/+5
2016-11-13re PR target/78336 (powerpc-darwin bootstrap broken (probably by 241930))David Edelsohn1-0/+6
2016-11-12rs6000: Don't forget to initialize the TOC (PR77957)Segher Boessenkool1-0/+6
2016-11-11re PR rtl-optimization/59461 (missed zero-extension elimination in the combiner)Eric Botcazou1-0/+12
2016-11-11i386.md (*<shift_insn><mode>3_doubleword): Mark operand 0 as earlyclobber.Uros Bizjak1-0/+1
2016-11-11re PR target/78243 (incorrect byte offset in vextractuh with -mcpu=power9)Michael Meissner1-0/+10
2016-11-11re PR target/78310 (ICE: insn does not satisfy its constraints: {*bmi2_rorxdi...Uros Bizjak1-10/+13
2016-11-11gimple-ssa-isolate-paths.c (is_divmod_with_given_divisor): New function.Jeff Law1-0/+11
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