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2024-02-21doc: Fix typos in -Wmismatched-dealloc docsJonathan Wakely1-1/+1
gcc/ChangeLog: * doc/invoke.texi (Warning Options): Fix typos.
2024-02-21RISC-V: Specify mtune and march for PR113742Edwin Lu1-2/+2
The testcase pr113742.c is failing for 32 bit targets due to the following cc1 error: cc1: error: ABI requries '-march=rv64' Specify '-march=rv64gc' with '-mtune=sifive-p600-series' PR target/113742 gcc/testsuite/ChangeLog: * gcc.target/riscv/pr113742.c: change mcpu to mtune and add march Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
2024-02-21bpf: add inline memmove and memcpy expansionDavid Faust6-0/+248
BPF programs are not typically linked, which means we cannot fall back on library calls to implement __builtin_{memmove,memcpy} and should always expand them inline if possible. GCC already successfully expands these builtins inline in many cases, but failed to do so for a few for simple cases involving overlapping memmove in the kernel BPF selftests and was instead emitting a libcall. This patch implements a simple inline expansion of memcpy and memmove in the BPF backend in a verifier-friendly way, with the caveat that the size must be an integer constant, which is also required by clang. gcc/ * config/bpf/bpf-protos.h (bpf_expand_cpymem): New. * config/bpf/bpf.cc: (emit_move_loop, bpf_expand_cpymem): New. * config/bpf/bpf.md: (cpymemdi, movmemdi): New define_expands. gcc/testsuite/ * gcc.target/bpf/memcpy-1.c: New test. * gcc.target/bpf/memmove-1.c: New test. * gcc.target/bpf/memmove-2.c: New test.
2024-02-21PR modula2/114026 Incorrect location during for loop type checkingGaius Mulley13-72/+386
If a for loop contains an incompatible type expression between the designator and the second expression then the location used when generating the error message is set to token 0. The bug is fixed by extending the range checking InitForLoopBeginRangeCheck. The range checking is processed after all types, constants have been resolved (and converted into gcc trees). The range check will check for assignment compatibility between des and expr1, expression compatibility between des and expr2. Separate token positions for des, exp1, expr2 and by are stored in the Range record and used to create virtual tokens if they are on the same source line. gcc/m2/ChangeLog: PR modula2/114026 * gm2-compiler/M2GenGCC.mod (Import): Remove DisplayQuadruples. Remove DisplayQuadList. (MixTypesBinary): Replace check with overflowCheck. New variable typeChecking. Use GenQuadOTypetok to retrieve typeChecking. Use typeChecking to suppress error message. * gm2-compiler/M2LexBuf.def (MakeVirtual2Tok): New procedure function. * gm2-compiler/M2LexBuf.mod (MakeVirtualTok): Improve comment. (MakeVirtual2Tok): New procedure function. * gm2-compiler/M2Quads.def (GetQuadOTypetok): New procedure. * gm2-compiler/M2Quads.mod (QuadFrame): New field CheckType. (PutQuadO): Rewrite using PutQuadOType. (PutQuadOType): New procedure. (GetQuadOTypetok): New procedure. (BuildPseudoBy): Rewrite. (BuildForToByDo): Remove type checking. Add parameters e2, e2tok, BySym, bytok to InitForLoopBeginRange. Push the RangeId. (BuildEndFor): Pop the RangeId. Use GenQuadOTypetok to generate AddOp without type checking. Call PutRangeForIncrement with the RangeId and IncQuad. (GenQuadOtok): Rewrite using GenQuadOTypetok. (GenQuadOTypetok): New procedure. * gm2-compiler/M2Range.def (InitForLoopBeginRangeCheck): Rename d as des, e as expr. Add expr1, expr1tok, expr2, expr2tok, byconst, byconsttok parameters. (PutRangeForIncrement): New procedure. * gm2-compiler/M2Range.mod (Import): MakeVirtual2Tok. (Range): Add expr2, byconst, destok, exprtok, expr2tok, incrementquad. (InitRange): Initialize expr2 to NulSym. Initialize byconst to NulSym. Initialize tokenNo, destok, exprtok, expr2tok, byconst to UnknownTokenNo. Initialize incrementquad to 0. (PutRangeForIncrement): New procedure. (PutRangeDesExpr2): New procedure. (InitForLoopBeginRangeCheck): Rewrite. (ForLoopBeginTypeCompatible): New procedure function. (CodeForLoopBegin): Call ForLoopBeginTypeCompatible and only code the for loop assignment if all the type checks succeed. gcc/testsuite/ChangeLog: PR modula2/114026 * gm2/extensions/run/pass/callingc10.mod: New test. * gm2/extensions/run/pass/callingc11.mod: New test. * gm2/extensions/run/pass/callingc9.mod: New test. * gm2/extensions/run/pass/strconst.def: New test. * gm2/pim/fail/forloop.mod: New test. * gm2/pim/pass/forloop2.mod: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-02-21ipa: Convert lattices from pure array to vector (PR 113476)Martin Jambor41-285/+380
In PR 113476 we have discovered that ipcp_param_lattices is no longer a POD and should be destructed. In a follow-up discussion it transpired that their initialization done by memsetting their backing memory to zero is also invalid because now any write there before construction can be considered dead. Plus that having them in an array is a little bit old-school and does not get the extra checking offered by vector along with automatic construction and destruction when necessary. So this patch converts the array to a vector. That however means that ipcp_param_lattices cannot be just a forward declared type but must be known to all code that deals with ipa_node_params and thus to all code that includes ipa-prop.h. Therefore I have moved ipcp_param_lattices and the type it depends on to a new header ipa-cp.h which now ipa-prop.h depends on. Because we have the (IMHO not a very wise) rule that headers don't include what they need themselves, I had to add inclusions of ipa-cp.h and sreal.h (on which it depends) to very many files, which made the patch rather ugly. gcc/lto/ChangeLog: 2024-02-16 Martin Jambor <mjambor@suse.cz> PR ipa/113476 * lto-common.cc: Include sreal.h and ipa-cp.h. * lto-partition.cc: Include ipa-cp.h, move inclusion of sreal higher. * lto.cc: Include sreal.h and ipa-cp.h. gcc/ChangeLog: 2024-02-16 Martin Jambor <mjambor@suse.cz> PR ipa/113476 * ipa-prop.h (ipa_node_params): Convert lattices to a vector, adjust initializers in the contructor. (ipa_node_params::~ipa_node_params): Release lattices as a vector. * ipa-cp.h: New file. * ipa-cp.cc: Include sreal.h and ipa-cp.h. (ipcp_value_source): Move to ipa-cp.h. (ipcp_value_base): Likewise. (ipcp_value): Likewise. (ipcp_lattice): Likewise. (ipcp_agg_lattice): Likewise. (ipcp_bits_lattice): Likewise. (ipcp_vr_lattice): Likewise. (ipcp_param_lattices): Likewise. (ipa_get_parm_lattices): Remove assert latticess is non-NULL. (ipa_value_from_jfunc): Adjust a check for empty lattices. (ipa_context_from_jfunc): Likewise. (ipa_agg_value_from_jfunc): Likewise. (merge_agg_lats_step): Do not memset new aggregate lattices to zero. (ipcp_propagate_stage): Allocate lattices in a vector as opposed to just in contiguous memory. (ipcp_store_vr_results): Adjust a check for empty lattices. * auto-profile.cc: Include sreal.h and ipa-cp.h. * cgraph.cc: Likewise. * cgraphclones.cc: Likewise. * cgraphunit.cc: Likewise. * config/aarch64/aarch64.cc: Likewise. * config/i386/i386-builtins.cc: Likewise. * config/i386/i386-expand.cc: Likewise. * config/i386/i386-features.cc: Likewise. * config/i386/i386-options.cc: Likewise. * config/i386/i386.cc: Likewise. * config/rs6000/rs6000.cc: Likewise. * config/s390/s390.cc: Likewise. * gengtype.cc (open_base_files): Added sreal.h and ipa-cp.h to the files to be included in gtype-desc.cc. * gimple-range-fold.cc: Include sreal.h and ipa-cp.h. * ipa-devirt.cc: Likewise. * ipa-fnsummary.cc: Likewise. * ipa-icf.cc: Likewise. * ipa-inline-analysis.cc: Likewise. * ipa-inline-transform.cc: Likewise. * ipa-inline.cc: Include ipa-cp.h, move inclusion of sreal.h higher. * ipa-modref.cc: Include sreal.h and ipa-cp.h. * ipa-param-manipulation.cc: Likewise. * ipa-predicate.cc: Likewise. * ipa-profile.cc: Likewise. * ipa-prop.cc: Likewise. (ipa_node_params_t::duplicate): Assert new lattices remain empty instead of setting them to NULL. * ipa-pure-const.cc: Include sreal.h and ipa-cp.h. * ipa-split.cc: Likewise. * ipa-sra.cc: Likewise. * ipa-strub.cc: Likewise. * ipa-utils.cc: Likewise. * ipa.cc: Likewise. * toplev.cc: Likewise. * tree-ssa-ccp.cc: Likewise. * tree-ssa-sccvn.cc: Likewise. * tree-vrp.cc: Likewise.
2024-02-21Update copyright years.Sahil Yeole109-110/+110
Signed-off-by: Sahil Yeole <sahilyeole93@gmail.com>
2024-02-21gccrs: Add variadic check on function params0xn4utilus2-4/+25
gcc/rust/ChangeLog: * checks/errors/rust-ast-validation.cc (ASTValidation::visit): Add variadic check on all parameters. gcc/testsuite/ChangeLog: * rust/compile/issue-2850.rs: New test. Signed-off-by: 0xn4utilus <gyanendrabanjare8@gmail.com>
2024-02-21gccrs: Fix lookup of TuplePattern sub-pattern typesOwen Avery2-6/+10
gcc/rust/ChangeLog: * backend/rust-compile-pattern.cc (CompilePatternLet::visit): Lookup type of sub-pattern, not tuple pattern itself. gcc/testsuite/ChangeLog: * rust/compile/issue-2847-b.rs: New test. Signed-off-by: Owen Avery <powerboat9.gamer@gmail.com>
2024-02-21gccrs: add powi intrinsicsMarc Poulhiès3-5/+39
gcc/rust/ChangeLog: * backend/rust-builtins.cc (BuiltinsContext::register_rust_mappings): Add powi and reformat. * backend/rust-builtins.h: Add missing copyright header. gcc/testsuite/ChangeLog: * rust/compile/torture/intrinsics-math.rs: Adjust pow test, add test for powi. Signed-off-by: Marc Poulhiès <dkm@kataplop.net>
2024-02-21gccrs: Add testcase for #[rustc_const_stable]Arthur Cohen1-0/+2
To ensure we don't introduce regressions back to issue #2314 gcc/testsuite/ChangeLog: * rust/compile/rustc_const_stable.rs: New test.
2024-02-21gccrs: expand: Fix formatting for "macro not found" errorArthur Cohen1-3/+3
gcc/rust/ChangeLog: * expand/rust-macro-expand.h (struct MacroExpander): Nitpick: fix formatting of emitted error.
2024-02-21gccrs: Fix rebinding importsOwen Avery3-93/+116
gcc/rust/ChangeLog: * resolve/rust-ast-resolve-item.cc (flatten_glob): Use Import class. (flatten_rebind): Likewise. (flatten_list): Likewise. (flatten): Likewise. (flatten_use_dec_to_paths): Likewise. (flatten_use_dec_to_imports): Likewise. (ResolveItem::visit): Likewise. (Import::add_prefix): New. (rust_flatten_nested_glob): Adjust test. (rust_flatten_glob): Likewise. (rust_flatten_rebind_none): Likewise. (rust_flatten_rebind): Likewise. (rust_flatten_rebind_nested): Likewise. (rust_flatten_list): Likewise. * resolve/rust-ast-resolve-item.h (class Import): New. gcc/testsuite/ChangeLog: * rust/compile/use_2.rs: New test. Signed-off-by: Owen Avery <powerboat9.gamer@gmail.com>
2024-02-21gccrs: Add testcase for matches!() macroArthur Cohen1-0/+30
This adds a testcase for issue #2129. gcc/testsuite/ChangeLog: * rust/execute/torture/matches_macro.rs: New test.
2024-02-21gccrs: Fix typo in RegionConstraints instanceArthur Cohen1-1/+1
gcc/rust/ChangeLog: * typecheck/rust-hir-type-check-implitem.h: Fix typo in field (region_costraints -> region_constraints).
2024-02-21AArch64: remove ls64 from being mandatory on armv8.7-a..Tamar Christina8-10/+10
The Arm Architectural Reference Manual (Version J.a, section A2.9 on FEAT_LS64) shows that ls64 is an optional extensions and should not be enabled by default for Armv8.7-a. This drops it from the mandatory bits for the architecture and brings GCC inline with LLVM and the achitecture. Note that we will not be changing binutils to preserve compatibility with older released compilers. gcc/ChangeLog: * config/aarch64/aarch64-arches.def (AARCH64_ARCH): Remove LS64 from Armv8.7-a. gcc/testsuite/ChangeLog: * g++.target/aarch64/acle/ls64.C: Add +ls64. * g++.target/aarch64/acle/ls64_lto.C: Likewise. * gcc.target/aarch64/acle/ls64_lto.c: Likewise. * gcc.target/aarch64/acle/pr110100.c: Likewise. * gcc.target/aarch64/acle/pr110132.c: Likewise. * gcc.target/aarch64/options_set_28.c: Drop check for nols64. * gcc.target/aarch64/pragma_cpp_predefs_2.c: Correct header checks.
2024-02-21AArch64: skip modes_1.f90 [PR107071]Tamar Christina1-1/+1
This test has never worked on AArch64 since the day it was committed. It has a number of issues that prevent it from working on AArch64: The testfailures seem to be known and triaged, so until that's fixed there's no point in running this test. gcc/testsuite/ChangeLog: PR fortran/107071 * gfortran.dg/ieee/modes_1.f90: skip aarch64, arm.
2024-02-21aarch64: More SME vs -mtrack-speculationRichard Sandiford3-1/+8
The sequence to commit a lazy save includes a branch based on whether TPIDR2_EL0 is zero. The code assumed that CBZ could be used for this, but that instruction is forbidden when -mtrack-speculation is being used. gcc/ * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state): Use aarch64_gen_compare_zero_and_branch rather than emitting a CBZ directly. gcc/testsuite/ * gcc.target/aarch64/sme/locally_streaming_1_ts.c: New test. * gcc.target/aarch64/sme/sibcall_7_ts.c: Likewise.
2024-02-21aarch64: Remove duplicated callRichard Sandiford1-1/+0
I noticed while working on another patch that we had a duplicated call to aarch64_process_target_attr. gcc/ * config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p): Remove duplicated call.
2024-02-21aarch64: Fix sibcalls involving shared-ZT0 functionsRichard Sandiford2-2/+55
In: void bar() __arm_inout("za"); void foo() __arm_inout("za", "zt0") { bar(); } foo cannot tail-call bar because foo needs to restore ZT0 after the call. I'd forgotten to update the ok_for_sibcall rules to handle this when adding SME2. Thanks to Sander de Smalen for the spot. gcc/ * config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall): Check that each individual piece of state is shared in the same way, rather than using an aggregate check for PSTATE.ZA. gcc/testsuite/ * gcc.target/aarch64/sme/sibcall_9.c: New test.
2024-02-21aarch64: Ensure ZT0 is zeroed in a new-ZT0 functionRichard Sandiford2-3/+8
ACLE guarantees that a function like: __arm_new("zt0") foo() { ... } will start with ZT0 equal to zero. I'd forgotten to enforce that after commiting a lazy save. After such a save, we should zero ZA iff the function has ZA state and zero ZT0 iff the function has ZT0 state. gcc/ * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state): In the code that commits a lazy save, only zero ZA if the function has ZA state. Similarly zero ZT0 if the function has ZT0 state. gcc/testsuite/ * gcc.target/aarch64/sme/zt0_state_5.c (test3): Expect ZT0 rather than ZA to be zeroed. (test5): Remove zeroing of ZA.
2024-02-21aarch64: Remove the aarch64_commit_lazy_save patternRichard Sandiford3-49/+11
The main purpose of the aarch64_commit_lazy_save pattern was to defer insertion of a half-diamond until splitting, since splitting knew how to create the associated basic blocks. However, the fix for PR113220 means that mode-switching also knows how to do that. This patch therefore removes the pattern and emits the subinstructions directly. On its own, this is actually a slight regression, since it means we keep an unnecessary zero { za }. But the cases where that happens are wrong for a different reason, and this patch is a prerequisite to fixing it. gcc/ * config/aarch64/aarch64-sme.md (aarch64_commit_lazy_save): Remove, directly inserting the associated sequence * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state): ...here instead. gcc/testsuite/ * gcc.target/aarch64/sme/zt0_state_5.c (test3, test5): Expect zero { za }s.
2024-02-21aarch64: Stack-clash prologues and VG saves [PR113995]Richard Sandiford3-3/+11
This patch fixes an ICE for a combination of: - -fstack-clash-protection - a frame that has SVE save slots - a frame that has no GPR save slots - a frame that has a VG save slot The allocation code was folding the SVE save slot allocation into the initial frame allocation, so that we had one allocation of size <size of SVE registers> + 16. But the VG save code itself expected the allocations to remain separate, since it wants to store at a constant offset from SP or FP. The VG save isn't shrink-wrapped and so acts as a probe of the initial allocations. It should therefore be safe to keep separate allocations in this case. The scans in locally_streaming_1.c expect no stack clash protection, so the patch forces that and adds a separate compile-only test for when protection is enabled. gcc/ PR target/113995 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Don't fold the SVE allocation into the initial allocation if the initial allocation includes a VG save. gcc/testsuite/ PR target/113995 * gcc.target/aarch64/sme/locally_streaming_1.c: Require -fno-stack-clash-protection. * gcc.target/aarch64/sme/locally_streaming_1_scp.c: New test.
2024-02-21Allow mode-switching to introduce internal loops [PR113220]Richard Sandiford10-9/+53
In this PR, the SME mode-switching code needs to insert a stack-probe loop for an alloca. This patch allows the target to do that. There are two parts to it: allowing loops for insertions in blocks, and allowing them for insertions on edges. The former can be handled entirely within mode-switching itself, by recording which blocks have had new branches inserted. The latter requires an extension to commit_one_edge_insertion. I think the extension to commit_one_edge_insertion makes logical sense, since it already explicitly allows internal loops during RTL expansion. The single-block find_sub_basic_blocks is a relatively recent addition, so wouldn't have been available when the code was originally written. The patch also has a small and obvious fix to make the aarch64 emit hook cope with labels. I've added specific -fstack-clash-protection versions of all aarch64-sme.exp tests that previously failed because of this bug. I've also added -fno-stack-clash-protection to the original versions of these tests if they contain scans that assume no protection. gcc/ PR target/113220 * cfgrtl.cc (commit_one_edge_insertion): Handle sequences that contain jumps even if called after initial RTL expansion. * mode-switching.cc: Include cfgbuild.h. (optimize_mode_switching): Allow the sequence returned by the emit hook to contain internal jumps. Record which blocks contain such jumps and split the blocks at the end. * config/aarch64/aarch64.cc (aarch64_mode_emit): Check for non-debug insns when scanning the sequence. gcc/testsuite/ PR target/113220 * gcc.target/aarch64/sme/call_sm_switch_5.c: Add -fno-stack-clash-protection. * gcc.target/aarch64/sme/call_sm_switch_5_scp.c: New test. * gcc.target/aarch64/sme/sibcall_6_scp.c: New test. * gcc.target/aarch64/sme/za_state_4.c: Add -fno-stack-clash-protection. * gcc.target/aarch64/sme/za_state_4_scp.c: New test. * gcc.target/aarch64/sme/za_state_5.c: Add -fno-stack-clash-protection. * gcc.target/aarch64/sme/za_state_5_scp.c: New test.
2024-02-21OpenMP/nvptx: support 'arch(nvptx64)' as context selectorTobias Burnus3-3/+4
The main 'arch' context selector for nvptx is, well, 'nvptx'; however, as 'nvptx64' is used as by LLVM, it makes sense to support it as well. Note that LLVM has: "The triple architecture can be one of ``nvptx`` (32-bit PTX) or ``nvptx64`` (64-bit PTX)." GCC effectively only supports the 64bit variant (at least for offloading). Thus, GCC's 'nvptx' is not quite the same as LLVM's. The device-compiler part (nvptx_omp_device_kind_arch_isa) uses TARGET_ABI64 such that nvptx64 is only defined with -m64. gcc/ChangeLog: * config/nvptx/gen-omp-device-properties.sh: Add 'nvptx64' to arch. * config/nvptx/nvptx.cc (nvptx_omp_device_kind_arch_isa): Likewise. libgomp/ChangeLog: * libgomp.texi (OpenMP Context Selectors): Add 'nvptx64' as additional 'arch' value for nvptx.
2024-02-21IBM Z: Preserve exceptions in autovec-*-signaling-eq.c testsIlya Leoshkevich2-2/+2
DSE, DCE, and other passes are removing redundant signaling comparisons from these tests, but the whole point is to check that GCC knows how to emit them. Use -fno-delete-dead-exceptions to prevent that. gcc/testsuite/ChangeLog: * gcc.target/s390/zvector/autovec-double-signaling-eq.c: Preserve exceptions. * gcc.target/s390/zvector/autovec-float-signaling-eq.c: Likewise.
2024-02-21pru: Document how -mmcu option uses MCU specsDimitar Dimitrov1-2/+8
The plan to maintain PRU hardware-specific specs in newlib tree has been abandoned in favour of a new distinct GIT project. Update the documentation accordingly. gcc/ChangeLog: * doc/invoke.texi (-mmcu): Add information about MCU specs. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2024-02-21pru: Document that arguments are not passed to main with -minrtDimitar Dimitrov1-5/+12
The minimal runtime has been documented from the beginning to break some standard features in order to reduce code size, while keeping the features required by typical firmware programs. Document one more imposed restriction - the main() function must take no arguments. gcc/ChangeLog: * doc/invoke.texi (-minrt): Clarify that main must take no arguments. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2024-02-21libgcc, aarch64: Allow for BE platforms in heap trampolines.Iain Sandoe1-15/+15
This arranges that the byte order of the instruction sequences is independent of the byte order of memory. libgcc/ChangeLog: * config/aarch64/heap-trampoline.c (aarch64_trampoline_insns): Arrange to encode instructions as a byte array so that the order is independent of memory byte order. (struct aarch64_trampoline): Likewise. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-02-20analyzer: handle array-initialization from a string_cst [PR113999]David Malcolm5-6/+109
gcc/analyzer/ChangeLog: PR analyzer/113999 * analyzer.h (get_string_cst_size): New decl. * region-model-manager.cc (get_string_cst_size): New. (region_model_manager::maybe_get_char_from_string_cst): Treat single-byte accesses within string_cst but beyond TREE_STRING_LENGTH as being 0. * region-model.cc (string_cst_has_null_terminator): Likewise. gcc/testsuite/ChangeLog: PR analyzer/113999 * c-c++-common/analyzer/strlen-pr113999.c: New test. * gcc.dg/analyzer/strlen-1.c: More test coverage. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-02-20analyzer: handle empty ranges in symbolic_byte_range::intersection [PR113998]David Malcolm2-0/+39
gcc/analyzer/ChangeLog: PR analyzer/113998 * ranges.cc (symbolic_byte_range::intersection): Handle empty ranges. (selftest::test_intersects): Add test coverage for empty ranges. gcc/testsuite/ChangeLog: PR analyzer/113998 * c-c++-common/analyzer/overlapping-buffers-pr113998.c: New test. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-02-21Daily bump.GCC Administrator7-1/+90
2024-02-20Update cpplib sv.poJoseph Myers1-38/+19
* sv.po: Update.
2024-02-20libstdc++: [_GLIBCXX_DEBUG] Fix std::__niter_wrap behaviorFrançois Dumont1-1/+1
In _GLIBCXX_DEBUG mode the std::__niter_base can remove 2 layers, the __gnu_debug::_Safe_iterator<> and the __gnu_cxx::__normal_iterator<>. When std::__niter_wrap is called to build a __gnu_debug::_Safe_iterator<> from a __gnu_cxx::__normal_iterator<> we then have a consistency issue as the difference between the 2 iterators will done on a __normal_iterator on one side and a C pointer on the other. To avoid this problem call std::__niter_base on both input iterators. libstdc++-v3/ChangeLog: * include/bits/stl_algobase.h (std::__niter_wrap): Add a call to std::__niter_base on res iterator.
2024-02-20Fortran: fix passing array component ref to polymorphic proceduresPeter Hill2-0/+58
PR fortran/105658 gcc/fortran/ChangeLog: * trans-expr.cc (gfc_conv_intrinsic_to_class): When passing an array component reference of intrinsic type to a procedure with an unlimited polymorphic dummy argument, a temporary should be created. gcc/testsuite/ChangeLog: * gfortran.dg/PR105658.f90: New test. Signed-off-by: Peter Hill <peter.hill@york.ac.uk>
2024-02-20rs6000: Update instruction counts due to combine changes [PR112103]Peter Bergner1-2/+2
The PR91865 combine fix changed instruction counts slightly for rlwinm-0.c. Adjust expected instruction counts accordingly. 2024-02-20 Peter Bergner <bergner@linux.ibm.com> gcc/testsuite/ PR target/112103 * gcc.target/powerpc/rlwinm-0.c: Adjust expected instruction counts.
2024-02-20aarch64: Allow aarch64-linux-muscl for heap trampolines [PR113971].Iain Sandoe1-2/+2
This allows the same trampoline pattern to be used on all linux variants rather than restricting it to linux gnu. PR target/113971 libgcc/ChangeLog: * config/aarch64/heap-trampoline.c: Allow all linux variants. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-02-20AVR: Use types of exact size and signedness in built-ins.Georg-Johann Lay3-41/+39
The AVR built-ins used types like "int" or "char" that don't have exact signedness or type size which depend on -mint8 and -f[no-][un-]signed-char etc. As the built-ins are modelling machine instructions of given type sizes and signedness, also use according types in their prototypes. gcc/ * config/avr/builtins.def: Use function prototypes of given size and signedness. * config/avr/avr.cc (avr_init_builtins): Adjust types required by builtins.def. * doc/extend.texi (AVR Built-in Functions): Adjust accordingly.
2024-02-20AVR: extend.texi - Use @defbuiltin to document built-ins.Georg-Johann Lay1-16/+20
gcc/ * doc/extend.texi (AVR Built-in Functions): Use @defbuiltin instead of @table.
2024-02-20bpf: Add documentation for the -mcpu optionWill Hawkins1-0/+2
Add documentation describing the meaning and values for the -mcpu command-line option. Tested for bpf-unknown-none on x86_64-linux-gnu host. gcc/ChangeLog: * config/bpf/bpf.opt: Add help information for -mcpu. Signed-off-by: Will Hawkins <hawkinsw@obs.cr>
2024-02-20aarch64: Fix streaming-compatible code with -mtrack-speculation [PR113805]Richard Sandiford7-21/+291
This patch makes -mtrack-speculation work on streaming-compatible functions. There were two related issues. The first is that the streaming-compatible code was using TB(N)Z unconditionally, whereas those instructions are not allowed with speculation tracking. That part can be fixed in a similar way to the recent eh_return fix (PR112987). The second issue was that the speculation-tracking pass runs before some of the conditional branches are inserted. It isn't safe to insert the branches any earlier, so the patch instead adds a second speculation-tracking pass that runs afterwards. The new pass is only used for streaming-compatible functions. The testcase is adapted from call_sm_switch_1.c. gcc/ PR target/113805 * config/aarch64/aarch64-passes.def (pass_late_track_speculation): New pass. * config/aarch64/aarch64-protos.h (make_pass_late_track_speculation): Declare. * config/aarch64/aarch64.md (is_call): New attribute. (*and<mode>3nr_compare0): Rename to... (@aarch64_and<mode>3nr_compare0): ...this. * config/aarch64/aarch64-sme.md (aarch64_get_sme_state) (aarch64_tpidr2_save, aarch64_tpidr2_restore): Add is_call attributes. * config/aarch64/aarch64-speculation.cc: Update file comment to describe the new late pass. (aarch64_do_track_speculation): Handle is_call insns like other calls. (pass_track_speculation): Add an is_late member variable. (pass_track_speculation::gate): Run the late pass for streaming- compatible functions and the early pass for other functions. (make_pass_track_speculation): Update accordingly. (make_pass_late_track_speculation): New function. * config/aarch64/aarch64.cc (aarch64_gen_test_and_branch): New function. (aarch64_guard_switch_pstate_sm): Use it. gcc/testsuite/ PR target/113805 * gcc.target/aarch64/sme/call_sm_switch_11.c: New test.
2024-02-20testsuite: Fix up analyzer/torture/vector-extract-1.c test for i686 [PR113983]Jakub Jelinek1-0/+1
The testcase fails on i686-linux with .../gcc/testsuite/gcc.dg/analyzer/torture/vector-extract-1.c:11:1: warning: MMX vector return without MMX enabled changes the ABI [-Wpsabi] Added -Wno-psabi to silence the warning. 2024-02-20 Jakub Jelinek <jakub@redhat.com> PR analyzer/113983 * gcc.dg/analyzer/torture/vector-extract-1.c: Add -Wno-psabi as dg-additional-options.
2024-02-20Fix testcase for platform without gnu/stubs-x32.hliuhongt1-1/+1
target maybe_x32 doesn't check if platform has gnu/stubs-x32.h, but it's included by stdint.h in the testcase. Adjust testcase: remove stdint.h, use 'typedef long long int64_t' instead. gcc/testsuite/ChangeLog: PR target/113711 * gcc.target/i386/apx-ndd-x32-1.c: Adjust testcase.
2024-02-20Daily bump.GCC Administrator10-1/+289
2024-02-19analyzer: fix -Wanalyzer-va-arg-type-mismatch false +ve on int types [PR111289]David Malcolm3-4/+142
gcc/analyzer/ChangeLog: PR analyzer/111289 * varargs.cc (representable_in_integral_type_p): New. (va_arg_compatible_types_p): Add "arg_sval" param. Handle integer types. (kf_va_arg::impl_call_pre): Pass arg_sval to va_arg_compatible_types_p. gcc/testsuite/ChangeLog: PR analyzer/111289 * c-c++-common/analyzer/stdarg-pr111289-int.c: New test. * c-c++-common/analyzer/stdarg-pr111289-ptr.c: New test. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-02-19analyzer, testsuite: add regression test [PR110520]David Malcolm1-0/+8
gcc/testsuite/ChangeLog: PR analyzer/110520 * c-c++-common/analyzer/null-deref-pr110520.c: New test. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-02-19analyzer: Fix maybe_undo_optimize_bit_field_compare vs non-scalar types ↵Andrew Pinski2-0/+17
[PR113983] After r14-6419-g4eaaf7f5a378e8, maybe_undo_optimize_bit_field_compare would ICE on vector CST but this function really should be checking if we had integer types so reject non-integral types early on (like it was doing for non-char type before r14-6419-g4eaaf7f5a378e8). Committed as obvious after build and tested for aarch64-linux-gnu with no regressions. PR analyzer/113983 gcc/analyzer/ChangeLog: * region-model-manager.cc (maybe_undo_optimize_bit_field_compare): Reject non integral types. gcc/testsuite/ChangeLog: * gcc.dg/analyzer/torture/vector-extract-1.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-02-19libstdc++, Darwin: Handle a linker warning [PR112397].Iain Sandoe4-8/+47
Darwin's linker warns when we make a direct branch to code that is in a weak definition (citing that if a different implementation of the weak function is chosen by the dynamic linker this would be an error). As the analysis in the PR shows, this can happen when we have hot/ cold partitioning and there is an error path that is primarily cold but makes use of epilogue code in the hot section. In this simple case, we can easily deduce that the code is in fact safe; however that is not something we can realistically implement in the linker. Since the user-replaceable allocators are implemented using weak definitions, this is a warning that is frequently flagged up in both the testsuite and end-user code. The chosen solution here is to suppress the hot/cold partitioning for these cases (it is unlikely to impact performance much c.f. the actual allocation). PR target/112397 libstdc++-v3/ChangeLog: * configure: Regenerate. * configure.ac: Detect if we are building for Darwin. * libsupc++/Makefile.am: If we are building for Darwin, then suppress hot/cold partitioning for the array allocators. * libsupc++/Makefile.in: Regenerated. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> Co-authored-by: Jonathan Wakely <jwakely@redhat.com>
2024-02-19libiberty: Fix error return value in pex_unix_exec_child [PR113957].Iain Sandoe1-0/+2
r14-5310-g879cf9ff45d940 introduced some new handling for spawning sub processes. The return value from the generic exec_child is examined and needs to be < 0 to signal an error. However, the unix flavour of this routine is returning the PID value set from the posix_spawn{p}. This latter value is undefined per the manual pages for both Darwin and Linux, and it seems Darwin, at least, sets the value to some usually positive number (presumably the PID that would have been used if the fork had succeeded). The fix proposed here is to set the pid = -1 in the relevant error paths. PR other/113957 libiberty/ChangeLog: * pex-unix.c (pex_unix_exec_child): Set pid = -1 in the error paths, since that is used to signal an erroneous outcome for the routine. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-02-19aarch64: Register rng builtins with uint64_t pointers.Iain Sandoe1-1/+2
Currently, these are registered as unsigned_intDI_type_node which is not necessarily the same type definition as uint64_t. On platforms where these differ that causes fails in consuming the arm_acle.h header. gcc/ChangeLog: * config/aarch64/aarch64-builtins.cc (aarch64_init_rng_builtins): Register these builtins with a pointer to uint64_t rather than unsigned DI mode.
2024-02-19Update cpplib es.poJoseph Myers1-29/+18
* es.po: Update.