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| author | Edwin Lu <ewlu@rivosinc.com> | 2024-02-20 13:53:40 -0800 |
|---|---|---|
| committer | Edwin Lu <ewlu@rivosinc.com> | 2024-02-21 09:40:05 -0800 |
| commit | 3232ebd91ed55b275b9d5a6e8355336382c4afd5 (patch) | |
| tree | 8b4ab7aefd1fd3604ead0d271e510469de8b98a7 | |
| parent | 5772ea772d1dce5bd9a3be99bf095f6f67810db2 (diff) | |
| download | gcc-3232ebd91ed55b275b9d5a6e8355336382c4afd5.zip gcc-3232ebd91ed55b275b9d5a6e8355336382c4afd5.tar.gz gcc-3232ebd91ed55b275b9d5a6e8355336382c4afd5.tar.bz2 | |
RISC-V: Specify mtune and march for PR113742
The testcase pr113742.c is failing for 32 bit targets due to the following cc1
error:
cc1: error: ABI requries '-march=rv64'
Specify '-march=rv64gc' with '-mtune=sifive-p600-series'
PR target/113742
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr113742.c: change mcpu to mtune and add march
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/pr113742.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/pr113742.c b/gcc/testsuite/gcc.target/riscv/pr113742.c index ab8934c..573afd6 100644 --- a/gcc/testsuite/gcc.target/riscv/pr113742.c +++ b/gcc/testsuite/gcc.target/riscv/pr113742.c @@ -1,4 +1,4 @@ -//* { dg-do compile } */ -/* { dg-options "-O2 -finstrument-functions -mabi=lp64d -mcpu=sifive-p670" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -finstrument-functions -march=rv64gc -mabi=lp64d -mtune=sifive-p600-series" } */ void foo(void) {} |