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2024-02-26Merge dmd, druntime ceff48bf7d, phobos dcbfbd43aIain Buclaw36-792/+1417
D front-end changes: - Import latest fixes from dmd v2.107.1-rc.1. D runtime changes: - Import latest fixes from druntime v2.107.1-rc.1. Phobos changes: - Import latest fixes from phobos v2.107.1-rc.1. gcc/d/ChangeLog: * dmd/MERGE: Merge upstream dmd ceff48bf7d. libphobos/ChangeLog: * libdruntime/MERGE: Merge upstream druntime ceff48bf7d. * libdruntime/Makefile.am (DRUNTIME_DSOURCES_FREEBSD): Add core/sys/freebsd/net/if_.d. * libdruntime/Makefile.in: Regenerate. * src/MERGE: Merge upstream phobos dcbfbd43a.
2024-02-25libgfortran: Propagate user defined iostat and iomsg.Jerry DeLisle3-2/+60
PR libfortran/105456 libgfortran/ChangeLog: * io/list_read.c (list_formatted_read_scalar): Add checks for the case where a user defines their own error codes and error messages and generate the runtime error. * io/transfer.c (st_read_done): Whitespace. gcc/testsuite/ChangeLog: * gfortran.dg/pr105456.f90: New test.
2024-02-25PR modula2/113749 m2 enabled build times out on i686-gnu-hurdGaius Mulley52-280/+735
The bug fix changes the FIO module to use the target O_RDONLY, O_WRONLY, SEEK_SET and SEEK_END (now available from the module wrapc). Also rebuilt are the bootstrap tools mc and pge as they have their own wrapc and C translations of FIO. gcc/m2/ChangeLog: PR modula2/113749 * Make-lang.in (BUILD-PGE-O): Add m2/pge-boot/Gwrapc.o. * gm2-libs-ch/wrapc.c (wrapc_SeekSet): New function. (wrapc_SeekEnd): Ditto. (wrapc_ReadOnly): Ditto. (wrapc_WriteOnly): Ditto. * gm2-libs/FIO.mod (SEEK_SET): Remove. (SEEK_END): Remove. (UNIXREADONLY): Remove. (UNIXWRITEONLY): Remove. (ConnectToUnix): Replace UNIXWRITEONLY with a call to WriteOnly. Replace UNIXREADONLY with a call to ReadOnly. (SetPositionFromBeginning): Replace SEEK_SET with a call to SeekSet. (SetPositionFromEnd): Replace SEEK_END with a call to SeekEnd. * gm2-libs/wrapc.def (SeekSet): New procedure function. (SeekEnd): New procedure function. (ReadOnly): New procedure function. (WriteOnly): New procedure function. * mc-boot-ch/Glibc.c (BUILD_MC_LIBC_TRACE): Undef. (check_init): New function. (tracedb): Ditto. (tracedb_open): Ditto. (tracedb_result): Ditto. (libc_read): Ditto. (libc_write): Ditto. (libc_close): Ditto. (libc_creat): Ditto. (libc_open): Ditto. (libc_lseek): Ditto. * mc-boot-ch/Gwrapc.c (wrapc_SeekSet): New function. (wrapc_SeekEnd): Ditto. (wrapc_ReadOnly): Ditto. (wrapc_WriteOnly): Ditto. * mc-boot/GDynamicStrings.cc: Rebuilt. * mc-boot/GFIO.cc: Ditto. * mc-boot/GIndexing.cc: Ditto. * mc-boot/GM2Dependent.cc: Ditto. * mc-boot/GM2EXCEPTION.cc: Ditto. * mc-boot/GPushBackInput.cc: Ditto. * mc-boot/GRTExceptions.cc: Ditto. * mc-boot/GRTint.cc: Ditto. * mc-boot/GSArgs.cc: Ditto. * mc-boot/GStdIO.cc: Ditto. * mc-boot/GStringConvert.cc: Ditto. * mc-boot/GSysStorage.cc: Ditto. * mc-boot/Gdecl.cc: Ditto. * mc-boot/Gkeyc.cc: Ditto. * mc-boot/Glibc.h: Ditto. * mc-boot/GmcComment.cc: Ditto. * mc-boot/GmcComp.cc: Ditto. * mc-boot/GmcDebug.cc: Ditto. * mc-boot/GmcMetaError.cc: Ditto. * mc-boot/GmcStack.cc: Ditto. * mc-boot/GmcStream.cc: Ditto. * mc-boot/GnameKey.cc: Ditto. * mc-boot/GsymbolKey.cc: Ditto. * mc-boot/Gvarargs.cc: Ditto. * mc-boot/Gwrapc.h: Ditto. * mc/decl.mod (getSymName): Add pointerref clause. * mc/mcStream.mod (copy): Check for an error after every read. * mc/varargs.mod (copy): Rewrite pointer arithmetic using INC to avoid type incompatibility. * pge-boot/GDynamicStrings.cc: Rebuilt. * pge-boot/GDynamicStrings.h: Ditto. * pge-boot/GFIO.cc: Ditto. * pge-boot/GFIO.h: Ditto. * pge-boot/GIO.cc: Ditto. * pge-boot/GIndexing.cc: Ditto. * pge-boot/GM2Dependent.cc: Ditto. * pge-boot/GM2EXCEPTION.cc: Ditto. * pge-boot/GNameKey.cc: Ditto. * pge-boot/GPushBackInput.cc: Ditto. * pge-boot/GRTExceptions.cc: Ditto. * pge-boot/GStdIO.cc: Ditto. * pge-boot/GSymbolKey.cc: Ditto. * pge-boot/GSysStorage.cc: Ditto. * pge-boot/Glibc.h: Ditto. * pge-boot/Gwrapc.cc: Ditto. * pge-boot/Gwrapc.h: Ditto. libgm2/ChangeLog: PR modula2/113749 * libm2pim/wrapc.cc: Include fcntl.h. (SeekSet): New function. (SeekEnd): Ditto. (ReadOnly): Ditto. (WriteOnly): Ditto. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-02-25Daily bump.GCC Administrator4-1/+63
2024-02-24vect: Tighten check for impossible SLP layouts [PR113205]Richard Sandiford2-0/+23
During its forward pass, the SLP layout code tries to calculate the cost of a layout change on an incoming edge. This is taken as the minimum of two costs: one in which the source partition keeps its current layout (chosen earlier during the pass) and one in which the source partition switches to the new layout. The latter can sometimes be arranged by the backward pass. If only one of the costs is valid, the other cost was ignored. But the PR shows that this is not safe. If the source partition has layout 0 (the normal layout), we have to be prepared to handle the case in which that ends up being the only valid layout. Other code already accounts for this restriction, e.g. see the code starting with: /* Reject the layout if it would make layout 0 impossible for later partitions. This amounts to testing that the target supports reversing the layout change on edges to later partitions. gcc/ PR tree-optimization/113205 * tree-vect-slp.cc (vect_optimize_slp_pass::forward_cost): Reject the proposed layout if it does not allow a source partition with layout 2 to keep that layout. gcc/testsuite/ PR tree-optimization/113205 * gcc.dg/torture/pr113205.c: New test.
2024-02-24Use HOST_WIDE_INT_{C,UC,0,0U,1,1U} macros some moreJakub Jelinek17-31/+32
I've searched for some uses of (HOST_WIDE_INT) constant or (unsigned HOST_WIDE_INT) constant and turned them into uses of the appropriate macros. THere are quite a few cases in non-i386 backends but I've left that out for now. The only behavior change is in build_replicated_int_cst where the left shift was done in HOST_WIDE_INT type but assigned to unsigned HOST_WIDE_INT, which I've changed into unsigned HOST_WIDE_INT shift. 2024-02-24 Jakub Jelinek <jakub@redhat.com> gcc/ * builtins.cc (fold_builtin_isascii): Use HOST_WIDE_INT_UC macro. * combine.cc (make_field_assignment): Use HOST_WIDE_INT_1U macro. * double-int.cc (double_int::mask): Use HOST_WIDE_INT_UC macros. * genattrtab.cc (attr_alt_complement): Use HOST_WIDE_INT_1 macro. (mk_attr_alt): Use HOST_WIDE_INT_0 macro. * genautomata.cc (bitmap_set_bit, CLEAR_BIT): Use HOST_WIDE_INT_1 macros. * ipa-strub.cc (can_strub_internally_p): Use HOST_WIDE_INT_1 macro. * loop-iv.cc (implies_p): Use HOST_WIDE_INT_1U macro. * pretty-print.cc (test_pp_format): Use HOST_WIDE_INT_C and HOST_WIDE_INT_UC macros. * rtlanal.cc (nonzero_bits1): Use HOST_WIDE_INT_UC macro. * tree.cc (build_replicated_int_cst): Use HOST_WIDE_INT_1U macro. * tree.h (DECL_OFFSET_ALIGN): Use HOST_WIDE_INT_1U macro. * tree-ssa-structalias.cc (dump_varinfo): Use ~HOST_WIDE_INT_0U macros. * wide-int.cc (divmod_internal_2): Use HOST_WIDE_INT_1U macro. * config/i386/constraints.md (define_constraint "L"): Use HOST_WIDE_INT_C macro. * config/i386/i386.md (movabsq split peephole2): Use HOST_WIDE_INT_C macro. (movl + movb peephole2): Likewise. * config/i386/predicates.md (x86_64_zext_immediate_operand): Likewise. (const_32bit_mask): Likewise. gcc/objc/ * objc-encoding.cc (encode_array): Use HOST_WIDE_INT_0 macros.
2024-02-24bitint: Handle VIEW_CONVERT_EXPRs between large/huge BITINT_TYPEs and ↵Jakub Jelinek2-17/+310
VECTOR/COMPLEX_TYPE etc. [PR114073] The following patch implements support for VIEW_CONVERT_EXPRs from/to large/huge _BitInt to/from vector or complex types or anything else but integral/pointer types which doesn't need to live in memory. 2024-02-24 Jakub Jelinek <jakub@redhat.com> PR middle-end/114073 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Handle VIEW_CONVERT_EXPRs between large/huge _BitInt and non-integer/pointer types like vector or complex types. (gimple_lower_bitint): Don't merge VIEW_CONVERT_EXPRs to non-integral types. Fix up VIEW_CONVERT_EXPR handling. Allow merging VIEW_CONVERT_EXPR from non-integral/pointer types with a store. * gcc.dg/bitint-93.c: New test.
2024-02-24Restrict gcc.dg/rtl/aarch64/pr113295-1.c to aarch64Richard Sandiford1-1/+1
I keep forgetting that gcc.dg/rtl is the one testsuite where tests in target-specific subdirectories aren't automatically restricted to that target. gcc/testsuite/ * gcc.dg/rtl/aarch64/pr113295-1.c: Restrict to aarc64*-*-*.
2024-02-24Daily bump.GCC Administrator7-1/+198
2024-02-23Fortran: ALLOCATE statement, SOURCE/MOLD expressions with subrefs [PR114024]Steve Kargl3-2/+118
PR fortran/114024 gcc/fortran/ChangeLog: * trans-stmt.cc (gfc_trans_allocate): When a source expression has substring references, part-refs, or %re/%im inquiries, wrap the entity in parentheses to force evaluation of the expression. gcc/testsuite/ChangeLog: * gfortran.dg/allocate_with_source_27.f90: New test. * gfortran.dg/allocate_with_source_28.f90: New test. Co-Authored-By: Harald Anlauf <anlauf@gmx.de>
2024-02-23RISC-V: Fix vec_init for simple sequences [PR114028].Robin Dapp2-1/+49
For a vec_init (_a, _a, _a, _a) with _a of mode DImode we try to construct a "superword" of two "_a"s. This only works for modes < Pmode when we can "shift and or" both halves into one Pmode register. This patch disallows the optimization for inner_mode == Pmode and emits a simple broadcast in such a case. gcc/ChangeLog: PR target/114028 * config/riscv/riscv-v.cc (rvv_builder::can_duplicate_repeating_sequence_p): Return false if inner mode is already Pmode. (rvv_builder::is_all_same_sequence): New function. (expand_vec_init): Emit broadcast if sequence is all same. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr114028.c: New test.
2024-02-23c++: Fix ICE due to folding a call to constructor on cdtor_returns_this ↵Jakub Jelinek2-2/+24
arches (aka arm32) [PR113083] When targetm.cxx.cdtor_returns_this () (aka on arm32 TARGET_AAPCS_BASED) constructor is supposed to return this pointer, but when we cp_fold such a call, we don't take that into account and just INIT_EXPR the object, so we can later ICE during gimplification, because the expression doesn't have the right type. 2024-02-23 Jakub Jelinek <jakub@redhat.com> PR c++/113083 * cp-gimplify.cc (cp_fold): For targetm.cxx.cdtor_returns_this () wrap r into a COMPOUND_EXPR and return folded CALL_EXPR_ARG (x, 0). * g++.dg/cpp0x/constexpr-113083.C: New test.
2024-02-23aarch64: Spread out FPR usage between RA regions [PR113613]Richard Sandiford2-9/+59
early-ra already had code to do regrename-style "broadening" of the allocation, to promote scheduling freedom. However, the pass divides the function into allocation regions and this broadening only worked within a single region. This meant that if a basic block contained one subblock of FPR use, followed by a point at which no FPRs were live, followed by another subblock of FPR use, the two subblocks would tend to reuse the same registers. This in turn meant that it wasn't possible to form LDP/STP pairs between them. The failure to form LDPs and STPs in the testcase was a regression from GCC 13. The patch adds a simple heuristic to prefer less recently used registers in the event of a tie. gcc/ PR target/113613 * config/aarch64/aarch64-early-ra.cc (early_ra::m_current_region): New member variable. (early_ra::m_fpr_recency): Likewise. (early_ra::start_new_region): Bump m_current_region. (early_ra::allocate_colors): Prefer less recently used registers in the event of a tie. Add a comment to explain why we prefer(ed) higher-numbered registers. (early_ra::find_oldest_color): Prefer less recently used registers here too. (early_ra::finalize_allocation): Update recency information for allocated registers. (early_ra::process_blocks): Initialize m_current_region and m_fpr_recency. gcc/testsuite/ PR target/113613 * gcc.target/aarch64/pr113613.c: New test.
2024-02-23aarch64: Tighten early-ra chain test for wide registers [PR113295]Richard Sandiford2-23/+82
Most code in early-ra used is_chain_candidate to check whether we should chain two allocnos. This included both tests that matter for correctness and tests for certain heuristics. Once that test passes for one pair of allocnos, we test whether it's safe to chain the containing groups (which might contain multiple allocnos for x2, x3 and x4 modes). This test used an inline test for correctness only, deliberately skipping the heuristics. However, this instance of the test was missing some handling of equivalent allocnos. This patch fixes things by making is_chain_candidate take a strictness parameter: correctness only, or correctness + heuristics. It then makes the group-chaining test use the correctness version rather than trying to replicate it inline. gcc/ PR target/113295 * config/aarch64/aarch64-early-ra.cc (early_ra::test_strictness): New enum. (early_ra::is_chain_candidate): Add a strictness parameter to control whether only correctness matters, or whether both correctness and heuristics should be used. Handle multiple levels of equivalence. (early_ra::find_related_start): Update call accordingly. (early_ra::strided_polarity_pref): Likewise. (early_ra::form_chains): Likewise. (early_ra::try_to_chain_allocnos): Use is_chain_candidate in correctness mode rather than trying to inline the test. gcc/testsuite/ PR target/113295 * gcc.target/aarch64/pr113295-2.c: New test.
2024-02-23aarch64: Add missing early-ra bookkeeping [PR113295]Richard Sandiford2-0/+80
416.gamess showed up two wrong-code bugs in early-ra. This patch fixes the first of them. It was difficult to reduce the source code to something that would meaningfully show the situation, so the testcase uses a direct RTL sequence instead. In the sequence: (a) register <2> is set more than once (b) register <2> is copied to a temporary (<4>) (c) register <2> is the destination of an FCSEL between <4> and another value (<5>) (d) <4> and <2> are equivalent for <4>'s live range (e) <5>'s and <2>'s live ranges do not intersect, and there is a pseudo-copy between <5> and <2> On its own, (d) implies that <4> can be treated as equivalent to <2>. And on its own, (e) implies that <5> can share <2>'s register. But <4>'s and <5>'s live ranges conflict, meaning that they cannot both share the register together. A bit of missing bookkeeping meant that the mechanism for detecting this didn't fire. We therefore ended up with an FCSEL in which both inputs were the same register. gcc/ PR target/113295 * config/aarch64/aarch64-early-ra.cc (early_ra::find_related_start): Account for definitions by shared registers when testing for a single register definition. (early_ra::accumulate_defs): New function. (early_ra::record_copy): If A shares B's register, fold A's definition information into B's. Fold A's use information into B's. gcc/testsuite/ PR target/113295 * gcc.dg/rtl/aarch64/pr113295-1.c: New test.
2024-02-23x86-64: Check R_X86_64_CODE_6_GOTTPOFF supportH.J. Lu6-1/+181
If assembler and linker supports add %reg1, name@gottpoff(%rip), %reg2 with R_X86_64_CODE_6_GOTTPOFF, we can generate it instead of mov name@gottpoff(%rip), %reg2 add %reg1, %reg2 gcc/ * configure.ac (HAVE_AS_R_X86_64_CODE_6_GOTTPOFF): Defined as 1 if R_X86_64_CODE_6_GOTTPOFF is supported. * config.in: Regenerated. * configure: Likewise. * config/i386/predicates.md (apx_ndd_add_memory_operand): Allow UNSPEC_GOTNTPOFF if R_X86_64_CODE_6_GOTTPOFF is supported. gcc/testsuite/ * gcc.target/i386/apx-ndd-tls-1b.c: New test. * lib/target-supports.exp (check_effective_target_code_6_gottpoff_reloc): New.
2024-02-23Fortran/Openmp: Use OPT_Wopenmp for gfc_match_omp_depobj warningTobias Burnus1-2/+2
gcc/fortran/ChangeLog: * openmp.cc (gfc_match_omp_depobj): Use OPT_Wopenmp as warning category in gfc_warning.
2024-02-23arm: fix ICE with vectorized reciprocal division [PR108120]Richard Earnshaw2-2/+18
The expand pattern for reciprocal division was enabled for all math optimization modes, but the patterns it was generating were not enabled unless -funsafe-math-optimizations were enabled, this leads to an ICE when the pattern we generate cannot be recognized. Fixed by only enabling vector division when doing unsafe math. gcc: PR target/108120 * config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3. Gate with ARM_HAVE_NEON_<MODE>_ARITH. gcc/testsuite: PR target/108120 * gcc.target/arm/neon-recip-div-1.c: New file.
2024-02-23expr: Fix REDUCE_BIT_FIELD in multiplication expansion [PR114054]Jakub Jelinek2-6/+23
The following testcase ICEs, because the REDUCE_BIT_FIELD macro uses the target variable implicitly: #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \ ? reduce_to_bit_field_precision ((expr), \ target, \ type) \ : (expr)) and so when the code below reuses the target variable, documented to be The value may be stored in TARGET if TARGET is nonzero. TARGET is just a suggestion; callers must assume that the rtx returned may not be the same as TARGET. for something unrelated (the value that should be returned), this misbehaves (in the testcase target is set to a CONST_INT, which has VOIDmode and reduce_to_bit_field_precision assert checking doesn't like that). Needed to say that If TARGET is CONST0_RTX, it means that the value will be ignored. but in expand_expr_real_2 does at the start: ignore = (target == const0_rtx || ((CONVERT_EXPR_CODE_P (code) || code == COND_EXPR || code == VIEW_CONVERT_EXPR) && TREE_CODE (type) == VOID_TYPE)); /* We should be called only if we need the result. */ gcc_assert (!ignore); - so such target is mainly meant for calls and the like in other routines. Certainly doesn't expect that target changes from not being ignored initially to ignore later on and other CONST_INT results as well as anything which is not an object into which anything can be stored. So, the following patch fixes that by using a more appripriate temporary for the result, which other code is using. 2024-02-23 Jakub Jelinek <jakub@redhat.com> PR rtl-optimization/114054 * expr.cc (expand_expr_real_2) <case MULT_EXPR>: Use temp variable instead of target parameter for result. * gcc.dg/bitint-92.c: New test.
2024-02-23bitintlower: Fix .{ADD,SUB}_OVERFLOW lowering [PR114040]Jakub Jelinek3-4/+67
The following testcases show 2 bugs in the .{ADD,SUB}_OVERFLOW lowering, both related to storing of the REALPART_EXPR part of the result. On the first testcase prec is 255, prec_limbs is 4 and for the second limb in the loop the store of the REALPART_EXPR of .USUBC (_30) is stored through: if (_27 <= 3) goto <bb 12>; [80.00%] else goto <bb 15>; [20.00%] <bb 12> [local count: 1073741824]: if (_27 < 3) goto <bb 14>; [80.00%] else goto <bb 13>; [20.00%] <bb 13> [local count: 1073741824]: bitint.3[_27] = _30; goto <bb 15>; [100.00%] <bb 14> [local count: 858993464]: MEM[(unsigned long *)&bitint.3 + 24B] = _30; <bb 15> [local count: 1073741824]: The first check is right, as prec_limbs is 4, we don't want to store bitint.3[4] or above at all, those limbs are just computed for the overflow checking and nothing else, so _27 > 4 leads to no store. But the other condition is exact opposite of what should be done, if the current index of the second limb (_27) is < 3, then it should bitint.3[_27] = _30; and if it is == 3, it should MEM[(unsigned long *)&bitint.3 + 24B] = _30; and (especially important for the targets which would bitinfo.extended = 1) should actually in this case zero extend it from the 63 bits to 64, that is the handling of the partial limb. The if_then_if_then_else helper if there are 2 conditions sets m_gsi to be at the start of the edge_true_false->dest bb, i.e. when the first condition is true and second false, and that is where we store the SSA_NAME indexed limb store, so the condition needs to be reversed. The following patch does that and adds the cast as well, the usual assumption that already handle_operand has the partial limb type doesn't have to be true here, because the source operand could have much larger precision than the REALPART_EXPR of the lhs. 2024-02-23 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/114040 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow): Use EQ_EXPR rather than LT_EXPR for g2 condition and change its probability from likely to unlikely. When handling the true true store, first cast to limb_access_type and then to l's type. * gcc.dg/torture/bitint-60.c: New test. * gcc.dg/torture/bitint-61.c: New test.
2024-02-23LoongArch: Don't falsely claim gold supported in toplevel configureXi Ruoyao2-2/+2
The gold linker has never been ported to LoongArch (and it seems unlikely to be ported in the future as the new architectures are focusing on lld and/or mold for fast linkers). ChangeLog: * configure.ac (ENABLE_GOLD): Remove loongarch*-*-* from target list. * configure: Regenerate.
2024-02-23Add ia64*-*-* to the list of obsolete targetsRichard Biener2-2/+4
The following deprecates ia64*-*-* for GCC 14. Since we plan to force LRA for GCC 15 and the target only has slim chances of getting updated this notifies people in advance. Given both Linux and glibc have axed the target further development is also made difficult. There is no listed maintainer for ia64 either. PR target/90785 gcc/ * config.gcc: Add ia64*-*-* to the list of obsoleted targets. contrib/ * config-list.mk (LIST): --enable-obsolete for ia64*-*-*.
2024-02-23testsuite: vect: Actually skip gcc.dg/vect/vect-bic-bitmask-12.c etc. on SPARCRainer Orth2-2/+2
gcc.dg/vect/vect-bic-bitmask-12.c and gcc.dg/vect/vect-bic-bitmask-23.c currently FAIL on 32 and 64-bit Solaris/SPARC FAIL: gcc.dg/vect/vect-bic-bitmask-12.c -flto -ffat-lto-objects scan-tree-dump dce7 "<=\\\\s*.+{ 255,.+}" FAIL: gcc.dg/vect/vect-bic-bitmask-12.c scan-tree-dump dce7 "<=\\\\s*.+{ 255,.+}" FAIL: gcc.dg/vect/vect-bic-bitmask-23.c -flto -ffat-lto-objects scan-tree-dump dce7 "<=\\\\s*.+{ 255, 15, 1, 65535 }" FAIL: gcc.dg/vect/vect-bic-bitmask-23.c scan-tree-dump dce7 "<=\\\\s*.+{ 255, 15, 1, 65535 }" although they should be skipped since commit 5f07095d22f58572c06997aa6d4f3bc456e1925d Author: Tamar Christina <tamar.christina@arm.com> Date: Tue Mar 8 11:32:59 2022 +0000 vect: disable bitmask tests on sparc The problem is that dg-skip-if must come after dg-do, although this isn't currently documented unfortunately. Fixed by reordering the directives. Tested on sparc-sun-solaris2.11 and i386-pc-solaris2.11. 2024-02-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc/testsuite: * gcc.dg/vect/vect-bic-bitmask-12.c: Move dg-skip-if down. * gcc.dg/vect/vect-bic-bitmask-23.c: Likewise.
2024-02-23testsuite: plugin: Fix gcc.dg/plugin/crash-test-write-though-null-sarif.c on ↵Rainer Orth1-1/+1
Solaris gcc.dg/plugin/crash-test-write-though-null-sarif.c FAILs on Solaris: FAIL: gcc.dg/plugin/crash-test-write-though-null-sarif.c -fplugin=./crash_test_plugin.so scan-sarif-file "text": "Segmentation fault Comparing the sarif files between Linux and Solaris reveals - "message": {"text": "Segmentation fault"}, + "message": {"text": "Segmentation Fault"}, This patch allows for both forms. Tested on i386-pc-solaris2.11, sparc-sun-solaris2.11, and x86_64-pc-linux-gnu. 2024-02-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc/testsuite: * gcc.dg/plugin/crash-test-write-though-null-sarif.c (scan-sarif-file): Allow for "Segmentation Fault", too.
2024-02-23Add myself to write after approvalMonk Chiang1-0/+1
ChangeLog: * MAINTAINERS: Add myself.
2024-02-23RISC-V: Point our Python scripts at python3Palmer Dabbelt2-2/+2
This builds for me, and I frequently have python-is-python3 type packages installed so I think I've been implicitly testing it for a while. Looks like Kito's tested similar configurations, and the bugzilla indicates we should be moving over. gcc/ChangeLog: PR other/109668 * config/riscv/arch-canonicalize: Move to python3 * config/riscv/multilib-generator: Likewise
2024-02-23doc: RISC-V: Document that -mcpu doesn't override -march or -mtunePalmer Dabbelt1-0/+2
This came up recently as Edwin was looking through the test suite. A few of us were talking about this during the patchwork meeting and were surprised. Looks like this is the desired behavior, so let's at least document it. gcc/ChangeLog: * doc/invoke.texi: Document -mcpu. Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2024-02-23LoongArch: When checking whether the assembler supports conditional branch ↵Lulu Cheng2-2/+2
relaxation, add compilation parameter "--fatal-warnings" to the assembler. In binutils 2.40 and earlier versions, only a warning will be reported when a relocation immediate value is out of bounds. As a result, the value of the macro HAVE_AS_COND_BRANCH_RELAXATION will also be defined as 1 when the assembler does not support conditional branch relaxation. Therefore, add the compilation option "--fatal-warnings" to avoid this problem. gcc/ChangeLog: * configure: Regenerate. * configure.ac: Add parameter "--fatal-warnings" to assemble when checking whether the assemble support conditional branch relaxation.
2024-02-23Daily bump.GCC Administrator8-1/+1253
2024-02-22testsuite: fix Wmismatched-new-delete-8.C with -m32Marek Polacek1-1/+1
This fixes error: 'operator new' takes type 'size_t' ('unsigned int') as first parameter [-fpermissive] gcc/testsuite/ChangeLog: * g++.dg/warn/Wmismatched-new-delete-8.C: Use __SIZE_TYPE__.
2024-02-22c: Handle scoped attributes in __has*attribute and scoped attribute parsing ↵Jakub Jelinek8-47/+127
changes in -std=c11 etc. modes [PR114007] We aren't able to parse __has_attribute (vendor::attr) (and __has_c_attribute and __has_cpp_attribute) in strict C < C23 modes. While in -std=gnu* modes or in -std=c23 there is CPP_SCOPE token, in -std=c* (except for -std=c23) there are is just a pair of CPP_COLON tokens. The c-lex.cc hunk adds support for that. That leads to a question if we should return 1 or 0 from __has_attribute (gnu::unused) or not, because while [[gnu::unused]] is parsed fine in -std=gnu*/-std=c23 modes (sure, with pedwarn for < C23), we do not parse it at all in -std=c* (except for -std=c23), we only parse [[__extension__ gnu::unused]] there. While the __extension__ in there helps to avoid the pedwarn, I think it is better to be consistent between GNU and strict C < C23 modes and parse [[gnu::unused]] too; on the other side, I think parsing [[__extension__ gnu : : unused]] is too weird and undesirable. So, the following patch adds a flag during preprocessing at the point where we normally create CPP_SCOPE tokens out of 2 consecutive colons on the first CPP_COLON to mark the consecutive case (as we are tight on the bits, I've reused the PURE_ZERO flag, which is used just by the C++ FE and only ever set (both C and C++) on CPP_NUMBER tokens, this new flag has the same value and is only ever used on CPP_COLON tokens) and instead of checking loose_scope_p argument (i.e. whether it is [[__extension__ ...]] or not), it just parses CPP_SCOPE or CPP_COLON with CLONE_SCOPE flag followed by another CPP_COLON the same. The latter will never appear in >= C23 or -std=gnu* modes, though guarding its use say with flag_iso && !flag_isoc23 && doesn't really work because the __extension__ case temporarily clears flag_iso flag. This makes the -std=c11 etc. behavior more similar to -std=gnu11 or -std=c23, the only difference I'm aware of are the #define JOIN2(A, B) A##B [[vendor JOIN2(:,:) attr]] [[__extension__ vendor JOIN2(:,:) attr]] cases, which are accepted in the latter modes, but results in error in -std=c11; but the error is during preprocessing that :: doesn't form a valid preprocessing token, which is true, so just don't do that if you try to have __STRICT_ANSI__ && __STDC_VERSION__ <= 201710L compatibility. 2024-02-22 Jakub Jelinek <jakub@redhat.com> PR c/114007 gcc/ * doc/extend.texi: (__extension__): Remove comments about scope tokens vs. two colons. gcc/c-family/ * c-lex.cc (c_common_has_attribute): Parse 2 CPP_COLONs with the first one with COLON_SCOPE flag the same as CPP_SCOPE. gcc/c/ * c-parser.cc (c_parser_std_attribute): Remove loose_scope_p argument. Instead of checking it, parse 2 CPP_COLONs with the first one with COLON_SCOPE flag the same as CPP_SCOPE. (c_parser_std_attribute_list): Remove loose_scope_p argument, don't pass it to c_parser_std_attribute. (c_parser_std_attribute_specifier): Adjust c_parser_std_attribute_list caller. gcc/testsuite/ * gcc.dg/c23-attr-syntax-6.c: Adjust testcase for :: being valid even in -std=c11 even without __extension__ and : : etc. not being valid anymore even with __extension__. * gcc.dg/c23-attr-syntax-7.c: Likewise. * gcc.dg/c23-attr-syntax-8.c: New test. libcpp/ * include/cpplib.h (COLON_SCOPE): Define to PURE_ZERO. * lex.cc (_cpp_lex_direct): When lexing CPP_COLON with another colon after it, if !CPP_OPTION (pfile, scope) set COLON_SCOPE flag on the first CPP_COLON token.
2024-02-22warn-access: Fix handling of unnamed types [PR109804]Andrew Pinski2-0/+43
This looks like an oversight of handling DEMANGLE_COMPONENT_UNNAMED_TYPE. DEMANGLE_COMPONENT_UNNAMED_TYPE only has the u.s_number.number set while the code expected newc.u.s_binary.left would be valid. So this treats DEMANGLE_COMPONENT_UNNAMED_TYPE like we treat function paramaters (DEMANGLE_COMPONENT_FUNCTION_PARAM) and template paramaters (DEMANGLE_COMPONENT_TEMPLATE_PARAM). Note the code in the demangler does this when it sets DEMANGLE_COMPONENT_UNNAMED_TYPE: ret->type = DEMANGLE_COMPONENT_UNNAMED_TYPE; ret->u.s_number.number = num; Committed as obvious after bootstrap/test on x86_64-linux-gnu PR tree-optimization/109804 gcc/ChangeLog: * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle DEMANGLE_COMPONENT_UNNAMED_TYPE. gcc/testsuite/ChangeLog: * g++.dg/warn/Wmismatched-new-delete-8.C: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-02-22AArch64: update vget_set_lane_1.c test outputTamar Christina1-1/+1
In the vget_set_lane_1.c test the following entries now generate a zip1 instead of an INS BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0) BUILD_TEST (int32x2_t, int32x2_t, , , s32, 1, 0) BUILD_TEST (uint32x2_t, uint32x2_t, , , u32, 1, 0) This is because the non-Q variant for indices 0 and 1 are just shuffling values. There is no perf difference between INS SIMD to SIMD and ZIP on Arm uArches but preferring the INS alternative has a drawback on all uArches as ZIP being a three operand instruction can be used to tie the result to the return register whereas INS would require an fmov. As such just update the test file for now. gcc/testsuite/ChangeLog: PR target/112375 * gcc.target/aarch64/vget_set_lane_1.c: Update test output.
2024-02-22PR modula2/114055 improve error message when checking the BY constantGaius Mulley7-13/+154
The fix marks a constant created during the default BY clause of the FOR loop as internal. The type checker will always return true if checking against an internal const. gcc/m2/ChangeLog: PR modula2/114055 * gm2-compiler/M2Check.mod (Import): IsConstLitInternal and IsConstLit. (isInternal): New procedure function. (doCheck): Test for isInternal in either operand and early return true. * gm2-compiler/M2Quads.mod (PushOne): Rewrite with extra parameter internal. (BuildPseudoBy): Add TRUE parameter to PushOne call. (BuildIncProcedure): Add FALSE parameter to PushOne call. (BuildDecProcedure): Add FALSE parameter to PushOne call. * gm2-compiler/M2Range.mod (ForLoopBeginTypeCompatible): Uncomment code and tidy up error string. * gm2-compiler/SymbolTable.def (PutConstLitInternal): New procedure. (IsConstLitInternal): New procedure function. * gm2-compiler/SymbolTable.mod (PutConstLitInternal): New procedure. (IsConstLitInternal): New procedure function. (SymConstLit): New field IsInternal. (CreateConstLit): Initialize IsInternal to FALSE. gcc/testsuite/ChangeLog: PR modula2/114055 * gm2/pim/fail/forloopby.mod: New test. * gm2/pim/pass/forloopby2.mod: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-02-22tree-optimization/114048 - ICE in copy_reference_ops_from_refRichard Biener2-0/+27
The following adds another omission to the assert verifying we're not running into spurious off == -1. PR tree-optimization/114048 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): MEM_REF can also produce -1 off. * gcc.dg/torture/pr114048.c: New testcase.
2024-02-22tree-optimization/114027 - conditional reduction chainRichard Biener2-5/+32
When we classify a conditional reduction chain as CONST_COND_REDUCTION we fail to verify all involved conditionals have the same constant. That's a quite unlikely situation so the following simply disables such classification when there's more than one reduction statement. PR tree-optimization/114027 * tree-vect-loop.cc (vecctorizable_reduction): Use optimized condition reduction classification only for single-element chains. * gcc.dg/vect/pr114027.c: New testcase.
2024-02-22profile-count: Don't dump through a temporary buffer [PR111960]Jakub Jelinek2-18/+5
The profile_count::dump (char *, struct function * = NULL) const; method has a single caller, the profile_count::dump (FILE *f, struct function *fun) const; method and for that going through a temporary buffer is just slower and opens doors for buffer overflows, which is exactly why this P1 was filed. The buffer size is 64 bytes, the previous maximum "%" PRId64 " (%s)" would print up to 61 bytes in there (19 bytes for arbitrary uint64_t:61 bitfield printed as signed, "estimated locally, globally 0 adjusted" i.e. 38 bytes longest %s and 4 other characters). Now, after the r14-2389 changes, it can be 19 + 38 plus 11 other characters + %.4f, which is worst case 309 chars before decimal point, decimal point and 4 digits after it, so total 382 bytes. So, either we could bump the buffer[64] to buffer[400], or the following patch just drops the indirection through buffer and prints it directly to stream. After all, having APIs which fill in some buffer without passing down the size of the buffer is just asking for buffer overflows over time. 2024-02-22 Jakub Jelinek <jakub@redhat.com> PR ipa/111960 * profile-count.h (profile_count::dump): Remove overload with char * first argument. * profile-count.cc (profile_count::dump): Change overload with char * first argument which uses sprintf into the overfload with FILE * first argument and use fprintf instead. Remove overload which wrapped it.
2024-02-22call-cdce: Add missing BUILT_IN_*F{32,64}X handling and improve BUILT_IN_*L ↵Jakub Jelinek2-15/+347
[PR113993] The following testcase ICEs, because can_test_argument_range returns true for BUILT_IN_{COSH,SINH,EXP{,M1,2}}{F32X,F64X} among many other builtins, but get_no_error_domain doesn't handle those. float32x_type_node when supported in GCC always has DFmode, so that case is easy (and call-cdce assumes that SFmode is IEEE float and DFmode is IEEE double). So *F32X is simply handled by adding those cases next to *F64. float64x_type_node when supported in GCC by definition has a mode with larger precision and exponent range than DFmode, so it can be XFmode, TFmode or KFmode. I went through all the l/f128 suffixed builtins and verified that the float128x_type_node no error domain range is actually identical to the Intel extended long double no error domain range; it isn't that surprising, both IEEE quad and Intel/Motorola extended have the same exponent range [-16381, 16384] (well, Motorola -16382 probably because of different behavior for denormals, but that has nothing to do with get_no_error_domain which is about large inputs overflowing into +-Inf or triggering NaN, denormals could in theory do something solely for sqrt and even that is fine). In theory some target could have different larger type, so for *F64X the code verifies that REAL_MODE_FORMAT (TYPE_MODE (float64x_type_node))->emax == 16384 and if so, uses the *F128 domains, otherwise falls back to the non-suffixed ones (aka *F64), that is certainly the conservative minimum. While at it, the patch also changes the *L suffixed cases to do pretty much the same, the comment said that the function just assumes for *L the *F64 ranges, but that is unnecessarily conservative. All we currently have for long double is: 1) IEEE quad (emax 16384, *F128 ranges) 2) XFmode Intel/Motorola extended (emax 16384, same as *F128 ranges) 3) IBM extended (double double, emax 1024, the extra precision doesn't really help and the domains are the same as for *F64) 4) same as double (*F64 again) So, the patch uses also for *L REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384 checks and either tail recurses into the *F128 case for that or to non-suffixed (aka *F64) case otherwise. BUILT_IN_*F128X not handled because no target has those and it doesn't seem something is on the horizon and who knows what would be used for that. Thus, all we get this wrong for are probably VAX floats or something similar, no intent from me to look at that, that is preexisting issue. BTW, I'm surprised we don't have BUILT_IN_EXP10F{16,32,64,128,32X,64X,128X} builtins, seems glibc has those (sure, I think except *16 and *128x). 2024-02-22 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/113993 * tree-call-cdce.cc (get_no_error_domain): Handle BUILT_IN_{COSH,SINH,EXP{,M1,2}}{F32X,F64X}. Handle BUILT_IN_{COSH,SINH,EXP{,M1,2}}L for REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384 the as the F128 suffixed cases, otherwise as non-suffixed ones. Handle BUILT_IN_{EXP,POW}10L for REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384 as (-inf, 4932). * gcc.dg/tree-ssa/pr113993.c: New test.
2024-02-22bitintlower: Fix .MUL_OVERFLOW overflow checking [PR114038]Jakub Jelinek2-1/+23
Currently, bitint_large_huge::lower_mul_overflow uses cnt 1 only if startlimb == endlimb and in that case doesn't use a loop and handles everything in a special if: unsigned cnt; bool use_loop = false; if (startlimb == endlimb) cnt = 1; else if (startlimb + 1 == endlimb) cnt = 2; else if ((end % limb_prec) == 0) { cnt = 2; use_loop = true; } else { cnt = 3; use_loop = startlimb + 2 < endlimb; } if (cnt == 1) { ... } else The loop handling for the loop exit condition wants to compare if the incremented index is equal to endlimb, but that is correct only if end is not divisible by limb_prec and there will be a straight line check after the loop as well for the most significant limb. The code used endlimb + (cnt == 1) for that, but cnt == 1 is never true here, because cnt is either 2 or 3, so the right check is (cnt == 2). 2024-02-22 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/114038 * gimple-lower-bitint.cc (bitint_large_huge::lower_mul_overflow): Fix loop exit condition if end is divisible by limb_prec. * gcc.dg/torture/bitint-59.c: New test.
2024-02-22invoke.texi: Fix some skipping UrlSuffix problem for MIPSYunQiang Su2-11/+15
The problem is that, there are these lines in mips.opt.urls: ; skipping UrlSuffix for 'mabi=' due to finding no URLs ; skipping UrlSuffix for 'mno-flush-func' due to finding no URLs ; skipping UrlSuffix for 'mexplicit-relocs' due to finding no URLs These lines is not fixed by this patch due to that we don't document these options: ; skipping UrlSuffix for 'mlra' due to finding no URLs ; skipping UrlSuffix for 'mdebug' due to finding no URLs ; skipping UrlSuffix for 'meb' due to finding no URLs ; skipping UrlSuffix for 'mel' due to finding no URLs gcc * doc/invoke.texi(MIPS Options): Fix skipping UrlSuffix problem of mabi=, mno-flush-func, mexplicit-relocs; add missing leading - of mbranch-cost option. * config/mips/mips.opt.urls: Regenerate.
2024-02-21rs6000: Neuter option -mpower{8,9}-vector [PR109987]Kewen Lin1003-1836/+2097
As PR109987 and its duplicated bugs show, -mno-power8-vector (and -mno-power9-vector) cause some problems and as Segher pointed out in [1] they are workaround options, so this patch is to remove -m{no,}-power{8,9}-options. Like what we did for option -mdirect-move before, this patch still keep the corresponding internal flags and they are automatically set based on -mcpu. The test suite update takes some efforts, it consists of some aspects: - effective target powerpc_p{8,9}vector_ok are removed and replaced with powerpc_vsx_ok. - Some cases having -mpower{8,9}-vector are updated with -mvsx, some of them already have -mdejagnu-cpu. For those that don't have -mdejagnu-cpu, if -mdejagnu-cpu is needed for the test point, then it's appended; otherwise, add additional-options -mdejagnu-cpu=power{8,9} if has_arch_pwr{8,9} isn't satisfied. - Some test cases are updated with explicit -mvsx. - Some test cases with those two option mixed are adjusted to keep the test points, like -mpower8-vector -mno-power9-vector are updated with -mdejagnu-cpu=power8 -mvsx etc. - Some test cases with -mno-power{8,9}-vector are updated by replacing -mno-power{8,9}-vector with -mno-vsx, or just removing it. - For some cases, we don't always specify -mdejagnu-cpu to avoid to restrict the testing coverage, it would check has_arch_pwr{8,9} and appended that as need. - For vect test cases run, it doesn't specify -mcpu=power9 for power10 and up. Bootstrapped and regtested on: - powerpc64-linux-gnu P7/P8/P9 {-m32,-m64} - powerpc64le-linux-gnu P8/P9/P10 Although it's stage4 now, as the discussion in PR113115 we are still eager to neuter these two options, so is it ok for trunk? [1] https://gcc.gnu.org/pipermail/gcc-patches/2022-January/589303.html PR target/109987 gcc/ChangeLog: * config/rs6000/constraints.md (we): Update internal doc without referring to option -mpower9-vector. * config/rs6000/driver-rs6000.cc (asm_names): Remove mpower9-vector special handlings. * config/rs6000/rs6000-cpus.def (OTHER_P9_VECTOR_MASKS, OTHER_P8_VECTOR_MASKS): Merge to ... (OTHER_VSX_VECTOR_MASKS): ... here. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove some error message handlings and explicit option mask adjustments on explicit option power{8,9}-vector conflicting with other options. (rs6000_print_isa_options): Update comments. (rs6000_disable_incompatible_switches): Remove power{8,9}-vector related array items and handlings. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Remove mpower9-vector special handlings. * config/rs6000/rs6000.opt: Make option power{8,9}-vector as WarnRemoved. * doc/extend.texi: Remove documentation referring to option -mpower8-vector. * doc/invoke.texi: Remove documentation for option -mpower{8,9}-vector and adjust some documentation referring to them. * doc/md.texi: Update documentation for constraint we. * doc/sourcebuild.texi: Remove documentation for powerpc_p8vector_ok. libgcc/ChangeLog: * config/rs6000/t-float128-hw: Replace options -mpower{8,9}-vector with -mcpu=power9. * configure.ac: Update use of option -mpower9-vector with -mcpu=power9. * configure: Regenerate. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_powerpc_p8vector_ok): Remove. (check_effective_target_powerpc_p9vector_ok): Remove. (check_p8vector_hw_available): Replace -mpower8-vector with -mcpu=power8. (check_p9vector_hw_available): Replace -mpower9-vector with -mcpu=power9. (check_ppc_float128_hw_available): Likewise. (check_vect_support_and_set_flags): Replace -mpower8-vector with -mcpu=power8, replace -mpower9-vector with -mcpu=power9 or nothing if check_power10_hw_available and place -mcpu=970 first if needed to avoid possible overriding. * g++.target/powerpc/altivec-19.C: Replace powerpc_p9vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * gcc.target/powerpc/bfp/scalar-cmp-exp-eq-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-eq-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-eq-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-gt-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-gt-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-gt-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-lt-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-lt-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-lt-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-5.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-5.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-11.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-5.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-6.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-7.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-8.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-9.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-10.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-11.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-5.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-6.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-7.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-8.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-9.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-5.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-exp-0.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-exp-1.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-exp-2.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-exp-3.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-sig-0.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-sig-1.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-sig-2.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-sig-3.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-0.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-1.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-2.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-3.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-4.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-5.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-6.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-7.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-0.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-1.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-2.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-3.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-4.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-5.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-6.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-7.c: Likewise. * gcc.target/powerpc/builtins-3-p9.c: Likewise. * gcc.target/powerpc/byte-in-either-range-0.c: Likewise. * gcc.target/powerpc/byte-in-either-range-1.c: Likewise. * gcc.target/powerpc/byte-in-range-0.c: Likewise. * gcc.target/powerpc/byte-in-range-1.c: Likewise. * gcc.target/powerpc/byte-in-set-0.c: Likewise. * gcc.target/powerpc/byte-in-set-1.c: Likewise. * gcc.target/powerpc/byte-in-set-2.c: Likewise. * gcc.target/powerpc/clone1.c: Likewise. * gcc.target/powerpc/ctz-3.c: Likewise. * gcc.target/powerpc/ctz-4.c: Likewise. * gcc.target/powerpc/darn-0.c: Likewise. * gcc.target/powerpc/darn-1.c: Likewise. * gcc.target/powerpc/darn-2.c: Likewise. * gcc.target/powerpc/dform-3.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-0.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-1.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-10.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-11.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-12.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-13.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-14.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-15.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-16.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-17.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-18.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-19.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-2.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-20.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-21.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-22.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-23.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-24.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-25.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-26.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-27.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-28.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-29.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-3.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-30.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-31.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-32.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-33.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-34.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-35.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-36.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-37.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-38.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-39.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-4.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-40.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-41.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-42.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-43.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-44.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-45.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-46.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-47.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-48.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-49.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-5.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-50.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-51.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-52.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-53.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-54.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-55.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-56.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-57.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-58.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-59.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-6.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-60.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-61.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-62.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-63.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-64.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-65.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-66.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-67.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-68.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-69.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-7.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-70.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-71.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-72.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-73.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-74.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-75.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-76.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-77.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-78.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-79.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-8.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-9.c: Likewise. * gcc.target/powerpc/direct-move-vector.c: Likewise. * gcc.target/powerpc/float128-type-2.c: Likewise. * gcc.target/powerpc/fold-vec-abs-int-fwrapv.p9.c: Likewise. * gcc.target/powerpc/fold-vec-abs-int.p9.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.p9.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong.p9.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-char.p9.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-short.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-char.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-float.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-int.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-longlong.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-short.p9.c: Likewise. * gcc.target/powerpc/fold-vec-insert-char-p9.c: Likewise. * gcc.target/powerpc/fold-vec-insert-float-p9.c: Likewise. * gcc.target/powerpc/fold-vec-insert-int-p9.c: Likewise. * gcc.target/powerpc/fold-vec-insert-short-p9.c: Likewise. * gcc.target/powerpc/fold-vec-mult-int128-p9.c: Likewise. * gcc.target/powerpc/fold-vec-neg-int.p9.c: Likewise. * gcc.target/powerpc/fold-vec-neg-longlong.p9.c: Likewise. * gcc.target/powerpc/p9-dimode1.c: Likewise. * gcc.target/powerpc/p9-dimode2.c: Likewise. * gcc.target/powerpc/p9-extract-1.c: Likewise. * gcc.target/powerpc/p9-extract-2.c: Likewise. * gcc.target/powerpc/p9-extract-3.c: Likewise. * gcc.target/powerpc/p9-extract-4.c: Likewise. * gcc.target/powerpc/p9-fpcvt-1.c: Likewise. * gcc.target/powerpc/p9-fpcvt-2.c: Likewise. * gcc.target/powerpc/p9-fpcvt-3.c: Likewise. * gcc.target/powerpc/p9-lxvx-stxvx-1.c: Likewise. * gcc.target/powerpc/p9-lxvx-stxvx-2.c: Likewise. * gcc.target/powerpc/p9-lxvx-stxvx-3.c: Likewise. * gcc.target/powerpc/p9-minmax-1.c: Likewise. * gcc.target/powerpc/p9-minmax-2.c: Likewise. * gcc.target/powerpc/p9-minmax-3.c: Likewise. * gcc.target/powerpc/p9-novsx.c: Likewise. * gcc.target/powerpc/p9-permute.c: Likewise. * gcc.target/powerpc/p9-sign_extend-runnable.c: Likewise. * gcc.target/powerpc/p9-splat-1.c: Likewise. * gcc.target/powerpc/p9-splat-2.c: Likewise. * gcc.target/powerpc/p9-splat-3.c: Likewise. * gcc.target/powerpc/p9-splat-4.c: Likewise. * gcc.target/powerpc/p9-splat-5.c: Likewise. * gcc.target/powerpc/p9-vbpermd.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-1.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-2.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-3.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-4.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-5.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-6.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-8.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-1.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-2.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-3.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-4.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-5.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-6.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-8.c: Likewise. * gcc.target/powerpc/p9-vneg.c: Likewise. * gcc.target/powerpc/p9-vparity.c: Likewise. * gcc.target/powerpc/p9-vpermr.c: Likewise. * gcc.target/powerpc/p9-xxbr-1.c: Likewise. * gcc.target/powerpc/p9-xxbr-2.c: Likewise. * gcc.target/powerpc/p9-xxbr-3.c: Likewise. * gcc.target/powerpc/ppc-fortran/pr80108-1.f90: Likewise. * gcc.target/powerpc/ppc-round3.c: Likewise. * gcc.target/powerpc/pr103124.c: Likewise. * gcc.target/powerpc/pr104015-1.c: Likewise. * gcc.target/powerpc/pr106769-p9.c: Likewise. * gcc.target/powerpc/pr107412.c: Likewise. * gcc.target/powerpc/pr110429.c: Likewise. * gcc.target/powerpc/pr66144-1.c: Likewise. * gcc.target/powerpc/pr71186.c: Likewise. * gcc.target/powerpc/pr71309.c: Likewise. * gcc.target/powerpc/pr71670.c: Likewise. * gcc.target/powerpc/pr71698.c: Likewise. * gcc.target/powerpc/pr71720.c: Likewise. * gcc.target/powerpc/pr72853.c: Likewise. * gcc.target/powerpc/pr78056-1.c: Likewise. * gcc.target/powerpc/pr78658.c: Likewise. * gcc.target/powerpc/pr78953.c: Likewise. * gcc.target/powerpc/pr79004.c: Likewise. * gcc.target/powerpc/pr79038-1.c: Likewise. * gcc.target/powerpc/pr79179.c: Likewise. * gcc.target/powerpc/pr79251.p9.c: Likewise. * gcc.target/powerpc/pr79799-1.c: Likewise. * gcc.target/powerpc/pr79799-2.c: Likewise. * gcc.target/powerpc/pr79799-3.c: Likewise. * gcc.target/powerpc/pr79799-5.c: Likewise. * gcc.target/powerpc/pr80695-p9.c: Likewise. * gcc.target/powerpc/pr81348.c: Likewise. * gcc.target/powerpc/pr81622.c: Likewise. * gcc.target/powerpc/pr84154-3.c: Likewise. * gcc.target/powerpc/pr90763.c: Likewise. * gcc.target/powerpc/pr96933-1.c: Likewise. * gcc.target/powerpc/sad-vectorize-1.c: Likewise. * gcc.target/powerpc/sad-vectorize-2.c: Likewise. * gcc.target/powerpc/signbit-2.c: Likewise. * gcc.target/powerpc/vadsdu-0.c: Likewise. * gcc.target/powerpc/vadsdu-1.c: Likewise. * gcc.target/powerpc/vadsdu-2.c: Likewise. * gcc.target/powerpc/vadsdu-3.c: Likewise. * gcc.target/powerpc/vadsdu-4.c: Likewise. * gcc.target/powerpc/vadsdu-5.c: Likewise. * gcc.target/powerpc/vadsdub-1.c: Likewise. * gcc.target/powerpc/vadsdub-2.c: Likewise. * gcc.target/powerpc/vadsduh-1.c: Likewise. * gcc.target/powerpc/vadsduh-2.c: Likewise. * gcc.target/powerpc/vadsduw-1.c: Likewise. * gcc.target/powerpc/vadsduw-2.c: Likewise. * gcc.target/powerpc/vec-extract-4.c: Likewise. * gcc.target/powerpc/vec-init-3.c: Likewise. * gcc.target/powerpc/vec-minmax-1.c: Likewise. * gcc.target/powerpc/vec-minmax-2.c: Likewise. * gcc.target/powerpc/vec-set-char.c: Likewise. * gcc.target/powerpc/vec-set-int.c: Likewise. * gcc.target/powerpc/vec-set-short.c: Likewise. * gcc.target/powerpc/vec_reve_2.c: Likewise. * gcc.target/powerpc/vector_float.c: Likewise. * gcc.target/powerpc/vslv-0.c: Likewise. * gcc.target/powerpc/vslv-1.c: Likewise. * gcc.target/powerpc/vsrv-0.c: Likewise. * gcc.target/powerpc/vsrv-1.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-0.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-1.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-10.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-11.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-12.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-13.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-14.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-2.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-3.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-4.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-5.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-6.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-7.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-8.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-9.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-1.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-2.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-3.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-4.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-5.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-6.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-7.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-0.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-1.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-10.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-11.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-12.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-13.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-14.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-2.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-3.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-4.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-5.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-6.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-7.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-8.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-9.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-1.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-2.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-3.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-4.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-5.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-6.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-7.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-0.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-1.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-2.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-3.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-4.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-5.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-6.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-8.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-9.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-1.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-2.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-3.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-4.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-5.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-6.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-7.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-0.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-1.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-2.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-3.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-4.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-0.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-1.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-2.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-3.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-0.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-1.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-10.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-11.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-12.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-13.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-2.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-3.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-5.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-6.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-7.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-8.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-9.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-0.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-1.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-2.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-3.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-5.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-6.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-7.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-0.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-1.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-2.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-3.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-5.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-6.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-7.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-0.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-1.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-10.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-11.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-12.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-13.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-2.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-3.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-5.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-6.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-7.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-8.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-9.c: Likewise. * gcc.target/powerpc/vsx-builtin-msum.c: Likewise. * gcc.target/powerpc/vsx-himode.c: Likewise. * gcc.target/powerpc/vsx-himode2.c: Likewise. * gcc.target/powerpc/vsx-himode3.c: Likewise. * gcc.target/powerpc/vsx-qimode.c: Likewise. * gcc.target/powerpc/vsx-qimode2.c: Likewise. * gcc.target/powerpc/vsx-qimode3.c: Likewise. * g++.target/powerpc/pr65240-1.C: Replace powerpc_p8vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * g++.target/powerpc/pr65240-2.C: Likewise. * g++.target/powerpc/pr65240-3.C: Likewise. * g++.target/powerpc/pr65242.C: Likewise. * g++.target/powerpc/pr67211.C: Likewise. * g++.target/powerpc/pr71294.C: Likewise. * g++.target/powerpc/pr84279.C: Likewise. * g++.target/powerpc/pr93974.C: Likewise. * gcc.target/powerpc/atomic-p8.c: Likewise. * gcc.target/powerpc/atomic_load_store-p8.c: Likewise. * gcc.target/powerpc/bcd-2.c: Likewise. * gcc.target/powerpc/bcd-3.c: Likewise. * gcc.target/powerpc/bool2-p8.c: Likewise. * gcc.target/powerpc/bool3-p8.c: Likewise. * gcc.target/powerpc/builtins-1.c: Likewise. * gcc.target/powerpc/builtins-3-p8.c: Likewise. * gcc.target/powerpc/builtins-5.c: Likewise. * gcc.target/powerpc/builtins-9.c: Likewise. * gcc.target/powerpc/crypto-builtin-1.c: Likewise. * gcc.target/powerpc/crypto-builtin-2.c: Likewise. * gcc.target/powerpc/direct-move-double1.c: Likewise. * gcc.target/powerpc/direct-move-float1.c: Likewise. * gcc.target/powerpc/direct-move-long1.c: Likewise. * gcc.target/powerpc/direct-move-vint1.c: Likewise. * gcc.target/powerpc/float128-type-1.c: Likewise. * gcc.target/powerpc/fold-vec-extract-char.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-double.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise. * gcc.target/powerpc/fold-vec-insert-char-p8.c: Likewise. * gcc.target/powerpc/fold-vec-insert-float-p8.c: Likewise. * gcc.target/powerpc/fold-vec-insert-int-p8.c: Likewise. * gcc.target/powerpc/fold-vec-insert-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-insert-short-p8.c: Likewise. * gcc.target/powerpc/fold-vec-neg-char.c: Likewise. * gcc.target/powerpc/fold-vec-neg-floatdouble.c: Likewise. * gcc.target/powerpc/fold-vec-neg-int.p8.c: Likewise. * gcc.target/powerpc/fold-vec-neg-short.c: Likewise. * gcc.target/powerpc/fold-vec-select-double.c: Likewise. * gcc.target/powerpc/fold-vec-store-builtin_vec_xst-longlong.c: Likewise. * gcc.target/powerpc/fusion.c: Likewise. * gcc.target/powerpc/fusion2.c: Likewise. * gcc.target/powerpc/mul-vectorize-1.c: Likewise. * gcc.target/powerpc/p8-vec-xl-xst-v2.c: Likewise. * gcc.target/powerpc/p8-vec-xl-xst.c: Likewise. * gcc.target/powerpc/p8vector-builtin-1.c: Likewise. * gcc.target/powerpc/p8vector-builtin-2.c: Likewise. * gcc.target/powerpc/p8vector-builtin-3.c: Likewise. * gcc.target/powerpc/p8vector-builtin-4.c: Likewise. * gcc.target/powerpc/p8vector-builtin-5.c: Likewise. * gcc.target/powerpc/p8vector-builtin-6.c: Likewise. * gcc.target/powerpc/p8vector-builtin-7.c: Likewise. * gcc.target/powerpc/p8vector-fp.c: Likewise. * gcc.target/powerpc/p8vector-int128-1.c: Likewise. * gcc.target/powerpc/p8vector-ldst.c: Likewise. * gcc.target/powerpc/p8vector-vbpermq.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-1.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-2.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-3.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-4.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-5.c: Likewise. * gcc.target/powerpc/ppc-round2.c: Likewise. * gcc.target/powerpc/pr100866-1.c: Likewise. * gcc.target/powerpc/pr100866-2.c: Likewise. * gcc.target/powerpc/pr104239-1.c: Likewise. * gcc.target/powerpc/pr104239-2.c: Likewise. * gcc.target/powerpc/pr104239-3.c: Likewise. * gcc.target/powerpc/pr106769-p8.c: Likewise. * gcc.target/powerpc/pr108396.c: Likewise. * gcc.target/powerpc/pr111449-1.c: Likewise. * gcc.target/powerpc/pr57744.c: Likewise. * gcc.target/powerpc/pr58673-1.c: Likewise. * gcc.target/powerpc/pr58673-2.c: Likewise. * gcc.target/powerpc/pr60137.c: Likewise. * gcc.target/powerpc/pr60203.c: Likewise. * gcc.target/powerpc/pr66144-2.c: Likewise. * gcc.target/powerpc/pr66144-3.c: Likewise. * gcc.target/powerpc/pr68163.c: Likewise. * gcc.target/powerpc/pr69548.c: Likewise. * gcc.target/powerpc/pr70669.c: Likewise. * gcc.target/powerpc/pr71977-1.c: Likewise. * gcc.target/powerpc/pr71977-2.c: Likewise. * gcc.target/powerpc/pr72717.c: Likewise. * gcc.target/powerpc/pr78056-3.c: Likewise. * gcc.target/powerpc/pr78056-4.c: Likewise. * gcc.target/powerpc/pr78102.c: Likewise. * gcc.target/powerpc/pr78543.c: Likewise. * gcc.target/powerpc/pr78604.c: Likewise. * gcc.target/powerpc/pr79251.p8.c: Likewise. * gcc.target/powerpc/pr79354.c: Likewise. * gcc.target/powerpc/pr79544.c: Likewise. * gcc.target/powerpc/pr79907.c: Likewise. * gcc.target/powerpc/pr79951.c: Likewise. * gcc.target/powerpc/pr80315-1.c: Likewise. * gcc.target/powerpc/pr80315-2.c: Likewise. * gcc.target/powerpc/pr80315-3.c: Likewise. * gcc.target/powerpc/pr80315-4.c: Likewise. * gcc.target/powerpc/pr80510-2.c: Likewise. * gcc.target/powerpc/pr80695-p8.c: Likewise. * gcc.target/powerpc/pr80718.c: Likewise. * gcc.target/powerpc/pr84154-2.c: Likewise. * gcc.target/powerpc/pr88558-p8.c: Likewise. * gcc.target/powerpc/pr88845.c: Likewise. * gcc.target/powerpc/pr91903.c: Likewise. * gcc.target/powerpc/pr92923-2.c: Likewise. * gcc.target/powerpc/pr96933-2.c: Likewise. * gcc.target/powerpc/pr97019.c: Likewise. * gcc.target/powerpc/pragma_power8.c: Likewise. * gcc.target/powerpc/signbit-1.c: Likewise. * gcc.target/powerpc/swaps-p8-1.c: Likewise. * gcc.target/powerpc/swaps-p8-12.c: Likewise. * gcc.target/powerpc/swaps-p8-14.c: Likewise. * gcc.target/powerpc/swaps-p8-15.c: Likewise. * gcc.target/powerpc/swaps-p8-16.c: Likewise. * gcc.target/powerpc/swaps-p8-17.c: Likewise. * gcc.target/powerpc/swaps-p8-18.c: Likewise. * gcc.target/powerpc/swaps-p8-19.c: Likewise. * gcc.target/powerpc/swaps-p8-2.c: Likewise. * gcc.target/powerpc/swaps-p8-22.c: Likewise. * gcc.target/powerpc/swaps-p8-23.c: Likewise. * gcc.target/powerpc/swaps-p8-24.c: Likewise. * gcc.target/powerpc/swaps-p8-25.c: Likewise. * gcc.target/powerpc/swaps-p8-26.c: Likewise. * gcc.target/powerpc/swaps-p8-27.c: Likewise. * gcc.target/powerpc/swaps-p8-3.c: Likewise. * gcc.target/powerpc/swaps-p8-30.c: Likewise. * gcc.target/powerpc/swaps-p8-33.c: Likewise. * gcc.target/powerpc/swaps-p8-36.c: Likewise. * gcc.target/powerpc/swaps-p8-39.c: Likewise. * gcc.target/powerpc/swaps-p8-4.c: Likewise. * gcc.target/powerpc/swaps-p8-42.c: Likewise. * gcc.target/powerpc/swaps-p8-45.c: Likewise. * gcc.target/powerpc/swaps-p8-46.c: Likewise. * gcc.target/powerpc/swaps-p8-5.c: Likewise. * gcc.target/powerpc/unpack-vectorize-3.c: Likewise. * gcc.target/powerpc/upper-regs-sf.c: Likewise. * gcc.target/powerpc/vec-cmp.c: Likewise. * gcc.target/powerpc/vec-extract-1.c: Likewise. * gcc.target/powerpc/vec-extract-3.c: Likewise. * gcc.target/powerpc/vec-extract-5.c: Likewise. * gcc.target/powerpc/vec-extract-6.c: Likewise. * gcc.target/powerpc/vec-extract-7.c: Likewise. * gcc.target/powerpc/vec-extract-8.c: Likewise. * gcc.target/powerpc/vec-extract-9.c: Likewise. * gcc.target/powerpc/vec-init-10.c: Likewise. * gcc.target/powerpc/vec-init-6.c: Likewise. * gcc.target/powerpc/vec-init-7.c: Likewise. * gcc.target/powerpc/vsx-extract-3.c: Likewise. * gcc.target/powerpc/vsx-extract-4.c: Likewise. * gcc.target/powerpc/vsx-extract-5.c: Likewise. * gcc.target/powerpc/vsx-simode.c: Likewise. * gcc.target/powerpc/vsx-simode2.c: Likewise. * gcc.target/powerpc/vsx-simode3.c: Likewise. * gcc.target/powerpc/builtins-4-int128-runnable.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, replace -mpower8-vector with -mvsx, and add dg-additional-options -mdejagnu-cpu=power8 if !has_arch_pwr8. * gcc.target/powerpc/builtins-mergew-mergow.c: Likewise. * gcc.target/powerpc/direct-move-float3.c: Likewise. * gcc.target/powerpc/divkc3-2.c: Likewise. * gcc.target/powerpc/divkc3-3.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-add-4.c: Likewise. * gcc.target/powerpc/fold-vec-add-7.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-int.h: Likewise. * gcc.target/powerpc/fold-vec-cmp-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-short.h: Likewise. * gcc.target/powerpc/fold-vec-cntlz-char.c: Likewise. * gcc.target/powerpc/fold-vec-cntlz-int.c: Likewise. * gcc.target/powerpc/fold-vec-cntlz-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-cntlz-short.c: Likewise. * gcc.target/powerpc/fold-vec-ld-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-char.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-float.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-floatdouble.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-int.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-short.c: Likewise. * gcc.target/powerpc/fold-vec-logical-ors-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-logical-other-char.c: Likewise. * gcc.target/powerpc/fold-vec-logical-other-int.c: Likewise. * gcc.target/powerpc/fold-vec-logical-other-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-logical-other-short.c: Likewise. * gcc.target/powerpc/fold-vec-mergehl-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-minmax-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-mult-int.c: Likewise. * gcc.target/powerpc/fold-vec-mult-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-neg-int.c: Likewise. * gcc.target/powerpc/fold-vec-neg-longlong.h: Likewise. * gcc.target/powerpc/fold-vec-pack-double.c: Likewise. * gcc.target/powerpc/fold-vec-pack-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c: Likewise. * gcc.target/powerpc/fold-vec-shift-left-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-shift-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-st-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-sub-int128.c: Likewise. * gcc.target/powerpc/fold-vec-sub-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-unpack-float.c: Likewise. * gcc.target/powerpc/fold-vec-unpack-int.c: Likewise. * gcc.target/powerpc/mmx-packs.c: Likewise. * gcc.target/powerpc/mmx-packssdw-1.c: Likewise. * gcc.target/powerpc/mmx-packsswb-1.c: Likewise. * gcc.target/powerpc/mmx-packuswb-1.c: Likewise. * gcc.target/powerpc/mmx-paddb-1.c: Likewise. * gcc.target/powerpc/mmx-paddd-1.c: Likewise. * gcc.target/powerpc/mmx-paddsb-1.c: Likewise. * gcc.target/powerpc/mmx-paddsw-1.c: Likewise. * gcc.target/powerpc/mmx-paddusb-1.c: Likewise. * gcc.target/powerpc/mmx-paddusw-1.c: Likewise. * gcc.target/powerpc/mmx-paddw-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpeqb-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpeqd-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpeqw-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpgtb-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpgtd-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpgtw-1.c: Likewise. * gcc.target/powerpc/mmx-pmaddwd-1.c: Likewise. * gcc.target/powerpc/mmx-pmulhw-1.c: Likewise. * gcc.target/powerpc/mmx-pmullw-1.c: Likewise. * gcc.target/powerpc/mmx-pslld-1.c: Likewise. * gcc.target/powerpc/mmx-psllw-1.c: Likewise. * gcc.target/powerpc/mmx-psrad-1.c: Likewise. * gcc.target/powerpc/mmx-psraw-1.c: Likewise. * gcc.target/powerpc/mmx-psrld-1.c: Likewise. * gcc.target/powerpc/mmx-psrlw-1.c: Likewise. * gcc.target/powerpc/mmx-psubb-2.c: Likewise. * gcc.target/powerpc/mmx-psubd-2.c: Likewise. * gcc.target/powerpc/mmx-psubsb-1.c: Likewise. * gcc.target/powerpc/mmx-psubsw-1.c: Likewise. * gcc.target/powerpc/mmx-psubusb-1.c: Likewise. * gcc.target/powerpc/mmx-psubusw-1.c: Likewise. * gcc.target/powerpc/mmx-psubw-2.c: Likewise. * gcc.target/powerpc/mmx-punpckhbw-1.c: Likewise. * gcc.target/powerpc/mmx-punpckhdq-1.c: Likewise. * gcc.target/powerpc/mmx-punpckhwd-1.c: Likewise. * gcc.target/powerpc/mmx-punpcklbw-1.c: Likewise. * gcc.target/powerpc/mmx-punpckldq-1.c: Likewise. * gcc.target/powerpc/mmx-punpcklwd-1.c: Likewise. * gcc.target/powerpc/mulkc3-2.c: Likewise. * gcc.target/powerpc/mulkc3-3.c: Likewise. * gcc.target/powerpc/p8vector-builtin-8.c: Likewise. * gcc.target/powerpc/pr37191.c: Likewise. * gcc.target/powerpc/pr83862.c: Likewise. * gcc.target/powerpc/pr84154-1.c: Likewise. * gcc.target/powerpc/pr84220-sld2.c: Likewise. * gcc.target/powerpc/pr85456.c: Likewise. * gcc.target/powerpc/pr86731-longlong.c: Likewise. * gcc.target/powerpc/sse-addps-1.c: Likewise. * gcc.target/powerpc/sse-addss-1.c: Likewise. * gcc.target/powerpc/sse-andnps-1.c: Likewise. * gcc.target/powerpc/sse-andps-1.c: Likewise. * gcc.target/powerpc/sse-cmpss-1.c: Likewise. * gcc.target/powerpc/sse-cvtpi16ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpi32ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpi32x2ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpi8ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpspi16-1.c: Likewise. * gcc.target/powerpc/sse-cvtpspi8-1.c: Likewise. * gcc.target/powerpc/sse-cvtpu16ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpu8ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtsi2ss-1.c: Likewise. * gcc.target/powerpc/sse-cvtsi2ss-2.c: Likewise. * gcc.target/powerpc/sse-cvtss2si-1.c: Likewise. * gcc.target/powerpc/sse-cvtss2si-2.c: Likewise. * gcc.target/powerpc/sse-cvttss2si-1.c: Likewise. * gcc.target/powerpc/sse-cvttss2si-2.c: Likewise. * gcc.target/powerpc/sse-divps-1.c: Likewise. * gcc.target/powerpc/sse-divss-1.c: Likewise. * gcc.target/powerpc/sse-maxps-1.c: Likewise. * gcc.target/powerpc/sse-maxps-2.c: Likewise. * gcc.target/powerpc/sse-maxss-1.c: Likewise. * gcc.target/powerpc/sse-minps-1.c: Likewise. * gcc.target/powerpc/sse-minps-2.c: Likewise. * gcc.target/powerpc/sse-minss-1.c: Likewise. * gcc.target/powerpc/sse-movaps-1.c: Likewise. * gcc.target/powerpc/sse-movaps-2.c: Likewise. * gcc.target/powerpc/sse-movhlps-1.c: Likewise. * gcc.target/powerpc/sse-movhps-1.c: Likewise. * gcc.target/powerpc/sse-movhps-2.c: Likewise. * gcc.target/powerpc/sse-movlhps-1.c: Likewise. * gcc.target/powerpc/sse-movlps-1.c: Likewise. * gcc.target/powerpc/sse-movlps-2.c: Likewise. * gcc.target/powerpc/sse-movmskb-1.c: Likewise. * gcc.target/powerpc/sse-movmskps-1.c: Likewise. * gcc.target/powerpc/sse-movss-1.c: Likewise. * gcc.target/powerpc/sse-movss-2.c: Likewise. * gcc.target/powerpc/sse-movss-3.c: Likewise. * gcc.target/powerpc/sse-mulps-1.c: Likewise. * gcc.target/powerpc/sse-mulss-1.c: Likewise. * gcc.target/powerpc/sse-orps-1.c: Likewise. * gcc.target/powerpc/sse-pavgw-1.c: Likewise. * gcc.target/powerpc/sse-pmaxsw-1.c: Likewise. * gcc.target/powerpc/sse-pmaxub-1.c: Likewise. * gcc.target/powerpc/sse-pminsw-1.c: Likewise. * gcc.target/powerpc/sse-pminub-1.c: Likewise. * gcc.target/powerpc/sse-pmulhuw-1.c: Likewise. * gcc.target/powerpc/sse-psadbw-1.c: Likewise. * gcc.target/powerpc/sse-rcpps-1.c: Likewise. * gcc.target/powerpc/sse-rsqrtps-1.c: Likewise. * gcc.target/powerpc/sse-shufps-1.c: Likewise. * gcc.target/powerpc/sse-sqrtps-1.c: Likewise. * gcc.target/powerpc/sse-subps-1.c: Likewise. * gcc.target/powerpc/sse-subss-1.c: Likewise. * gcc.target/powerpc/sse-ucomiss-1.c: Likewise. * gcc.target/powerpc/sse-ucomiss-2.c: Likewise. * gcc.target/powerpc/sse-ucomiss-3.c: Likewise. * gcc.target/powerpc/sse-ucomiss-4.c: Likewise. * gcc.target/powerpc/sse-ucomiss-5.c: Likewise. * gcc.target/powerpc/sse-ucomiss-6.c: Likewise. * gcc.target/powerpc/sse-unpckhps-1.c: Likewise. * gcc.target/powerpc/sse-unpcklps-1.c: Likewise. * gcc.target/powerpc/sse-xorps-1.c: Likewise. * gcc.target/powerpc/sse2-addpd-1.c: Likewise. * gcc.target/powerpc/sse2-addsd-1.c: Likewise. * gcc.target/powerpc/sse2-andnpd-1.c: Likewise. * gcc.target/powerpc/sse2-andpd-1.c: Likewise. * gcc.target/powerpc/sse2-cmppd-1.c: Likewise. * gcc.target/powerpc/sse2-cmpsd-1.c: Likewise. * gcc.target/powerpc/sse2-comisd-1.c: Likewise. * gcc.target/powerpc/sse2-comisd-2.c: Likewise. * gcc.target/powerpc/sse2-comisd-3.c: Likewise. * gcc.target/powerpc/sse2-comisd-4.c: Likewise. * gcc.target/powerpc/sse2-comisd-5.c: Likewise. * gcc.target/powerpc/sse2-comisd-6.c: Likewise. * gcc.target/powerpc/sse2-cvtdq2pd-1.c: Likewise. * gcc.target/powerpc/sse2-cvtdq2ps-1.c: Likewise. * gcc.target/powerpc/sse2-cvtpd2dq-1.c: Likewise. * gcc.target/powerpc/sse2-cvtpd2ps-1.c: Likewise. * gcc.target/powerpc/sse2-cvtps2dq-1.c: Likewise. * gcc.target/powerpc/sse2-cvtps2pd-1.c: Likewise. * gcc.target/powerpc/sse2-cvtsd2si-1.c: Likewise. * gcc.target/powerpc/sse2-cvtsd2si-2.c: Likewise. * gcc.target/powerpc/sse2-cvtsd2ss-1.c: Likewise. * gcc.target/powerpc/sse2-cvtsi2sd-1.c: Likewise. * gcc.target/powerpc/sse2-cvtsi2sd-2.c: Likewise. * gcc.target/powerpc/sse2-cvtss2sd-1.c: Likewise. * gcc.target/powerpc/sse2-cvttpd2dq-1.c: Likewise. * gcc.target/powerpc/sse2-cvttps2dq-1.c: Likewise. * gcc.target/powerpc/sse2-cvttsd2si-1.c: Likewise. * gcc.target/powerpc/sse2-cvttsd2si-2.c: Likewise. * gcc.target/powerpc/sse2-divpd-1.c: Likewise. * gcc.target/powerpc/sse2-divsd-1.c: Likewise. * gcc.target/powerpc/sse2-maxpd-1.c: Likewise. * gcc.target/powerpc/sse2-maxsd-1.c: Likewise. * gcc.target/powerpc/sse2-minpd-1.c: Likewise. * gcc.target/powerpc/sse2-minsd-1.c: Likewise. * gcc.target/powerpc/sse2-mmx.c: Likewise. * gcc.target/powerpc/sse2-movhpd-1.c: Likewise. * gcc.target/powerpc/sse2-movhpd-2.c: Likewise. * gcc.target/powerpc/sse2-movlpd-1.c: Likewise. * gcc.target/powerpc/sse2-movlpd-2.c: Likewise. * gcc.target/powerpc/sse2-movmskpd-1.c: Likewise. * gcc.target/powerpc/sse2-movq-1.c: Likewise. * gcc.target/powerpc/sse2-movq-2.c: Likewise. * gcc.target/powerpc/sse2-movq-3.c: Likewise. * gcc.target/powerpc/sse2-movsd-1.c: Likewise. * gcc.target/powerpc/sse2-movsd-2.c: Likewise. * gcc.target/powerpc/sse2-movsd-3.c: Likewise. * gcc.target/powerpc/sse2-mulpd-1.c: Likewise. * gcc.target/powerpc/sse2-mulsd-1.c: Likewise. * gcc.target/powerpc/sse2-orpd-1.c: Likewise. * gcc.target/powerpc/sse2-packssdw-1.c: Likewise. * gcc.target/powerpc/sse2-packsswb-1.c: Likewise. * gcc.target/powerpc/sse2-packuswb-1.c: Likewise. * gcc.target/powerpc/sse2-paddb-1.c: Likewise. * gcc.target/powerpc/sse2-paddd-1.c: Likewise. * gcc.target/powerpc/sse2-paddq-1.c: Likewise. * gcc.target/powerpc/sse2-paddsb-1.c: Likewise. * gcc.target/powerpc/sse2-paddsw-1.c: Likewise. * gcc.target/powerpc/sse2-paddusb-1.c: Likewise. * gcc.target/powerpc/sse2-paddusw-1.c: Likewise. * gcc.target/powerpc/sse2-paddw-1.c: Likewise. * gcc.target/powerpc/sse2-pand-1.c: Likewise. * gcc.target/powerpc/sse2-pandn-1.c: Likewise. * gcc.target/powerpc/sse2-pavgb-1.c: Likewise. * gcc.target/powerpc/sse2-pavgw-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpeqb-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpeqd-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpeqw-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpgtb-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpgtd-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpgtw-1.c: Likewise. * gcc.target/powerpc/sse2-pextrw.c: Likewise. * gcc.target/powerpc/sse2-pinsrw.c: Likewise. * gcc.target/powerpc/sse2-pmaddwd-1.c: Likewise. * gcc.target/powerpc/sse2-pmaxsw-1.c: Likewise. * gcc.target/powerpc/sse2-pmaxub-1.c: Likewise. * gcc.target/powerpc/sse2-pminsw-1.c: Likewise. * gcc.target/powerpc/sse2-pminub-1.c: Likewise. * gcc.target/powerpc/sse2-pmovmskb-1.c: Likewise. * gcc.target/powerpc/sse2-pmulhuw-1.c: Likewise. * gcc.target/powerpc/sse2-pmulhw-1.c: Likewise. * gcc.target/powerpc/sse2-pmullw-1.c: Likewise. * gcc.target/powerpc/sse2-pmuludq-1.c: Likewise. * gcc.target/powerpc/sse2-por-1.c: Likewise. * gcc.target/powerpc/sse2-psadbw-1.c: Likewise. * gcc.target/powerpc/sse2-pshufd-1.c: Likewise. * gcc.target/powerpc/sse2-pshufhw-1.c: Likewise. * gcc.target/powerpc/sse2-pshuflw-1.c: Likewise. * gcc.target/powerpc/sse2-pslld-1.c: Likewise. * gcc.target/powerpc/sse2-pslld-2.c: Likewise. * gcc.target/powerpc/sse2-pslldq-1.c: Likewise. * gcc.target/powerpc/sse2-psllq-1.c: Likewise. * gcc.target/powerpc/sse2-psllq-2.c: Likewise. * gcc.target/powerpc/sse2-psllw-1.c: Likewise. * gcc.target/powerpc/sse2-psllw-2.c: Likewise. * gcc.target/powerpc/sse2-psrad-1.c: Likewise. * gcc.target/powerpc/sse2-psrad-2.c: Likewise. * gcc.target/powerpc/sse2-psraw-1.c: Likewise. * gcc.target/powerpc/sse2-psraw-2.c: Likewise. * gcc.target/powerpc/sse2-psrld-1.c: Likewise. * gcc.target/powerpc/sse2-psrld-2.c: Likewise. * gcc.target/powerpc/sse2-psrldq-1.c: Likewise. * gcc.target/powerpc/sse2-psrlq-1.c: Likewise. * gcc.target/powerpc/sse2-psrlq-2.c: Likewise. * gcc.target/powerpc/sse2-psrlw-1.c: Likewise. * gcc.target/powerpc/sse2-psrlw-2.c: Likewise. * gcc.target/powerpc/sse2-psubb-1.c: Likewise. * gcc.target/powerpc/sse2-psubd-1.c: Likewise. * gcc.target/powerpc/sse2-psubq-1.c: Likewise. * gcc.target/powerpc/sse2-psubsb-1.c: Likewise. * gcc.target/powerpc/sse2-psubsw-1.c: Likewise. * gcc.target/powerpc/sse2-psubusb-1.c: Likewise. * gcc.target/powerpc/sse2-psubusw-1.c: Likewise. * gcc.target/powerpc/sse2-psubw-1.c: Likewise. * gcc.target/powerpc/sse2-punpckhbw-1.c: Likewise. * gcc.target/powerpc/sse2-punpckhdq-1.c: Likewise. * gcc.target/powerpc/sse2-punpckhqdq-1.c: Likewise. * gcc.target/powerpc/sse2-punpckhwd-1.c: Likewise. * gcc.target/powerpc/sse2-punpcklbw-1.c: Likewise. * gcc.target/powerpc/sse2-punpckldq-1.c: Likewise. * gcc.target/powerpc/sse2-punpcklqdq-1.c: Likewise. * gcc.target/powerpc/sse2-punpcklwd-1.c: Likewise. * gcc.target/powerpc/sse2-pxor-1.c: Likewise. * gcc.target/powerpc/sse2-shufpd-1.c: Likewise. * gcc.target/powerpc/sse2-sqrtpd-1.c: Likewise. * gcc.target/powerpc/sse2-subpd-1.c: Likewise. * gcc.target/powerpc/sse2-subsd-1.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-1.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-2.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-3.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-4.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-5.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-6.c: Likewise. * gcc.target/powerpc/sse2-unpckhpd-1.c: Likewise. * gcc.target/powerpc/sse2-unpcklpd-1.c: Likewise. * gcc.target/powerpc/sse2-xorpd-1.c: Likewise. * gcc.target/powerpc/sse3-addsubpd.c: Likewise. * gcc.target/powerpc/sse3-addsubps.c: Likewise. * gcc.target/powerpc/sse3-haddpd.c: Likewise. * gcc.target/powerpc/sse3-haddps.c: Likewise. * gcc.target/powerpc/sse3-hsubpd.c: Likewise. * gcc.target/powerpc/sse3-hsubps.c: Likewise. * gcc.target/powerpc/sse3-lddqu.c: Likewise. * gcc.target/powerpc/sse3-movddup.c: Likewise. * gcc.target/powerpc/sse3-movshdup.c: Likewise. * gcc.target/powerpc/sse3-movsldup.c: Likewise. * gcc.target/powerpc/sse4_1-blendpd.c: Likewise. * gcc.target/powerpc/sse4_1-blendps-2.c: Likewise. * gcc.target/powerpc/sse4_1-blendps.c: Likewise. * gcc.target/powerpc/sse4_1-blendvpd.c: Likewise. * gcc.target/powerpc/sse4_1-blendvps.c: Likewise. * gcc.target/powerpc/sse4_1-ceilpd.c: Likewise. * gcc.target/powerpc/sse4_1-ceilps.c: Likewise. * gcc.target/powerpc/sse4_1-ceilsd.c: Likewise. * gcc.target/powerpc/sse4_1-ceilss.c: Likewise. * gcc.target/powerpc/sse4_1-floorpd.c: Likewise. * gcc.target/powerpc/sse4_1-floorps.c: Likewise. * gcc.target/powerpc/sse4_1-floorsd.c: Likewise. * gcc.target/powerpc/sse4_1-floorss.c: Likewise. * gcc.target/powerpc/sse4_1-pblendvb.c: Likewise. * gcc.target/powerpc/sse4_1-pblendw-2.c: Likewise. * gcc.target/powerpc/sse4_1-pblendw.c: Likewise. * gcc.target/powerpc/sse4_1-pcmpeqq.c: Likewise. * gcc.target/powerpc/sse4_1-pinsrb.c: Likewise. * gcc.target/powerpc/sse4_1-pinsrd.c: Likewise. * gcc.target/powerpc/sse4_1-pinsrq.c: Likewise. * gcc.target/powerpc/sse4_1-pmovsxbq.c: Likewise. * gcc.target/powerpc/sse4_1-pmovsxdq.c: Likewise. * gcc.target/powerpc/sse4_1-pmovsxwq.c: Likewise. * gcc.target/powerpc/sse4_1-pmuldq.c: Likewise. * gcc.target/powerpc/sse4_1-ptest-1.c: Likewise. * gcc.target/powerpc/sse4_1-roundpd-2.c: Likewise. * gcc.target/powerpc/sse4_1-roundpd-3.c: Likewise. * gcc.target/powerpc/sse4_2-pcmpgtq.c: Likewise. * gcc.target/powerpc/ssse3-pabsb.c: Likewise. * gcc.target/powerpc/ssse3-pabsd.c: Likewise. * gcc.target/powerpc/ssse3-pabsw.c: Likewise. * gcc.target/powerpc/ssse3-palignr.c: Likewise. * gcc.target/powerpc/ssse3-phaddd.c: Likewise. * gcc.target/powerpc/ssse3-phaddsw.c: Likewise. * gcc.target/powerpc/ssse3-phaddw.c: Likewise. * gcc.target/powerpc/ssse3-phsubd.c: Likewise. * gcc.target/powerpc/ssse3-phsubsw.c: Likewise. * gcc.target/powerpc/ssse3-phsubw.c: Likewise. * gcc.target/powerpc/ssse3-pmaddubsw.c: Likewise. * gcc.target/powerpc/ssse3-pmulhrsw.c: Likewise. * gcc.target/powerpc/ssse3-pshufb.c: Likewise. * gcc.target/powerpc/ssse3-psignb.c: Likewise. * gcc.target/powerpc/ssse3-psignd.c: Likewise. * gcc.target/powerpc/ssse3-psignw.c: Likewise. * gcc.target/powerpc/vec-cmp-sel.c: Likewise. * gcc.target/powerpc/vec-sld-modulo.c: Likewise. * gcc.target/powerpc/vec-srad-modulo.c: Likewise. * gcc.target/powerpc/vec-srd-modulo.c: Likewise. * gcc.target/powerpc/amo1.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok, replace -mpower9-vector with -mvsx, and add dg-additional-options -mdejagnu-cpu=power9 if !has_arch_pwr9. * gcc.target/powerpc/amo2.c: Likewise. * gcc.target/powerpc/dform-1.c: Likewise. * gcc.target/powerpc/dform-2.c: Likewise. * gcc.target/powerpc/float128-5.c: Likewise. * gcc.target/powerpc/float128-complex-2.c: Likewise. * gcc.target/powerpc/float128-fma1.c: Likewise. * gcc.target/powerpc/float128-hw.c: Likewise. * gcc.target/powerpc/float128-hw10.c: Likewise. * gcc.target/powerpc/float128-hw11.c: Likewise. * gcc.target/powerpc/float128-hw2.c: Likewise. * gcc.target/powerpc/float128-hw3.c: Likewise. * gcc.target/powerpc/float128-hw4.c: Likewise. * gcc.target/powerpc/float128-hw5.c: Likewise. * gcc.target/powerpc/float128-hw6.c: Likewise. * gcc.target/powerpc/float128-hw7.c: Likewise. * gcc.target/powerpc/float128-hw8.c: Likewise. * gcc.target/powerpc/float128-hw9.c: Likewise. * gcc.target/powerpc/float128-minmax.c: Likewise. * gcc.target/powerpc/float128-odd.c: Likewise. * gcc.target/powerpc/float128-sqrt1.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-int.p9.c: Likewise. * gcc.target/powerpc/gnuattr2.c: Likewise. * gcc.target/powerpc/pr71656-1.c: Likewise. * gcc.target/powerpc/pr71656-2.c: Likewise. * gcc.target/powerpc/pr81959.c: Likewise. * gcc.target/powerpc/pr82748-1.c: Likewise. * gcc.target/powerpc/pr82748-2.c: Likewise. * gcc.target/powerpc/pr111449-2.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok. * gcc.target/powerpc/pr98914.c: Likewise. * gcc.target/powerpc/versioned-copy-loop.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * gcc.target/powerpc/clone2.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok. * gcc.target/powerpc/p9-options-1.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok, replace -mno-power9-vector with -mno-vsx. * gcc.target/powerpc/pr84226.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * g++.dg/pr69667.C: Replace powerpc_p8vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * gcc.dg/vect/costmodel/ppc/costmodel-slp-perm.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok and replace -mpower9-vector with -mvsx. * gcc.dg/vect/pr109011-1.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, and replace -mpower8-vector with -mdejagnu-cpu=power8 -mvsx or -mvsx under different conditions. * gcc.dg/vect/pr109011-2.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok, and replace -mpower9-vector with -mdejagnu-cpu=power9 -mvsx or -mvsx under different conditions. * gcc.dg/vect/pr109011-4.c: Likewise. * gcc.dg/vect/pr109011-3.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, and replace -mpower8-vector -mno-power9-vector with -mdejagnu-cpu=power8 -mvsx. * gcc.dg/vect/pr109011-5.c: Likewise. * gcc.target/powerpc/altivec-35.c: Remove -mno-power8-vector. * gcc.target/powerpc/vsx-vector-7.c: Replace -mno-power8-vector with -mdejagnu-cpu=power7. * gcc.dg/vect/O3-pr70130.c: Replace -mcpu=power7 with options -mdejagnu-cpu=power7 -mvsx and remove option -mno-power9-vector -mno-power8-vector. * gfortran.dg/vect/pr45714-b.f: Likewise. * gcc.dg/vect/pr48765.c: Remove dg-skip-if and replace -mcpu=power7 with option -mdejagnu-cpu=power6. * gcc.target/powerpc/pr78056-2.c: Likewise. * gcc.target/powerpc/altivec-2-runnable.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, remove -mpower8-vector and add dg-additional-options -mdejagnu-cpu=power8 if !has_arch_pwr8. * gcc.target/powerpc/altivec-37.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.p8.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok and replace -mpower8-vector with -mvsx. * gcc.target/powerpc/fold-vec-abs-longlong.p8.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-char.p8.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-int.p8.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-short.p8.c: Likewise. * gcc.target/powerpc/fold-vec-mergeeo-floatdouble.c: Likewise. * gcc.target/powerpc/fold-vec-mergeeo-int.c: Likewise. * gcc.target/powerpc/fold-vec-mergeeo-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-mult-int128-p8.c: Likewise. * gcc.target/powerpc/fold-vec-neg-longlong.p8.c: Likewise. * gcc.target/powerpc/pr104124.c: Likewise. * gcc.target/powerpc/vec-cmpne-long.c: Likewise. * gcc.target/powerpc/pr86731-fwrapv-longlong.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, replace -mpower8-vector with -mvsx and add dg-additional-options -mdejagnu-cpu=power8 if !has_arch_pwr8. * gcc.target/powerpc/pr80098-1.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok and replace -mno-power9-vector with -mno-vsx. * gcc.target/powerpc/pr80098-2.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok and replace -mno-power8-vector with -mno-vsx. * gcc.target/powerpc/pragma_misc9.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok.
2024-02-22RISC-V: Upgrade RVV intrinsic version to 0.12Pan Li3-2/+21
Upgrade the version of RVV intrinsic from 0.11 to 0.12. PR target/114017 gcc/ChangeLog: * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Upgrade the version to 0.12. gcc/testsuite/ChangeLog: * gcc.target/riscv/predef-__riscv_v_intrinsic.c: Update the version to 0.12. * gcc.target/riscv/rvv/base/pr114017-1.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-02-21RISC-V: Add tests for constraints "i" and "s"Fangrui Song1-0/+14
The constraints "i" and "s" can be used with a symbol that binds externally, e.g. ``` namespace ns { extern int var, a[4]; } void foo() { asm(".pushsection .xxx,\"aw\"; .dc.a %0; .popsection" :: "s"(&ns::var)); asm(".reloc ., BFD_RELOC_NONE, %0" :: "s"(&ns::a[3])); } ``` gcc/testsuite/ChangeLog: * gcc.target/riscv/asm-raw-symbol.c: New test.
2024-02-22Daily bump.GCC Administrator10-1/+533
2024-02-21Update cpplib de.poJoseph Myers1-33/+22
* de.po: Update.
2024-02-21RISC-V: Enable assert for insn_has_dfa_reservationEdwin Lu1-2/+0
Enables assert that every typed instruction is associated with a dfa reservation gcc/ChangeLog: * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
2024-02-21RISC-V: Quick and simple fixes to testcases that break due to reorderingEdwin Lu25-62/+140
The following test cases are easily fixed with small updates to the expected assembly order. Additionally make calling-convention testcases more robust PR target/113249 gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/calling-convention-1.c: Rearrange and adjust asm-checker times * gcc.target/riscv/rvv/autovec/vls/calling-convention-2.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-3.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-4.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-5.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-6.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-7.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-12.c: Rearrange assembly * gcc.target/riscv/rvv/base/binop_vx_constraint-16.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-17.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-19.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-21.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-23.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-25.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-27.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-29.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-31.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-33.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-35.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-4.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-40.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-44.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-8.c: Ditto * gcc.target/riscv/rvv/base/shift_vx_constraint-1.c: Ditto * gcc.target/riscv/rvv/vsetvl/avl_single-107.c: Change expected vsetvl Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
2024-02-21RISC-V: Use default cost model for insn schedulingEdwin Lu58-0/+116
Use default cost model scheduling on these test cases. All these tests introduce scan dump failures with -mtune generic-ooo. Since the vector cost models are the same across all three tunes, some of the tests in PR113249 will be fixed with this patch series. PR target/113249 gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/bug-1.C: Use default scheduling * gcc.target/riscv/rvv/autovec/reduc/reduc_call-2.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-102.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-108.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-114.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-119.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-12.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-16.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-17.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-19.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-21.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-23.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-25.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-27.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-29.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-31.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-33.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-35.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-4.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-40.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-44.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-50.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-56.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-62.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-68.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-74.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-79.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-8.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-84.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-90.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-96.c: Ditto * gcc.target/riscv/rvv/base/float-point-dynamic-frm-30.c: Ditto * gcc.target/riscv/rvv/base/pr108185-1.c: Ditto * gcc.target/riscv/rvv/base/pr108185-2.c: Ditto * gcc.target/riscv/rvv/base/pr108185-3.c: Ditto * gcc.target/riscv/rvv/base/pr108185-4.c: Ditto * gcc.target/riscv/rvv/base/pr108185-5.c: Ditto * gcc.target/riscv/rvv/base/pr108185-6.c: Ditto * gcc.target/riscv/rvv/base/pr108185-7.c: Ditto * gcc.target/riscv/rvv/base/shift_vx_constraint-1.c: Ditto * gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Ditto * gfortran.dg/vect/vect-8.f90: Ditto Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
2024-02-21RISC-V: Add vector related pipelinesEdwin Lu3-126/+145
Creates new generic vector pipeline file common to all cpu tunes. Moves all vector related pipelines from generic-ooo to generic-vector-ooo. Creates new vector crypto related insn reservations. gcc/ChangeLog: * config/riscv/generic-ooo.md (generic_ooo): Move reservation (generic_ooo_vec_load): Ditto (generic_ooo_vec_store): Ditto (generic_ooo_vec_loadstore_seg): Ditto (generic_ooo_vec_alu): Ditto (generic_ooo_vec_fcmp): Ditto (generic_ooo_vec_imul): Ditto (generic_ooo_vec_fadd): Ditto (generic_ooo_vec_fmul): Ditto (generic_ooo_crypto): Ditto (generic_ooo_perm): Ditto (generic_ooo_vec_reduction): Ditto (generic_ooo_vec_ordered_reduction): Ditto (generic_ooo_vec_idiv): Ditto (generic_ooo_vec_float_divsqrt): Ditto (generic_ooo_vec_mask): Ditto (generic_ooo_vec_vesetvl): Ditto (generic_ooo_vec_setrm): Ditto (generic_ooo_vec_readlen): Ditto * config/riscv/riscv.md: Include generic-vector-ooo * config/riscv/generic-vector-ooo.md: New file. To here Signed-off-by: Edwin Lu <ewlu@rivosinc.com> Co-authored-by: Robin Dapp <rdapp.gcc@gmail.com>
2024-02-21RISC-V: Add non-vector types to dfa pipelinesEdwin Lu8-69/+117
This patch adds non-vector related insn reservations and updates/creates new insn reservations so all non-vector typed instructions have a reservation. gcc/ChangeLog: * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation (generic_ooo_branch): Ditto * config/riscv/generic.md (generic_sfb_alu): Ditto (generic_fmul_half): Ditto * config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types * config/riscv/sifive-7.md (sifive_7_hfma): Add reservation (sifive_7_popcount): Ditto * config/riscv/sifive-p400.md (sifive_p400_clmul): Ditto * config/riscv/sifive-p600.md (sifive_p600_clmul): Ditto * config/riscv/vector.md: Change rdfrm to fmove * config/riscv/zc.md: Change pushpop to load/store Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
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