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This streamlines the submachinery that makes it so that the finalization of
temporaries created for EWAs and conditional expressions is deferred to the
enclosing context.
The original implementation was using a deep tree traversal for EWAs, which
was later restricted to immediate subexpressions; this further flattens it
to the traversal of the immediate list of actions of the EWA in keeping with
the implementation for conditional expressions.
This should not change anything because the enclosing context found by the
machinery is the same, whatever the starting position in a nest of EWAs or
conditional expressions.
gcc/ada/
* exp_ch4.adb (Process_If_Case_Statements): Rename into...
(Process_Transients_In_Expression): ...this and beef up comment.
(Expand_N_Case_Expression): Call Process_Transients_In_Expression
unconditionally on the list of actions of each alternative.
(Expand_N_Expression_With_Actions): Do not deal with actions in
nested subexpressions, but call Process_Transients_In_Expression
on the list of actions only.
(Expand_N_If_Expression): Adjust to above renaming. Add missing
calls to Process_Transients_In_Expression in the case when an EWA
is not used because of Minimize_Expression_With_Actions.
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Due to recent VLSmode changes (Change for fixing ICE and run-time FAIL).
The dump check is same as ARM SVE now. So adapt test for RISC-V.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/bb-slp-cond-1.c: Adapt for RISC-V.
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When performing final value replacement we guard against exponential
(temporary) code growth due to unsharing of trees (SCEV heavily
relies on tree sharing). The following relaxes this a tiny bit
to cover some more optimizations and puts in comments as to what
the real fix would be.
PR tree-optimization/113080
* tree-scalar-evolution.cc (expression_expensive_p): Allow
a tiny bit of growth due to expansion of shared trees.
(final_value_replacement_loop): Add comment.
* gcc.dg/tree-ssa/sccp-3.c: New testcase.
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The PR112736 testcase fails on RISC-V because the aligned exception
uses the wrong check. The alignment support scheme can be
dr_aligned even when the access isn't aligned to the vector size
but some targets are happy with element alignment. The following
fixes that.
PR tree-optimization/113073
* tree-vect-stmts.cc (vectorizable_load): Properly ensure
to exempt only vector-size aligned overreads.
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This patch fixes two issues with the handling of 128-bit TImode integer
constants in the x86_64 backend. The main issue is that GCC always
tries to load 128-bit integer constants via broadcasts to vector SSE
registers, even if the result is required in general registers. This
is seen in the two closely related functions below:
__int128 m;
void foo() { m &= CONST; }
void bar() { m = CONST; }
When compiled with -O2 -mavx, we currently generate:
foo: movabsq $81985529216486895, %rax
vmovq %rax, %xmm0
vpunpcklqdq %xmm0, %xmm0, %xmm0
vmovq %xmm0, %rax
vpextrq $1, %xmm0, %rdx
andq %rax, m(%rip)
andq %rdx, m+8(%rip)
ret
bar: movabsq $81985529216486895, %rax
vmovq %rax, %xmm1
vpunpcklqdq %xmm1, %xmm1, %xmm0
vpextrq $1, %xmm0, %rdx
vmovq %xmm0, m(%rip)
movq %rdx, m+8(%rip)
ret
With this patch we defer the decision to use vector broadcast for
TImode until we know that we actually want a SSE register result,
by moving the call to ix86_convert_const_wide_int_to_broadcast from
the RTL expansion pass, to the scalar-to-vector (STV) pass. With
this change (and a minor tweak described below) we now generate:
foo: movabsq $81985529216486895, %rax
andq %rax, m(%rip)
andq %rax, m+8(%rip)
ret
bar: movabsq $81985529216486895, %rax
vmovq %rax, %xmm0
vpunpcklqdq %xmm0, %xmm0, %xmm0
vmovdqa %xmm0, m(%rip)
ret
showing that we now correctly use vector mode broadcasts (only)
where appropriate.
The one minor tweak mentioned above is to enable the un-cprop hi/lo
optimization, that I originally contributed back in September 2004
https://gcc.gnu.org/pipermail/gcc-patches/2004-September/148756.html
even when not optimizing for size. Without this (and currently with
just -O2) the function foo above generates:
foo: movabsq $81985529216486895, %rax
movabsq $81985529216486895, %rdx
andq %rax, m(%rip)
andq %rdx, m+8(%rip)
ret
I'm not sure why (back in 2004) I thought that avoiding the implicit
"movq %rax, %rdx" instead of a second load was faster, perhaps avoiding
a dependency to allow better scheduling, but nowadays "movq %rax, %rdx"
is either eliminated by GCC's hardreg cprop pass, or special cased by
modern hardware, making the first foo preferrable, not only shorter but
also faster.
2023-12-19 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-expand.cc
(ix86_convert_const_wide_int_to_broadcast): Remove static.
(ix86_expand_move): Don't attempt to convert wide constants
to SSE using ix86_convert_const_wide_int_to_broadcast here.
(ix86_split_long_move): Always un-cprop multi-word constants.
* config/i386/i386-expand.h
(ix86_convert_const_wide_int_to_broadcast): Prototype here.
* config/i386/i386-features.cc: Include i386-expand.h.
(timode_scalar_chain::convert_insn): When converting TImode to
V1TImode, try ix86_convert_const_wide_int_to_broadcast.
gcc/testsuite/ChangeLog
* gcc.target/i386/movti-2.c: New test case.
* gcc.target/i386/movti-3.c: Likewise.
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for 'extern' variables [PR90868]
This likely still isn't what OpenACC actually intends (addressing that is for
another day), but at least we now misbehave consistently for C and C++.
PR c++/90868
gcc/cp/
* parser.cc (cp_parser_oacc_declare): For "more than once", check
the DECL that we're actually setting the attribute on.
gcc/testsuite/
* c-c++-common/goacc/declare-1.c: Adjust.
* c-c++-common/goacc/declare-2.c: Likewise.
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gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vector): Use builder.inner_mode ().
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Apparently when looking for "signbit<mode>2" vector expanders, I've only
looked at sse.md and forgot mmx.md, which has two further ones and the
following patch still ICEd.
2023-12-19 Jakub Jelinek <jakub@redhat.com>
PR target/112816
* config/i386/mmx.md (signbitv2sf2, signbit<mode>2): Force operands[1]
into a REG.
* gcc.target/i386/sse2-pr112816-2.c: New test.
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In r14-6603-gfcdd2757c76bf925115b8e1ba4318d6366dd6f09 I messed up the
parentheses in aarch64_stp_reg_operand, the indentation shows the intended
nesting of the conditions. This patch fixes that.
This fixes PR113061 which shows IRA substituting (const_int 1) into a
writeback stp pattern as a result (and LRA failing to reload the
constant).
gcc/ChangeLog:
PR target/113061
* config/aarch64/predicates.md (aarch64_stp_reg_operand): Fix
parentheses to match intent.
gcc/testsuite/ChangeLog:
PR target/113061
* gfortran.dg/PR113061.f90: New test.
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Since when VLEN = 128bits and FIXED-VLMAX, vsetvli a5,zero will be optimized
into vsetivli zero, 16 for SEW = 16.
Such situation will cause many bogus FAILs in FIXED-VLMAX of full coverage
testing.
Force them all scalable vectors to supress those bogus FAILs.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_prop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_prop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-100.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-101.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-102.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-103.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-104.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-105.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-106.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-107.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-108.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-109.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-29.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-30.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-31.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-32.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-33.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-34.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-35.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-36.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-37.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-38.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-39.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-40.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-41.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-42.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-43.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-44.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-45.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-46.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-47.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-48.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-49.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-50.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-51.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-52.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-53.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-54.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-55.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-56.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-57.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-58.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-59.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-60.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-61.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-62.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-63.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-64.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-65.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-66.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-67.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-68.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-69.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-70.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-71.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-72.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-73.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-74.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-75.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-76.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-77.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-78.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-79.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-80.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-81.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-82.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-83.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-84.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-85.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-86.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-87.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-88.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-89.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-90.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-91.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-92.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-93.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-94.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-95.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-96.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-97.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-98.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-99.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/dump-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr108270.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109399.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109547.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109615.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109743-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109743-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109743-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109743-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109748.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109773-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109773-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109974.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111037-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111037-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111037-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111234.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111255.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111927.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111947.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112092-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112092-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112713-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112713-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112776.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112813-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112929-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112988-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl_int.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Force scalable vector.
|
|
Fix this FAIL:
FAIL: gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c scan-tree-dump-times vect "Maximum lmul = 2" 1
gcc/testsuite/ChangeLog:
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c: Adapt test.
|
|
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/cpymem-1.c: Fix checks under medany.
* gcc.target/riscv/rvv/base/cpymem-strategy-3.c: Fix checks.
* gcc.target/riscv/rvv/base/cpymem-strategy-4.c: Ditto.
|
|
The issue mentioned in PR112525 would be able to be handled by
updating dse.cc to treat arg_pointer_rtx similarly with frame_pointer_rtx.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=30271#c10 also mentioned
this idea.
And arpg area may be used to pass argument to callee. So, it would
be needed to check if call insns are using that mem.
PR rtl-optimization/112525
PR target/30271
gcc/ChangeLog:
* dse.cc (get_group_info): Add arg_pointer_rtx as frame_related.
(check_mem_read_rtx): Add parameter to indicate if it is checking mem
for call insn.
(scan_insn): Add mem checking on call usage.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr112525.c: New test.
* gcc.target/powerpc/pr30271.c: New test.
|
|
Since https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=2e7abd09621a4401d44f4513adf126bce4b4828b
we only allow VLSmodes with size <= TARGET_MIN_VLEN * TARGET_MAX_LMUL.
So when -march=rv64gcv default LMUL = 1, we don't have VLS modes of 256/512/1024 vectors.
Disable them in vect test which fixes the following FAILs in the regression:
FAIL: gcc.dg/vect/bb-slp-pr65935.c -flto -ffat-lto-objects scan-tree-dump-times slp1 "optimized: basic block" 11
FAIL: gcc.dg/vect/bb-slp-pr65935.c scan-tree-dump-times slp1 "optimized: basic block" 11
FAIL: gcc.dg/vect/bb-slp-subgroups-2.c -flto -ffat-lto-objects scan-tree-dump-times slp2 "optimized: basic block" 1
FAIL: gcc.dg/vect/bb-slp-subgroups-2.c scan-tree-dump-times slp2 "optimized: basic block" 1
gcc/testsuite/ChangeLog:
* lib/target-supports.exp: Remove 256/512/1024 vectors.
|
|
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/cpymem-2.c: Fix checks.
|
|
This change moves the lowering pass after the type determination and
the type checking passes. This lets us simplify some of the code that
determines the type of an expression, which previously had to work
correctly both before and after type determination.
I'm doing this to help with future generic support. For example, with
generics, we can see code like
func ident[T any](v T) T { return v }
func F() int32 {
s := int32(1)
return ident(s)
}
Before this change, we would type check return statements in the
lowering pass (see Return_statement::do_lower). With a generic
example like the above, that means we have to determine the type of s,
and use that to infer the type arguments passed to ident, and use that
to determine the result type of ident. That is too much to do at
lowering time. Of course we can change the way that return statements
work, but similar issues arise with index expressions, the types of
closures for function literals, and probably other cases as well.
Rather than try to deal with all those cases, we move the lowering
pass after type checking. This requires a bunch of changes, notably
for determining constant types. We have to add type checking for
various constructs that formerly disappeared in the lowering pass.
So it's a lot of shuffling. Sorry for the size of the patch.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/536643
|
|
In order to add other vector related extensions in the future, this
patch add one more parameter in the function_group_info, it will be
used to determine whether intrinsic registration processing is required.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
Add new macro for match function.
* config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION):
Add one more parameter for macro expanding.
(handle_pragma_vector): Add match function calls.
* config/riscv/riscv-vector-builtins.h (enum required_ext):
Add enum defination for required extension.
(struct function_group_info): Add one more parameter for checking required-ext.
|
|
|
|
This also happens to fix composition of these closure objects.
PR libstdc++/112802
PR libstdc++/113068
libstdc++-v3/ChangeLog:
* include/std/ranges (__detail::_To::operator()): Add constraints.
(__detail::_To2::operator()): Likewise.
* testsuite/std/ranges/conv/1.cc (test_sfinae): New test.
(test_composition): New test.
|
|
Some GCC tests on m68K port of LRA is failed on `maximum number of
generated reload insns per insn achieved`. The problem is in that for
subreg reload LRA can not narrow reg class more from ALL_REGS to
GENERAL_REGS and then to data regs or address regs. The patch permits
narowing reg class from reload insns if this results in succesful
matching of reg operand.
gcc/ChangeLog:
PR rtl-optimization/112918
* lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p.
(in_class_p): Restrict condition for narrowing class in case of
allow_all_reload_class_changes_p.
(process_alt_operands): Pass true for
allow_all_reload_class_changes_p in calls of in_class_p.
(curr_insn_transform): Ditto for reg operand win.
|
|
Eliminate redundant compare between set{z,nz} and j{z,nz}:
setz %al; test %al,%al; jz <...> -> setz %al; jnz <...> and
setnz %al, test %al,%al; jz <...> -> setnz %al; jz <...>.
We can use the original Zero-flag value instead of setting the
temporary register and testing it for zero.
gcc/ChangeLog:
* config/i386/i386.md (redundant compare peephole2):
New peephole2 pattern.
|
|
Fortran 2018 allows a non-default integer kind for its VALUES argument if
it has a decimal exponent range of at least four. Update checks, library
implementation and documentation.
gcc/fortran/ChangeLog:
PR fortran/96580
* check.cc (array_size_check): New helper function.
(gfc_check_date_and_time): Use it for checking minimum size of
VALUES argument. Update kind check to Fortran 2018.
* intrinsic.texi: Fix documentation of DATE_AND_TIME.
libgfortran/ChangeLog:
PR fortran/96580
* intrinsics/date_and_time.c (date_and_time): Handle VALUES argument
for kind=2 and kind=16 (if available).
gcc/testsuite/ChangeLog:
PR fortran/96580
* gfortran.dg/date_and_time_2.f90: New test.
* gfortran.dg/date_and_time_3.f90: New test.
* gfortran.dg/date_and_time_4.f90: New test.
|
|
With the recently introduced -munaligned-symbols option byte-sized
variables which are resolved externally are considered to be
potentially misaligned.
However, this should rather also be applied to symbols which resolve
locally if they are weak. Done with this patch.
gcc/ChangeLog:
* config/s390/s390.cc (s390_encode_section_info): Replace
SYMBOL_REF_LOCAL_P with decl_binds_to_current_def_p.
gcc/testsuite/ChangeLog:
* gcc.target/s390/unaligned-2.c: New test.
|
|
The problem here is that in C++ structs and classes have a
linkage too so the type vertex is not considered local to
the TU but will conflict with the globally defined one
in graphds.h. The simple way to fix this is to wrap the ones
defined locally in gimple-ssa-sccopy.cc inside an anonymous namespace
and they are now considered locally to that TU.
Committed as obvious after a bootstrap/test on x86_64.
gcc/ChangeLog:
PR tree-optimization/113054
* gimple-ssa-sccopy.cc: Wrap the local types
with an anonymous namespace.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
|
The following improves the manual work needed to make a -gimple dump
valid input to the GIMPLE FE. First of all it recognizes the 'sizetype'
tree and dumps it as __SIZETYPE__, then it changes dumping vector types
without name from 'vector(n) T' to 'T [[gnu::vector_size(n')]]' which
we can parse in most relevant contexts (and that's shorter than
using __attribute__). Third it avoids a NULL_TREE TMR_STEP when
it would be one, an optimization that's re-done when generating RTL.
PR middle-end/111975
* tree-pretty-print.cc (dump_generic_node): Dump
sizetype as __SIZETYPE__ with TDF_GIMPLE.
Dump unnamed vector types as T [[gnu::vector_size(n)]] with
TDF_GIMPLE.
* tree-ssa-address.cc (create_mem_ref_raw): Never generate
a NULL STEP when INDEX is specified.
|
|
As title.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112432-42.c: Moved to...
* gcc.target/riscv/rvv/base/pr112431-42.c: ...here.
Signed-off-by: Pan Li <pan2.li@intel.com>
|
|
gcc:
PR target/69374
* doc/install.texi (Specific) <hppa*-hp-hpux10>: Remove section.
(Specific) <hppa*-hp-hpux11>: Remove references to GCC 2.95 and
3.0. Also libffi has been ported now.
|
|
For 'wv' instructions, e.g. vwadd.wv vd,vs2,vs1.
vs2 has same EEW as vd.
vs1 has smaller than vd.
So, vs2 can overlap with vd, but vs1 can only overlap highest-number of vd
when LMUL of vs1 is greater than 1.
We already have supported overlap for vs1 LMUL >= 1.
But I forget vs1 LMUL < 1, vs2 can overlap vd even though vs1 totally can not overlap vd.
Consider the reduction auto-vectorization:
int64_t
reduc_plus_int (int *__restrict a, int n)
{
int64_t r = 0;
for (int i = 0; i < n; ++i)
r += a[i];
return r;
}
When we use --param=riscv-autovec-lmul=m2, the codegen is good to us because we already supported
overlap for source EEW32 LMUL1 -> dest EEW64 LMUL2.
--param=riscv-autovec-lmul=m2:
reduc_plus_int:
ble a1,zero,.L4
vsetvli a5,zero,e64,m2,ta,ma
vmv.v.i v2,0
.L3:
vsetvli a5,a1,e32,m1,tu,ma
slli a4,a5,2
sub a1,a1,a5
vle32.v v1,0(a0)
add a0,a0,a4
vwadd.wv v2,v2,v1
bne a1,zero,.L3
li a5,0
vsetivli zero,1,e64,m1,ta,ma
vmv.s.x v1,a5
vsetvli a5,zero,e64,m2,ta,ma
vredsum.vs v2,v2,v1
vmv.x.s a0,v2
ret
.L4:
li a0,0
ret
However, default LMUL (--param=riscv-autovec-lmul=m1) generates redundant vmv1r since
it is EEW32 LMUL=MF2 -> EEW64 LMUL = 1
Before this patch:
reduc_plus_int:
ble a1,zero,.L4
vsetvli a5,zero,e64,m1,ta,ma
vmv.v.i v1,0
.L3:
vsetvli a5,a1,e32,mf2,tu,ma
slli a4,a5,2
sub a1,a1,a5
vle32.v v2,0(a0)
vmv1r.v v3,v1 ----> This should be removed.
add a0,a0,a4
vwadd.wv v1,v3,v2 ----> vs2 should be v1
bne a1,zero,.L3
li a5,0
vsetivli zero,1,e64,m1,ta,ma
vmv.s.x v2,a5
vsetvli a5,zero,e64,m1,ta,ma
vredsum.vs v1,v1,v2
vmv.x.s a0,v1
ret
.L4:
li a0,0
ret
After this patch:
reduc_plus_int:
ble a1,zero,.L4
vsetvli a5,zero,e64,m1,ta,ma
vmv.v.i v1,0
.L3:
vsetvli a5,a1,e32,mf2,tu,ma
slli a4,a5,2
sub a1,a1,a5
vle32.v v2,0(a0)
add a0,a0,a4
vwadd.wv v1,v1,v2
bne a1,zero,.L3
li a5,0
vsetivli zero,1,e64,m1,ta,ma
vmv.s.x v2,a5
vsetvli a5,zero,e64,m1,ta,ma
vredsum.vs v1,v1,v2
vmv.x.s a0,v1
ret
.L4:
li a0,0
ret
PR target/112432
gcc/ChangeLog:
* config/riscv/riscv.md (none,W21,W42,W84,W43,W86,W87): Add W0.
(none,W21,W42,W84,W43,W86,W87,W0): Ditto.
* config/riscv/vector.md: Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112432-42.c: New test.
|
|
The following adds dumping of TARGET_MEM_REF in -gimple form and
adds parsing of it to the GIMPLE FE.
PR c/111975
gcc/c/
* gimple-parser.cc (c_parser_gimple_postfix_expression):
Parse TARGET_MEM_REF extended operands for __MEM.
gcc/
* tree-pretty-print.cc (dump_mem_ref): Use TDF_GIMPLE path
also for TARGET_MEM_REF and amend it.
gcc/testsuite/
* gcc.dg/gimplefe-52.c: New testcase.
|
|
gcc/testsuite/ChangeLog:
* lib/target-supports.exp: Add RV32.
|
|
As written earlier, this test was written with the x86 specifics in mind
and adding dg-final directives for it for other arches makes it unreadable.
If a declare variant call can be resolved in gimple already as in the
aarch64 or gcn cases, it can be done in gcc.dg/gomp/ and I believe we have
tests like that already, the point of the test is that it is not known
during gimplification time which exact call should be chosen as it depends
on which declare simd clone it will be in.
2023-12-18 Jakub Jelinek <jakub@redhat.com>
* testsuite/libgomp.c/declare-variant-1.c: Restrict the test to x86,
drop because of that unneeded target selector from other directives
and remove the aarch64 specific ones.
|
|
This patch fixes 12 ICEs of "full coverage" testing:
Running target riscv-sim/-march=rv64gc_zve32f/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=dynamic/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.dg/torture/pr96513.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (internal compiler error: Segmentation fault)
FAIL: gcc.dg/torture/pr96513.c -O3 -g (internal compiler error: Segmentation fault)
Running target riscv-sim/-march=rv64gc_zve32f/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.dg/torture/pr111048.c -O2 (internal compiler error: Segmentation fault)
FAIL: gcc.dg/torture/pr111048.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (internal compiler error: Segmentation fault)
FAIL: gcc.dg/torture/pr111048.c -O3 -g (internal compiler error: Segmentation fault)
FAIL: gcc.dg/torture/pr96513.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (internal compiler error: Segmentation fault)
FAIL: gcc.dg/torture/pr96513.c -O3 -g (internal compiler error: Segmentation fault)
Running target riscv-sim/-march=rv64gc_zve32f/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.dg/torture/pr96513.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (internal compiler error: Segmentation fault)
FAIL: gcc.dg/torture/pr96513.c -O3 -g (internal compiler error: Segmentation fault)
Running target riscv-sim/-march=rv64gc_zve32f/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.c-torture/execute/20000801-1.c -O2 (internal compiler error: Segmentation fault)
FAIL: gcc.c-torture/execute/20000801-1.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (internal compiler error: Segmentation fault)
FAIL: gcc.c-torture/execute/20000801-1.c -O3 -g (internal compiler error: Segmentation fault)
The root cause of those ICEs is vector register size = 32bits, wheras scalar register size = 64bit.
That is, vector regsize < scalar regsize on -march=rv64gc_zve32f FIXED-VLMAX.
So the original natural regsize using scalar register size is incorrect. Instead, we should return minimum regsize between vector regsize and scalar regsize.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_regmode_natural_size): Fix ICE for
FIXED-VLMAX of -march=rv32gc_zve32f.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/bug-4.c: New test.
* gcc.target/riscv/rvv/autovec/bug-5.c: New test.
* gcc.target/riscv/rvv/autovec/bug-6.c: New test.
|
|
The following testcase ICEs because we aren't careful enough with
alloc_size attribute. We do check that such an argument exists
(although wouldn't handle correctly functions with more than INT_MAX
arguments), but didn't check that it is scalar integer, the ICE is
trying to fold_convert a structure to sizetype.
Given that the attribute can also appear on non-prototyped functions
where the arguments aren't known, I don't see how the FE could diagnose
that and because we already handle the case where argument doesn't exist,
I think we should also verify the argument is scalar integer convertible
to sizetype. Furthermore, given this is not just in diagnostics but
used for code generation, I think it is better to punt on arguments with
larger precision then sizetype, the upper bits are then truncated.
The patch also fixes some formatting issues and avoids duplication of the
fold_convert, plus removes unnecessary check for if (arg1 >= 0), that is
always the case after if (arg1 < 0) return ...;
2023-12-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/113013
* tree-object-size.cc (alloc_object_size): Return size_unknown if
corresponding argument(s) don't have integral type or have integral
type with higher precision than sizetype. Don't check arg1 >= 0
uselessly. Compare argument indexes against gimple_call_num_args
in unsigned type rather than int. Formatting fixes.
* gcc.dg/pr113013.c: New test.
|
|
Line 11 of abi-tag25.C is wrapped in #if __cpp_variable_templates
which isn't defined for -std=c++11, so we can't expect a warning
in that case either.
2023-12-18 Jakub Jelinek <jakub@redhat.com>
* g++.dg/abi/abi-tag25a.C: Expect second dg-warning only for c++14
and later.
|
|
This patch would like to fix one bug of const vector for interleave.
Assume we need to generate interleave const vector like below.
V = {{4, -4, 3, -3, 2, -2, 1, -1,}
Before this patch:
vsetvl a3, zero, e64, m8, ta, ma
vid.v v8 v8 = {0, 1, 2, 3, 4}
li a6, -1
vmul.vx v8, v8, a6 v8 = {-0, -1, -2, -3, -4}
vadd.vi v24, v8, 4 v24 = { 4, 3, 2, 1, 0}
vadd.vi v8, v8, -4 v8 = {-4, -5, -6, -7, -8}
li a6, 32
vsll.vx v8, v8, a6 v8 = {0, -4, 0, -5, 0, -6, 0, -7,} for e32
vor v24, v24, v8 v24 = {4, -4, 3, -5, 2, -6, 1, -7,} for e32
After this patch:
vsetvli a6,zero,e64,m8,ta,ma
vid.v v8 v8 = {0, 1, 2, 3, 4}
li a7,-1
vmul.vx v16,v8,a7 v16 = {-0, -1, -2, -3, -4}
vaddvi v16,v16,4 v16 = { 4, 3, 2, 1, 0}
vaddvi v8,v8,-4 v8 = {-4, -3, -2, -1, 0}
li a7,32
vsll.vx v8,v8,a7 v8 = {0, -4, 0, -3, 0, -2,} for e32
vor.vv v16,v16,v8 v8 = {4, -4, 3, -3, 2, -2,} for e32
It is not easy to add asm check stable enough for this case, as we need
to check the vadd -4 target comes from the vid output, which crosses 4
instructions up to point. Thus there is no test here and will be covered
by gcc.dg/vect/pr92420.c in the underlying patches.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vector): Take step2
instead of step1 for second series.
Signed-off-by: Pan Li <pan2.li@intel.com>
|
|
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/cpymem-1.c: Fix checks.
|
|
libphobos/ChangeLog:
* m4/druntime/cpu.m4: Support loongarch* targets.
* libdruntime/Makefile.am: Same.
* libdruntime/Makefile.in: Regenerate.
* configure: Regenerate.
|
|
libphobos/ChangeLog:
* libdruntime/config/loongarch/switchcontext.S: New file.
|
|
gcc/ChangeLog:
* config.gcc: Add loongarch-d.o to d_target_objs for LoongArch
architecture.
* config/loongarch/t-loongarch: Add object target for loongarch-d.cc.
* config/loongarch/loongarch-d.cc
(loongarch_d_target_versions): add interface function to define builtin
D versions for LoongArch architecture.
(loongarch_d_handle_target_float_abi): add interface function to define
builtin D traits for LoongArch architecture.
(loongarch_d_register_target_info): add interface function to register
loongarch_d_handle_target_float_abi function.
* config/loongarch/loongarch-d.h
(loongarch_d_target_versions): add function prototype.
(loongarch_d_register_target_info): Likewise.
libphobos/ChangeLog:
* configure.tgt: Enable libphobos for LoongArch architecture.
* libdruntime/gcc/sections/elf.d: Add TLS_DTV_OFFSET constant for
LoongArch64.
* libdruntime/gcc/unwind/generic.d: Add __aligned__ constant for
LoongArch64.
|
|
This patch fixes the following FAIL when LMUL = 8:
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medany/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=scalable
FAIL: gcc.dg/vect/slp-multitypes-2.c execution test
The rootcause is we missed viota avl_type, so we end up with incorrect vsetvl configuration:
vsetvli zero,a2,e64,m8,ta,ma
viota.m v16,v0
'a2' value is a garbage value.
After this patch:
vsetvli a4,zero,e64,m8,ta,ma
viota.m v16,v0
gcc/ChangeLog:
* config/riscv/vector.md: Add viota avl_type attribute.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/bug-2.c: New test.
|
|
This patch fixes the following FAIL:
Running target
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
FAIL: gcc.dg/vect/fast-math-vect-complex-3.c execution test
The root cause is we generate incorrect codegen for (const_poly_int:DI
[549755813888, 549755813888])
Before this patch:
li a7,0
vmv.v.x v0,a7
After this patch:
csrr a2,vlenb
slli a2,a2,33
vmv.v.x v0,a2
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_expand_mult_with_const_int):
Change int into HOST_WIDE_INT.
(riscv_legitimize_poly_move): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/bug-3.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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gcc/fortran/ChangeLog:
PR fortran/97592
* trans-expr.cc (gfc_conv_procedure_call): For a contiguous dummy
with the TARGET attribute, the effective argument may still be
contiguous even if the actual argument is not simply-contiguous.
Allow packing to be decided at runtime by _gfortran_internal_pack.
gcc/testsuite/ChangeLog:
PR fortran/97592
* gfortran.dg/contiguous_15.f90: New test.
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Following the instruction cost fix, we are generating
alsl.w $a0, $a0, $a0, 4
instead of
li.w $t0, 17
mul.w $a0, $t0
for "x * 4", because alsl.w is 4 times faster than mul.w. But we didn't
have a sign-extending pattern for alsl.w, causing an extra slli.w
instruction generated to sign-extend $a0. Add the pattern to remove the
redundant extension.
gcc/ChangeLog:
* config/loongarch/loongarch.md (alslsi3_extend): New
define_insn.
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Replace the instruction costs in loongarch_rtx_cost_data constructor
based on micro-benchmark results on LA464 and LA664.
This allows optimizations like "x * 17" to alsl, and "x * 68" to alsl
and slli.
gcc/ChangeLog:
PR target/112936
* config/loongarch/loongarch-def.cc
(loongarch_rtx_cost_data::loongarch_rtx_cost_data): Update
instruction costs per micro-benchmark results.
(loongarch_rtx_cost_optimize_size): Set all instruction costs
to (COSTS_N_INSNS (1) + 1).
* config/loongarch/loongarch.cc (loongarch_rtx_costs): Remove
special case for multiplication when optimizing for size.
Adjust division cost when TARGET_64BIT && !TARGET_DIV32.
Account the extra cost when TARGET_CHECK_ZERO_DIV and
optimizing for speed.
gcc/testsuite/ChangeLog
PR target/112936
* gcc.target/loongarch/mul-const-reduction.c: New test.
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With loongarch-def.cc switched from C to C++, we can include rtl.h for
COSTS_N_INSNS, instead of hard coding our own.
THis is a non-functional change for now, but it will make the code more
future-proof in case COSTS_N_INSNS in rtl.h would be changed.
gcc/ChangeLog:
* config/loongarch/loongarch-def.cc (rtl.h): Include.
(COSTS_N_INSNS): Remove the macro definition.
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gcc:
PR target/69374
* doc/install.texi (Specific) <hppa*-hp-hpux*>: Remove a note on
GCC 4.3.
Remove details on how the HP assembler, which we document as not
working, breaks.
<hppa*-hp-hpux11>: Note that only the HP linker is supported.
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gcc:
PR other/69374
* doc/install.texi (Installing GCC): Remove reference to
buildstat.html.
(Testing): Ditto.
(Final install): Remove section on submitting information for
buildstat.html. Adjust the request for feedback.
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On AIX fileno is a function-like macro, so enclose the name in
parentheses to ensure we use the real function.
libstdc++-v3/ChangeLog:
* src/c++23/print.cc (__open_terminal(FILE*)): Avoid fileno
macro.
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