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2024-11-26ada: Add minimal support for address clause/aspect on controlled objectsEric Botcazou3-30/+72
The clause and aspect have been accepted by the compiler for a few years, but the result is generally an internal compiler error or an incorrect finalization at run time. gcc/ada/ChangeLog: * exp_ch3.adb (Expand_N_Object_Declaration): Do not insert the tag assignment there if the object has the Address aspect. * exp_ch7.adb: Add clauses for Aspect package. (Build_Finalizer.Process_Object_Declaration): Deal with an object with delayed freezing. (Insert_Actions_In_Scope_Around): If the target is the declaration of an object with address clause or aspect, move all the statements that have been inserted after it into the Initialization_Statements list of the object. * freeze.adb (Check_Address_Clause): Do not reassign the tag here, instead set the appropriate flag on the assignment statement.
2024-11-26ada: Clean up previous changeEric Botcazou1-10/+6
gcc/ada/ChangeLog: * sem_res.adb (Valid_Conversion): Do not initialize Opnd_Type before calling Get_Corresponding_Mutably_Tagged_Type_If_Present.
2024-11-26ada: Minor adjustments to error message for RM B.1(24)Eric Botcazou2-9/+16
The RM B.1(24) sub-clause says that imported entities cannot be initialized and it is checked in three contexts, aspect Import, pragma Import and pragma Import_Object, with slightly different error messages. Moreover, for the aspect, the error is given twice because that of the pragma is also given. In addition, if the initialization expression is an aggregate that is not static, the error is given only for the aspect and not for the two pragmas. This change aligns the error messages on that of pragma Import and plugs the aforementioned loophole for the two pragmas. gcc/ada/ChangeLog: * sem_ch13.adb (Analyze_Aspect_Export_Import): Add explicit mention of the declaration in the error message for the Import. * sem_prag.adb (Process_Extended_Import_Export_Object_Pragma): Also test Has_Init_Expression on the declaration node for Import_Object and use the same wording as that of Import. (Process_Import_Or_Interface): Also test Has_Init_Expression on the declaration node for Import.
2024-11-26ada: Refactor code of Check_Ambiguous_Call and Valid_ConversionJavier Miranda3-321/+336
Code cleanup; factorizing code. gcc/ada/ChangeLog: * sem_ch2.adb (Check_Ambiguous_Call): Replace code factorized code by call to the new subprogram Is_Ambiguous_Operand. * sem_res.ads (Is_Ambiguous_Operand): New subprogram that factorizes previous code in Check_Ambiguous_Call and Valid_Conversion. * sem_res.adb (Is_Ambiguous_Operand): New subprogram. (Valid_Tagged_Conversion): Replace factorized code by call to the new subprogram Is_Ambiguous_Operand. (Report_Error_N): New subprogram. (Report_Error_NE): New subprogram. (Report_Interpretation): New subprogram. (Conversion_Error_N): Removed; replaced by Report_Error_N. (Conversion_Error_NE): Removed; replaced by Report_Error_NE. (Valid_Conversion): Update Opnd_Type after the call to Is_Ambiguous_Operand in the overloaded case.
2024-11-26ada: Relocate implementation of Write_Error_SummaryViljar Indus4-213/+142
Reuse the same implementation in Errout and Errutil. gcc/ada/ChangeLog: * errout.adb: Remove implmentation of Write_Error_Summary. * erroutc.adb: Add implemenetation of Write_Error_Summary. * erroutc.ads: Add spec of Write_Error_Summary. * errutil.adb: Remove implementation for writing the error summary.
2024-11-26ada: Relocate implementation of Set_Msg_Insertion_ColumnViljar Indus4-32/+17
The implementation was duplicated in errout and errutil. Move the implementation to erroutc where other similar commonly used functions are. gcc/ada/ChangeLog: * errout.adb: Remove implemntation of Set_Msg_Insertion_Column. * erroutc.adb: Add implementation of Set_Msg_Insertion_Column. * erroutc.ads: Add spec of Set_Msg_Insertion_Column. * errutil.adb: Remove implementation of Set_Msg_Insertion_Column.
2024-11-26ada: Remove Warn_Runtime_Raise attribute from Error_Msg_ObjectViljar Indus4-33/+4
The goal of this attribute is to raise a warning to an error when the -gnatwE flag is used. This is similar to the existing warnings as error behavior under the Warn_Err flag so it can be merged. gcc/ada/ChangeLog: * errout.adb: Set Warn_Err as true if Is_Runtime_Error was set in the error message. * erroutc.adb: Remove instances of Warn_Runtime_Raise. * erroutc.ads: Likewise. * errutil.adb: Likewise.
2024-11-26ada: Refactor checking redundant messagesViljar Indus4-56/+51
Move common code between errout and errutil into a single function. gcc/ada/ChangeLog: * errout.adb: Use Is_Redundant_Error_Message. * erroutc.adb: Move the common code for checking if a message can be removed to Is_Redundant_Error_Message. * erroutc.ads: Add definition of Is_Redundant_Error_Message. * errutil.adb: Use Is_Redundant_Error_Message.
2024-11-26ada: Remove Current_Node from ErroutViljar Indus5-17/+3
This variable was used for Opt.Include_Subprogram_In_Messages activated by -gnatdJ. This switch has been removed so this variable is no longer used. gcc/ada/ChangeLog: * errout.ads: Remove Current_Node. * errout.adb: Remove uses of Current_Node. * par-ch6.adb: Same as above. * par-ch7.adb: Same as above. * par-ch9.adb: Same as above.
2024-11-26ada: Remove Raise_Exception_On_ErrorViljar Indus4-30/+0
Raise_Exception_On_Error is never modified so it can be removed. gcc/ada/ChangeLog: * err_vars.ads: Remove Raise_Exception_On_Error and Error_Msg_Exception. * errout.ads: Same as above. * errout.adb: Remove uses of Raise_Exception_On_Error and Error_Msg_Exception. * errutil.adb: Same as above.
2024-11-26ada: Store error message kind as an enumViljar Indus9-330/+279
Simplify the storage for the kind of error message under a single enumerator. This replaces the existing attributes with the following enumeration values. * Is_Warning_Msg => Warning * Is_Style_Msg => Style * Is_Info_Msg => Info * Is_Check_Msg => Low_Check, Medium_Check, High_Check * Is_Serious_Error => Error, if the attribute was false then Non_Serious_Error. gcc/ada/ChangeLog: * diagnostics-converter.adb: Use new enum values instead of the old attributes. * diagnostics-switch_repository.adb: Same as above. * diagnostics-utils.adb: Same as above. * diagnostics.adb: Same as above. * diagnostics.ads: Same as above. * errout.adb: Same as above. * erroutc.adb: Same as above. * erroutc.ads: Remove old attriubtes and replace them with Error_Msg_Kind. * errutil.adb: Same as others.
2024-11-26ada: Refactor code for printing the error locationViljar Indus4-40/+38
gcc/ada/ChangeLog: * errout.adb: Use Output_Msg_Location * erroutc.adb: add common implementation for printing the error message line. * erroutc.ads: Add new method Output_Msg_Location * errutil.adb: use Output_Msg_Location
2024-11-26ada: Simplify codeViljar Indus5-75/+27
gcc/ada/ChangeLog: * diagnostics-converter.adb: Remove uses of Info_Warning type. Use common constructors to simplify implementation. * diagnostics-pretty_emitter.adb: Remove Info_Warning type. * diagnostics-utils.adb: Remove uses of Info_Warning. * diagnostics.adb: Simplify implementation of Primary_Location. * diagnostics.ads: Remove Info_Warning type.
2024-11-26ada: Fix the file documenting the ali formatJose Ruiz2-6/+6
gcc/ada/ChangeLog: * doc/gnat_ugn/the_gnat_compilation_model.rst: The format of the ali file is documented in lib-writ.ads. * gnat_ugn.texi: Regenerate.
2024-11-26ada: Change specifications of Uname subprogramsRonan Desplanques3-25/+52
The old specifications were ambiguous as to whether they expected actuals to have %s/%b suffixes. The new specifications also increases modularity across the board. gcc/ada/ChangeLog: * uname.ads (Is_Internal_Unit_Name, Is_Predefined_Unit_Name): Change specifications to take a Unit_Name_Type as input. (Encoded_Library_Unit_Name): New subprogram. (Is_Predefined_Unit_Name): New overloaded subprogram. (Get_External_Unit_Name_String): Make use of new Encoded_Library_Unit_Name subprogram. * uname.adb (Is_Internal_Unit_Name, Is_Predefined_Unit_Name): Adapt bodies to specification changes. * fname-uf.adb (Get_File_Name): Adapt to Uname interface changes.
2024-11-26ada: Remove use of global name bufferRonan Desplanques1-28/+30
Before this patch, the body of Fname.UF.Get_File_Name did a lot of juggling with the global name buffer, which made it hard to understand. This patch makes the body use local buffers instead. gcc/ada/ChangeLog: * fname-uf.adb (Get_File_Name): Use local name buffers.
2024-11-26ada: Clean up utility functionRonan Desplanques1-8/+2
This patch makes Sem_Util.Get_Library_Unit_Name use Uname more idiomatically. gcc/ada/ChangeLog: * sem_util.adb (Get_Library_Unit_Name): Improve use of Uname.
2024-11-26ada: Fix latent issue exposed by recent change in aggregate expansionEric Botcazou1-5/+11
The tag is not assigned when a compile-time known aggregate initializes an object declared with an address clause/aspect. gcc/ada/ChangeLog: * freeze.adb: Remove clauses for Exp_Ch3. (Check_Address_Clause): Always reassign the tag for an object of a tagged type if there is an initialization expression.
2024-11-26Fortran: Partial reversion of r15-5083 [PR117763]Paul Thomas2-6/+289
2024-11-26 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/117763 * trans-array.cc (gfc_get_array_span): Guard against derefences of 'expr'. Clean up some typos. Use 'gfc_get_vptr_from_expr' for clarity and apply a functional reversion of last section that deals with class dummies. gcc/testsuite/ PR fortran/117763 * gfortran.dg/pr117763.f90: New test.
2024-11-26RISC-V: avlprop: Do not propagate VL from slidedown.Robin Dapp1-1/+2
In the following situation (found in the rvv/autovec/vls-vlmax/shuffle-slide.c test which is not yet pushed) vsetivli zero,4,e8,mf4,ta,ma vle8.v v2,0(a1) # (1) vle8.v v1,0(a2) # (2) vsetivli zero,2,e8,mf4,tu,ma vslidedown.vi v1,v2,2 vsetivli zero,4,e8,mf4,ta,ma vse8.v v1,0(a2) we wrongly "propagate" VL=2 from vslidedown into the load. Although we check whether the "target" instruction has a merge operand the check only handles cases where the merge operand itself is loaded, like (2) in the snippet above. For (1) we load the non-merged operand, assume propagation is valid and continue despite (2). This patch just re-uses avl_can_be_propagated_p in order to disable slides altogether in such situations. gcc/ChangeLog: * config/riscv/riscv-avlprop.cc (pass_avlprop::get_vlmax_ta_preferred_avl): Check whether the use insn is valid for propagation.
2024-11-26builtins: Fix up DFP ICEs on __builtin_fpclassify [PR102674]Jakub Jelinek2-9/+79
This patch is similar to the one I've just posted, __builtin_fpclassify also needs to print decimal float minimum differently and use real_from_string3. Plus I've done some formatting fixes. 2024-11-26 Jakub Jelinek <jakub@redhat.com> PR middle-end/102674 * builtins.cc (fold_builtin_fpclassify): Use real_from_string3 rather than real_from_string. Use "1E%d" format string rather than "0x1p%d" for decimal float minimum. Formatting fixes. * gcc.dg/dfp/pr102674.c: New test.
2024-11-26builtins: Fix up DFP ICEs on __builtin_is{inf,finite,normal} [PR43374]Jakub Jelinek4-16/+82
__builtin_is{inf,finite,normal} builtins ICE on _Decimal{32,64,128,64x} operands unless those operands are constant. The problem is that we fold the builtins to comparisons with the largest finite number, but a) get_max_float was only handling binary floats b) real_from_string again assumes binary float and so we were ICEing in the build_real called after the two calls. This patch adds decimal handling into get_max_float (well, moves it from c-cppbuiltin.cc which was printing those for __DEC{32,64,128}_MAX__ macros) and uses real_from_string3 (perhaps it is time to rename it to just real_from_string now that we can use function overloading) so that it handles both binary and decimal floats. 2024-11-26 Jakub Jelinek <jakub@redhat.com> PR middle-end/43374 gcc/ * real.cc (get_max_float): Handle decimal float. * builtins.cc (fold_builtin_interclass_mathfn): Use real_from_string3 rather than real_from_string. Use "1E%d" format string rather than "0x1p%d" for decimal float minimum. gcc/c-family/ * c-cppbuiltin.cc (builtin_define_decimal_float_constants): Use get_max_float. gcc/testsuite/ * gcc.dg/dfp/pr43374.c: New test.
2024-11-26affine: Remove unused variable rem from wide_int_constant_multiple_pAndrew Pinski1-1/+1
This might fix the current bootstrap failure on aarch64, I only tested it on x86_64. But the rem variable is unused and the for poly_widest_int, there could be loop if NUM_POLY_INT_COEFFS is 2 or more. In the case of aarch64, NUM_POLY_INT_COEFFS is 2. Note the reason why there is warning for the unused variable is due to the deconstructor. Pushed as obvious after a build for x86_64-linux-gnu. gcc/ChangeLog: * tree-affine.cc (wide_int_constant_multiple_p): Remove unused rem variable. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-11-26libstdc++: Add conditional noexcept to range access functionsJonathan Wakely8-19/+134
As an extension, this adds conditional noexcept to std::begin, std::end, and std::ssize. libstdc++-v3/ChangeLog: * include/bits/range_access.h (begin, end, ssize): Add conditional noexcept. * testsuite/18_support/initializer_list/range_access.cc: Check results and noexcept-specifier for std::begin and std::end. * testsuite/24_iterators/headers/iterator/range_access_c++11.cc: Check for conditional noexcept on std::begin and std::end. * testsuite/24_iterators/headers/iterator/range_access_c++14.cc: Likewise. * testsuite/24_iterators/headers/iterator/range_access_c++17.cc: Likewise. * testsuite/24_iterators/range_access/range_access.cc: Check conditional noexcept is correct. * testsuite/24_iterators/range_access/range_access_cpp17.cc: Check std::size, std::empty and std::data. * testsuite/24_iterators/range_access/range_access_cpp20.cc: Check conditional noexcept on std::ssize.
2024-11-26libstdc++: Improve Doxygen comments in <forward_list>Jonathan Wakely1-61/+62
Use Markdown backticks to format comments, instead of Doxygen @c and @a commands. libstdc++-v3/ChangeLog: * include/bits/forward_list.h: Use Markdown in Doxygen comments.
2024-11-26libstdc++: Move std::error_category symbol to separate file [PR117630]Jonathan Wakely4-15/+56
As described in PR 117630 the cow-stdexcept.cc file pulls in symbols from system_error.cc, which are not actually needed there. Moving the definition of error_category::_M_message to a separate file should solve it. libstdc++-v3/ChangeLog: PR libstdc++/117630 * src/c++11/Makefile.am: Add new file. * src/c++11/Makefile.in: Regnerate. * src/c++11/cow-stdexcept.cc (error_category::_M_message): Move member function definition to ... * src/c++11/cow-system_error.cc: New file.
2024-11-26Optimize 128-bit vector permutation with pand, pandn and por.Cui, Lili2-0/+125
This patch introduces a new subroutine in ix86_expand_vec_perm_const_1. On x86, use mixed constant permutation for V8HImode and V16QImode when SSE2 is supported. This patch handles certain vector shuffle operations more efficiently using pand, pandn, and por. This change is intended to improve assembly code generation for configurations that support SSE2. gcc/ChangeLog: PR target/116675 * config/i386/i386-expand.cc (expand_vec_perm_pand_pandn_por): New subroutine. (ix86_expand_vec_perm_const_1): Call expand_vec_perm_pand_pandn_por. gcc/testsuite/ChangeLog: PR target/116675 * gcc.target/i386/pr116675.c: New test.
2024-11-26i386/testsuite: Correct AVX10.2 FP8 test mask usageHaochen Jiang4-38/+58
Under FP8, we should not use AVX512F_LEN_HALF to get the mask size since it will get 16 instead of 8 and drop into wrong if condition. Correct the usage for vcvtneph2[b,h]f8[,s] runtime test. gcc/testsuite/ChangeLog: * gcc.target/i386/avx10_2-512-vcvtneph2bf8-2.c: Correct 128bit mask usage. * gcc.target/i386/avx10_2-512-vcvtneph2bf8s-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtneph2hf8-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtneph2hf8s-2.c: Ditto.
2024-11-26c: Fix ICEs from invalid atomic compound assignment [PR98195, PR117755]Joseph Myers6-13/+44
As reported in bug 98195, there are ICEs from an _Atomic compound assignment with an incomplete type on the RHS, arising from an invalid temporary being created with such a type. As reported in bug 117755, there are also (different) ICEs in cases with complete types where the binary operation itself is invalid, when inside a nested function, arising from a temporary being created for the RHS, but then not used because the binary operation returns error_mark_node, resulting in the temporary not appearing in a TARGET_EXPR, never getting its DECL_CONTEXT set by the gimplifier and eventually resulting in an ICE in nested function processing (trying to find a function context for the temporary) as a result. Fix the first ICE with an earlier check for a complete type for the RHS of an assignment so the problematic temporary is never created for an incomplete type (which changes the error message three existing tests get for that case; the new message seems as good as the old one). Fix the second ICE by ensuring that once a temporary has been created, it always gets a corresponding TARGET_EXPR even on error. Bootstrapped with no regressions for x86_64-pc-linux-gnu. PR c/98195 PR c/117755 gcc/c/ * c-typeck.cc (build_atomic_assign): Always create a TARGET_EXPR for newval even in case of error from binary operation. (build_modify_expr): Check early for incomplete type of rhs. gcc/testsuite/ * gcc.dg/pr98195-1.c, gcc.dg/pr117755-1.c: New tests. * gcc.dg/noncompile/20020207-1.c, gcc.dg/pr14765-1.c, objc.dg/method-11.m: Update expected error messages.
2024-11-26Daily bump.GCC Administrator10-1/+338
2024-11-25PR modula2/117777: m2 does not allow single const string in asm volatileGaius Mulley6-5/+10
gm2 does not allow single const string in ASM VOLATILE. The bugfix is to modify AsmOperands in all passes except P3Build.bnf (which is correct). The remaining passes need to make the term following the ConstExpression optional. gcc/m2/ChangeLog: PR modula2/117777 * gm2-compiler/P0SyntaxCheck.bnf (AsmOperands): Allow term after ConstExpression to be optional. * gm2-compiler/P1Build.bnf (AsmOperands): Ditto. * gm2-compiler/P2Build.bnf (AsmOperands): Ditto. * gm2-compiler/PCBuild.bnf (AsmOperands): Ditto. * gm2-compiler/PHBuild.bnf (AsmOperands): Ditto. gcc/testsuite/ChangeLog: PR modula2/117777 * gm2/extensions/asm/pass/conststr.mod: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-11-25build: Move sstream include above safe-ctype.h {PR117771]Andrew Pinski1-4/+3
sstream in some versions of libstdc++ include locale which might not have been included yet. safe-ctype.h defines the toupper, tolower, etc. as macros so the c++ header files needed to be included before hand as comment in system.h says: /* Include C++ standard headers before "safe-ctype.h" to avoid GCC poisoning the ctype macros through safe-ctype.h */ I don't understand how it was working before when memory was included after safe-ctype.h rather than before. But this makes sstream consistent with the other C++ headers. Pushed as obvious after a build for riscv64-elf. gcc/ChangeLog: PR target/117771 * system.h: Move the include of sstream above safe-ctype.h. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-11-26sibcall: Check partial != 0 for BLKmode argumentH.J. Lu2-1/+14
The outgoing stack slot size may be different from the BLKmode argument size due to parameter alignment. Check partial != 0 for BLKmode argument passed on stack. gcc/ PR middle-end/117098 * calls.cc (store_one_arg): Check partial != 0 for BLKmode argument passed on stack. gcc/testsuite/ PR middle-end/117098 * gcc.dg/sibcall-12.c: New test. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2024-11-25hppa: Revise TImode aritmetic patterns to support arith11_operandsJohn David Anglin1-56/+62
2024-11-25 John David Anglin <danglin@gcc.gnu.org> gcc/ChangeLog: PR target/117645 * config/pa/pa.md (addti3): Revise pattern to support arith11_operands. Use "R" operand prefix to print least significant register of TImode register pair. (addvti3, subti3, subvti3): Likewise. (negti2, negvti2): Use "R" operand prefix.
2024-11-25[PR117105][LRA]: Use unique value reload pseudo for early clobber operandVladimir N. Makarov2-1/+17
LRA did not generate insn satisfying insn constraints on the PR test. The reason for this is that LRA assigned the same hard reg for two conflicting reload pseudos. The two insn reload pseudos are originated from the same pseudo and LRA tried to optimize as it assigned the same value for the reload pseudos. It is an LRA optimization to minimize reload insns. The two reload pseudos conflict as one of them is an early clobber insn operands. The patch solves this problem by assigning unique value if the operand is early clobber one. gcc/ChangeLog: PR target/117105 * lra-constraints.cc (get_reload_reg): Create unique value reload pseudos for early clobbered operands. gcc/testsuite/ChangeLog: PR target/117105 * gcc.target/i386/pr117105.c: New test.
2024-11-25i386: Generalize x >> 32-y to x >> -y conversion with multiples of 32Uros Bizjak1-4/+4
Optimize also cases where immediate value is a multiple of 32 for 32-bit shifts (or multiple of 64 for 64-bit shifts). gcc/ChangeLog: * config/i386/i386.md (*ashl<mode>3_negcnt): For SImode shifts allow multiples of 32 (or multiples of 64 for DImode shifts) for immediate operand 3. (*ashl<mode>3_negcnt_1): Ditto. (*<insn><mode>3_negcnt): Ditto. (*<insn><mode>3_negcnt_1): Ditto.
2024-11-25Regeernate .opt.urls after nios2 removalAndrew Pinski7-7/+7
The index markers changed slightly when nios2 were removed. This just regenerates the files. gcc/ChangeLog: * config/g.opt.urls: Regenerate. * config/i386/i386.opt.urls: Regenerate. * config/i386/nto.opt.urls: Regenerate. * config/nvptx/nvptx.opt.urls: Regenerate. * config/riscv/riscv.opt.urls: Regenerate. * config/s390/s390.opt.urls: Regenerate. * config/sol2.opt.urls: Regenerate. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-11-25nios2: Remove all support for Nios II target.Sandra Loosemore157-18095/+18
nios2 target support in GCC was deprecated in GCC 14 as the architecture has been EOL'ed by the vendor. This patch removes the entire port for GCC 15 There are still references to "nios2" in libffi and libgo. Since those libraries are imported into the gcc sources from master copies maintained by other projects, those will need to be addressed elsewhere. ChangeLog: * MAINTAINERS: Remove references to nios2. * configure.ac: Likewise. * configure: Regenerated. config/ChangeLog: * mt-nios2-elf: Deleted. contrib/ChangeLog: * config-list.mk: Remove references to Nios II. gcc/ChangeLog: * common/config/nios2/*: Delete entire directory. * config/nios2/*: Delete entire directory. * config.gcc: Remove references to nios2. * configure.ac: Likewise. * doc/extend.texi: Likewise. * doc/install.texi: Likewise. * doc/invoke.texi: Likewise. * doc/md.texi: Likewise. * regenerate-opt-urls.py: Likewise. * config.in: Regenerated. * configure: Regenerated. gcc/testsuite/ChangeLog: * g++.target/nios2/*: Delete entire directory. * gcc.target/nios2/*: Delete entire directory. * g++.dg/cpp0x/constexpr-rom.C: Remove refences to nios2. * g++.old-deja/g++.jason/thunk3.C: Likewise. * gcc.c-torture/execute/20101011-1.c: Likewise. * gcc.c-torture/execute/pr47237.c: Likewise. * gcc.dg/20020312-2.c: Likewise. * gcc.dg/20021029-1.c: Likewise. * gcc.dg/debug/btf/btf-datasec-1.c: Likewise. * gcc.dg/ifcvt-4.c: Likewise. * gcc.dg/stack-usage-1.c: Likewise. * gcc.dg/struct-by-value-1.c: Likewise. * gcc.dg/tree-ssa/reassoc-33.c: Likewise. * gcc.dg/tree-ssa/reassoc-34.c: Likewise. * gcc.dg/tree-ssa/reassoc-35.c: Likewise. * gcc.dg/tree-ssa/reassoc-36.c: Likewise. * lib/target-supports.exp: Likewise. libgcc/ChangeLog: * config/nios2/*: Delete entire directory. * config.host: Remove refences to nios2. * unwind-dw2-fde-dip.c: Likewise.
2024-11-25Fortran: Check IMPURE in BLOCK inside DO CONCURRENT.Steve Kargl2-0/+48
PR fortran/117765 gcc/fortran/ChangeLog: * resolve.cc (check_pure_function): Check the stack to see if the function is in a nested BLOCK and, if that block is inside a DO_CONCURRENT, issue an error. gcc/testsuite/ChangeLog: * gfortran.dg/impure_fcn_do_concurrent.f90: New test.
2024-11-25RISC-V: Ensure vtype for full-register moves [PR117544].Robin Dapp3-7/+99
As discussed in PR117544 the VTYPE register is not preserved across function calls. Even though vmv1r-like instructions operate independently of the actual vtype they still require a valid vtype. As we cannot guarantee that the vtype is valid we must make sure to emit a vsetvl between a function call and a vmv1r.v. This patch makes the necessary changes by splitting the full-reg-move insns into patterns that use the vtype register and adding vmov to the types of instructions requiring a vset. PR target/117544 gcc/ChangeLog: * config/riscv/vector.md (*mov<mode>_whole): Split. (*mov<mode>_fract): Ditto. (*mov<mode>): Ditto. (*mov<mode>_vls): Ditto. (*mov<mode>_reg_whole_vtype): New pattern with vtype use. (*mov<mode>_fract_vtype): Ditto. (*mov<mode>_vtype): Ditto. (*mov<mode>_vls_vtype): Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/abi-call-args-4.c: Expect vsetvl. * gcc.target/riscv/rvv/base/pr117544.c: New test.
2024-11-25genemit: Distribute evenly to files [PR111600].Robin Dapp3-37/+51
currently we distribute insn patterns in genemit, partitioning them by the number of patterns per file. The first 100 into file 1, the next 100 into file 2, and so on. Depending on the patterns this can lead to files of very uneven sizes. Similar to the genmatch split, this patch introduces a dynamic choose_output () which considers the size of the output files and selects the shortest one for the next pattern. gcc/ChangeLog: PR target/111600 * genemit.cc (handle_arg): Use files instead of filenames. (main): Ditto. * gensupport.cc (SIZED_BASED_CHUNKS): Define. (choose_output): New function. * gensupport.h (choose_output): Declare.
2024-11-25target/116760 - 416.gamess slowdown with SLPRichard Biener2-4/+7
For the TWOTFF loop vectorization the backend scales constructor and vector extract cost to make higher VFs less profitable. This heuristic currently fails to consider VMAT_STRIDED_SLP which we now get with single-lane SLP, causing a huge regression in SPEC 2k6 416.gamess for the respective loop nest. The following fixes this, matching behavior to that of GCC 14 by treating single-lane VMAT_STRIDED_SLP the same as VMAT_ELEMENTWISE. PR target/116760 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Scale vec_construct for single-lane VMAT_STRIDED_SLP the same as VMAT_ELEMENTWISE. * tree-vect-stmts.cc (vectorizable_store): Pass SLP node down to costing for vec_to_scalar for VMAT_STRIDED_SLP.
2024-11-25Add extra 64bit SSE vector epilogue in some casesRichard Biener1-0/+7
Similar to the X86_TUNE_AVX512_TWO_EPILOGUES tuning which enables an extra 128bit SSE vector epilouge when doing 512bit AVX512 vectorization in the main loop the following allows a 64bit SSE vector epilogue to be generated when the previous vector epilogue still had a vectorization factor of 16 or larger (which usually means we are operating on char data). This effectively applies to 256bit and 512bit AVX2/AVX512 main loops, a 128bit SSE main loop would already get a 64bit SSE vector epilogue. Together with X86_TUNE_AVX512_TWO_EPILOGUES this means three vector epilogues for 512bit and two vector epilogues when enabling 256bit vectorization. I have not added another tunable for this RFC - suggestions on how to avoid inflation there welcome. This speeds up 525.x264_r to within 5% of the -mprefer-vector-size=128 speed with -mprefer-vector-size=256 or -mprefer-vector-size=512 (the latter only when -mtune-crtl=avx512_two_epilogues is in effect). I have not done any further benchmarking, this merely shows the possibility and looks for guidance on how to expose this to the uarch tunings or to the user (at all?) if not gating on any uarch specific tuning. Note 64bit SSE isn't a native vector size so we rely on emulation being "complete" (if not epilogue vectorization will only fail, so it's "safe" in this regard). With AVX512 ISA available an alternative is a predicated epilog, but due to possible STLF issues user control would be required here. * config/i386/i386.cc (ix86_vector_costs::finish_cost): For an 128bit SSE epilogue request a 64bit SSE epilogue if the 128bit SSE epilogue VF was 16 or higher.
2024-11-25tree-optimization/117767 - VMAT_STRIDED_SLP and alignmentRichard Biener2-6/+55
This plugs another hole in alignment checking with VMAT_STRIDED_SLP. When using an alternate load or store type we have to check whether that's supported with respect to required vector alignment. PR tree-optimization/117767 * tree-vect-stmts.cc (vectorizable_store): Check for supported alignment before using a an alternate store vector type. (vectorizable_load): Likewise for loads. * gcc.dg/vect/pr117767.c: New testcase.
2024-11-25libsanitizer: Remove -pedantic from AM_CXXFLAGS [PR117732]Jakub Jelinek16-25/+25
We aren't the master repository for the sanitizers and clearly upstream introduces various extensions in the code. All we care about is whether it builds and works fine with GCC, so -pedantic flag is of no use to us, only maybe to upstream if they cared about it (which they clearly don't). The following patch removes those and fixes some whitespace nits at the same time. 2024-11-25 Jakub Jelinek <jakub@redhat.com> PR sanitizer/117732 * asan/Makefile.am (AM_CXXFLAGS): Remove -pedantic. Formatting fix. (asan_files): Formatting fix. * hwasan/Makefile.am (AM_CXXFLAGS): Remove -pedantic. Formatting fix. * interception/Makefile.am (AM_CXXFLAGS): Likewise. (interception_files): Formatting fix. * libbacktrace/Makefile.am: Update copyright years. * lsan/Makefile.am (AM_CXXFLAGS): Remove -pedantic. Formatting fix. * sanitizer_common/Makefile.am (AM_CXXFLAGS): Likewise. (libsanitizer_common_la_DEPENDENCIES): Formatting fix. * tsan/Makefile.am (AM_CXXFLAGS): Remove -pedantic. Formatting fix. * ubsan/Makefile.am (AM_CXXFLAGS): Likewise. * asan/Makefile.in: Regenerate. * hwasan/Makefile.in: Regenerate. * interception/Makefile.in: Regenerate. * libbacktrace/Makefile.in: Regenerate. * lsan/Makefile.in: Regenerate. * sanitizer_common/Makefile.in: Regenerate. * tsan/Makefile.in: Regenerate. * ubsan/Makefile.in: Regenerate.
2024-11-25testsuite: Fix up various powerpc tests after -std=gnu23 by default switch ↵Jakub Jelinek9-9/+9
[PR117663] These tests use the K&R function style definitions or pass arguments to () functions. It seemed easiest to just use -std=gnu17 for all of those. 2024-11-25 Jakub Jelinek <jakub@redhat.com> PR testsuite/117663 * gcc.target/powerpc/pr58673-1.c: Add -std=gnu17 to dg-options. * gcc.target/powerpc/pr64505.c: Likewise. * gcc.target/powerpc/pr116170.c: Likewise. * gcc.target/powerpc/pr58673-2.c: Likewise. * gcc.target/powerpc/pr64019.c: Likewise. * gcc.target/powerpc/pr96506-1.c: Likewise. * gcc.target/powerpc/swaps-stack-protector.c: Likewise. * gcc.target/powerpc/pr78543.c: Likewise. * gcc.dg/vect/pr48765.c: Add -std=gnu17 to dg-additional-options.
2024-11-25tree-optimization/115825 - improve unroll estimates for volatile accessesRichard Biener6-12/+47
The loop unrolling code assumes that one third of all volatile accesses can be possibly optimized away which is of course not true. This leads to excessive unrolling in some cases. The following tracks the number of stmts with side-effects as those are not eliminatable later and only assumes one third of the other stmts can be further optimized. This causes some fallout in the testsuite where we rely on unrolling even when calls are involved. I have XFAILed g++.dg/warn/Warray-bounds-20.C but adjusted the others with a #pragma GCC unroll to mimic previous behavior and retain what the testcase was testing. I've also filed PR117671 for the case where the size estimation fails to honor the stmts we then remove by inserting __builtin_unreachable (). For gcc.dg/tree-ssa/cunroll-2.c the estimate that the code doesn't grow is clearly bogus and we have explicit code to reject unrolling for bodies containing calls so I've adjusted the testcase accordingly. PR tree-optimization/115825 * tree-ssa-loop-ivcanon.cc (loop_size::not_eliminatable_after_peeling): New. (loop_size::last_iteration_not_eliminatable_after_peeling): Likewise. (tree_estimate_loop_size): Count stmts with side-effects as not optimistically eliminatable. (estimated_unrolled_size): Compute the number of stmts that can be optimistically eliminated by followup transforms. (try_unroll_loop_completely): Adjust. * gcc.dg/tree-ssa/cunroll-17.c: New testcase. * gcc.dg/tree-ssa/cunroll-2.c: Adjust to not expect unrolling. * gcc.dg/pr94600-1.c: Force unrolling. * c-c++-common/ubsan/unreachable-3.c: Likewise. * g++.dg/warn/Warray-bounds-20.C: XFAIL cases we rely on unrolling loops created by new expressions and not inlined CTOR invocations.
2024-11-25RISC-V: Use dynamic shadow offsetKito Cheng2-4/+17
Switch to dynamic offset so that we can support Sv39, Sv48, and Sv57 at the same time without building multiple libasan versions! [1] https://github.com/llvm/llvm-project/commit/da0c8b275564f814a53a5c19497669ae2d99538d gcc/ChangeLog: * config/riscv/riscv.cc (riscv_asan_shadow_offset): Use dynamic offset for RV64. (riscv_asan_dynamic_shadow_offset_p): New. (TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P): New. gcc/testsuite/ChangeLog: * g++.dg/asan/asan_test.cc: Update the testcase for dynamic offset.
2024-11-25asan: Support dynamic shadow offsetKito Cheng7-8/+98
AddressSanitizer has supported dynamic shadow offsets since 2016[1], but GCC hasn't implemented this yet because targets using dynamic shadow offsets, such as Fuchsia and iOS, are mostly unsupported in GCC. However, RISC-V 64 switched to dynamic shadow offsets this year[2] because virtual memory space support varies across different RISC-V cores, such as Sv39, Sv48, and Sv57. We realized that the best way to handle this situation is by using a dynamic shadow offset to obtain the offset at runtime. We introduce a new target hook, TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P, to determine if the target is using a dynamic shadow offset, so this change won't affect the static offset path. Additionally, TARGET_ASAN_SHADOW_OFFSET continues to work even if TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P is non-zero, ensuring that KASAN functions as expected. This patch set has been verified on the Banana Pi F3, currently one of the most popular RISC-V development boards. All AddressSanitizer-related tests passed without introducing new regressions. It was also verified on AArch64 and x86_64 with no regressions in AddressSanitizer. [1] https://github.com/llvm/llvm-project/commit/130a190bf08a3d955d9db24dac936159dc049e12 [2] https://github.com/llvm/llvm-project/commit/da0c8b275564f814a53a5c19497669ae2d99538d gcc/ChangeLog: * asan.cc (asan_dynamic_shadow_offset_p): New. (asan_shadow_memory_dynamic_address): New. (asan_local_shadow_memory_dynamic_address): New. (get_asan_shadow_memory_dynamic_address_decl): New. (asan_maybe_insert_dynamic_shadow_at_function_entry): New. (asan_emit_stack_protection): Support dynamic shadow offset. (build_shadow_mem_access): Ditto. * asan.h (asan_maybe_insert_dynamic_shadow_at_function_entry): New. * doc/tm.texi (TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P): New. * doc/tm.texi.in (TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P): Ditto. * sanopt.cc (pass_sanopt::execute): Handle dynamic shadow offset. * target.def (asan_dynamic_shadow_offset_p): New. * toplev.cc (process_options): Handle dynamic shadow offset.
2024-11-25RISC-V: Minimal support for svvptc extension.Dongyan Chen4-0/+10
This patch support svvptc extension[1]. To enable GCC to recognize and process svvptc extension correctly at compile time. [1] https://github.com/riscv/riscv-svvptc gcc/ChangeLog: * common/config/riscv/riscv-common.cc: New extension. * common/config/riscv/riscv-ext-bitmask.def (RISCV_EXT_BITMASK): Ditto. * config/riscv/riscv.opt: New mask. gcc/testsuite/ChangeLog: * gcc.target/riscv/arch-44.c: New test.