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| author | Kito Cheng <kito.cheng@sifive.com> | 2024-11-15 12:14:55 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2024-11-25 06:35:37 +0000 |
| commit | c84a8a274af3163a4042bcfd77dd1988bd1eb0ce (patch) | |
| tree | ef7f0ad7be5e95a49dcb6f61101b3e935e51d1fb | |
| parent | 63c68752768fd6d67c695e09c85e0e1ca59cd6d4 (diff) | |
| download | gcc-c84a8a274af3163a4042bcfd77dd1988bd1eb0ce.zip gcc-c84a8a274af3163a4042bcfd77dd1988bd1eb0ce.tar.gz gcc-c84a8a274af3163a4042bcfd77dd1988bd1eb0ce.tar.bz2 | |
RISC-V: Use dynamic shadow offset
Switch to dynamic offset so that we can support Sv39, Sv48, and Sv57 at
the same time without building multiple libasan versions!
[1] https://github.com/llvm/llvm-project/commit/da0c8b275564f814a53a5c19497669ae2d99538d
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_asan_shadow_offset): Use dynamic
offset for RV64.
(riscv_asan_dynamic_shadow_offset_p): New.
(TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P): New.
gcc/testsuite/ChangeLog:
* g++.dg/asan/asan_test.cc: Update the testcase for dynamic
offset.
| -rw-r--r-- | gcc/config/riscv/riscv.cc | 18 | ||||
| -rw-r--r-- | gcc/testsuite/g++.dg/asan/asan_test.cc | 3 |
2 files changed, 17 insertions, 4 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 8f5b43e..efdb1d3 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -11226,11 +11226,18 @@ riscv_gpr_save_operation_p (rtx op) static unsigned HOST_WIDE_INT riscv_asan_shadow_offset (void) { - /* We only have libsanitizer support for RV64 at present. + /* This number must match ASAN_SHADOW_OFFSET_CONST in the file + libsanitizer/asan/asan_mapping.h, we use 0 here because RV64 + using dynamic shadow offset, and RV32 isn't support yet. */ + return 0; +} + +/* Implement TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P. */ - This number must match ASAN_SHADOW_OFFSET_CONST in the file - libsanitizer/asan/asan_mapping.h. */ - return TARGET_64BIT ? HOST_WIDE_INT_UC (0xd55550000) : 0; +static bool +riscv_asan_dynamic_shadow_offset_p (void) +{ + return TARGET_64BIT; } /* Implement TARGET_MANGLE_TYPE. */ @@ -13764,6 +13771,9 @@ riscv_use_by_pieces_infrastructure_p (unsigned HOST_WIDE_INT size, #undef TARGET_ASAN_SHADOW_OFFSET #define TARGET_ASAN_SHADOW_OFFSET riscv_asan_shadow_offset +#undef TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P +#define TARGET_ASAN_DYNAMIC_SHADOW_OFFSET_P riscv_asan_dynamic_shadow_offset_p + #ifdef TARGET_BIG_ENDIAN_DEFAULT #undef TARGET_DEFAULT_TARGET_FLAGS #define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN) diff --git a/gcc/testsuite/g++.dg/asan/asan_test.cc b/gcc/testsuite/g++.dg/asan/asan_test.cc index 0d97680..65580af 100644 --- a/gcc/testsuite/g++.dg/asan/asan_test.cc +++ b/gcc/testsuite/g++.dg/asan/asan_test.cc @@ -932,6 +932,9 @@ TEST(AddressSanitizer, ShadowGapTest) { #else # if defined(__powerpc64__) char *addr = (char*)0x024000800000; +# elif defined(__riscv) && __riscv_xlen == 64 + extern void *__asan_shadow_memory_dynamic_address; + char *addr = (char*)__asan_shadow_memory_dynamic_address + 0x1000; # else char *addr = (char*)0x0000100000080000; # endif |