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/* TI PRU opcode list for GAS, the GNU assembler.
   Copyright (C) 2014-2024 Free Software Foundation, Inc.
   Contributed by Dimitar Dimitrov <dimitar@dinux.eu>

   This file is part of the GNU opcodes library.

   GAS/GDB is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   GAS/GDB is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS or GDB; see the file COPYING3.  If not, write to
   the Free Software Foundation, 51 Franklin Street - Fifth Floor,
   Boston, MA 02110-1301, USA.  */

#ifndef _PRU_H_
#define _PRU_H_

#include "bfd.h"

/****************************************************************************
 * This file contains structures, bit masks and shift counts used
 * by the GNU toolchain to define the PRU instruction set and
 * access various opcode fields.
 ****************************************************************************/

/* Identify different overflow situations for error messages.  */
enum overflow_type
{
  call_target_overflow = 0,
  qbranch_target_overflow,
  address_offset_overflow,
  signed_immed16_overflow,
  unsigned_immed32_overflow,
  unsigned_immed16_overflow,
  unsigned_immed8_overflow,
  unsigned_immed5_overflow,
  no_overflow
};

enum opcode_format_type
{
  opcode_format1,
  opcode_format2ab,
  opcode_format2abl,
  opcode_format2c,
  opcode_format2de,
  opcode_format45,
  opcode_format6
};

/* Opcode ID listing. Used for indexing by the simulator.  */
enum pru_instr_type
{
  prui_add, prui_adc, prui_sub, prui_suc, prui_lsl, prui_lsr, prui_rsb,
  prui_rsc, prui_and, prui_or,  prui_xor, prui_min, prui_max, prui_clr,
  prui_set, prui_not, prui_jmp, prui_jal, prui_ldi, prui_lmbd,
  prui_halt, prui_slp, prui_xin, prui_xout, prui_xchg, prui_sxin,
  prui_sxout, prui_sxchg, prui_loop, prui_iloop, prui_qbgt, prui_qbge,
  prui_qblt, prui_qble, prui_qbeq, prui_qbne, prui_qba, prui_qbbs,
  prui_qbbc, prui_lbbo, prui_sbbo, prui_lbco, prui_sbco
};

/* This structure holds information for a particular instruction.

   The args field is a string describing the operands.  The following
   letters can appear in the args:
     b - a 5.3-bit right source register index OR 8-bit unsigned immediate
     B - same as 'b', but for LOOP instruction where IMM is decremented
     c - a 5 bit unsigned immediate for constant table offset
     d - a 5.3-bit destination register index
     D - a 5.2-bit destination register index
     E - for internal GAS self-tests only
     i - a 32-bit immediate or label
     j - a 5.3-bit right source register index OR 18-bit PC address
     l - burst length (unsigned 7-bit immediate or r0.b[0-3]) for xLBCO
     n - burst length (unsigned 7-bit immediate or r0.b[0-3]) for XFR
     o - a 10-bit signed PC-relative offset
     O - an 8-bit unsigned PC-relative offset for LOOP termination point
     R - a 5-bit destination register index
     s - a 5.3-bit left source register index
     S - a 5-bit left source register index
     w - a single bit for "WakeOnStatus"
     W - a 16-bit unsigned immediate with IO=0 field (LDI)
     x - an 8-bit XFR wide-bus address immediate
   Literal ',' character may also appear in the args as delimiter.

   Most of the macro names are from [1].

   The pinfo field is INSN_MACRO for a macro.  Otherwise, it is a collection
   of bits describing the instruction, notably any relevant hazard
   information.

   When assembling, the match field contains the opcode template, which
   is modified by the arguments to produce the actual opcode
   that is emitted.  If pinfo is INSN_MACRO, then this is 0.

   If pinfo is INSN_MACRO, the mask field stores the macro identifier.
   Otherwise this is a bit mask for the relevant portions of the opcode
   when disassembling.  If the actual opcode anded with the match field
   equals the opcode field, then we have found the correct instruction.

  [1] http://processors.wiki.ti.com/index.php/Programmable_Realtime_Unit  */

struct pru_opcode
{