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Diffstat (limited to 'libjava/java/security/KeyFactorySpi.java')

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/* * SPDX-License-Identifier: BSD-2-Clause * * Copyright (c) 2019 Western Digital Corporation or its affiliates. * * Authors: * Anup Patel <anup.patel@wdc.com> */ #include <sbi/riscv_asm.h> #include <sbi/riscv_encoding.h> #include <sbi/sbi_console.h> #include <sbi/sbi_ecall.h> #include <sbi/sbi_error.h> #include <sbi/sbi_hart.h> #include <sbi/sbi_illegal_insn.h> #include <sbi/sbi_ipi.h> #include <sbi/sbi_irqchip.h> #include <sbi/sbi_misaligned_ldst.h> #include <sbi/sbi_pmu.h> #include <sbi/sbi_scratch.h> #include <sbi/sbi_timer.h> #include <sbi/sbi_trap.h> static void __noreturn sbi_trap_error(const char *msg, int rc, ulong mcause, ulong mtval, ulong mtval2, ulong mtinst, struct sbi_trap_regs *regs) { u32 hartid = current_hartid(); sbi_printf("%s: hart%d: %s (error %d)\n", __func__, hartid, msg, rc); sbi_printf("%s: hart%d: mcause=0x%" PRILX " mtval=0x%" PRILX "\n", __func__, hartid, mcause, mtval); if (misa_extension('H')) { sbi_printf("%s: hart%d: mtval2=0x%" PRILX " mtinst=0x%" PRILX "\n", __func__, hartid, mtval2, mtinst); } sbi_printf("%s: hart%d: mepc=0x%" PRILX " mstatus=0x%" PRILX "\n", __func__, hartid, regs->mepc, regs->mstatus); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "ra", regs->ra, "sp", regs->sp); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "gp", regs->gp, "tp", regs->tp); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "s0", regs->s0, "s1", regs->s1); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "a0", regs->a0, "a1", regs->a1); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "a2", regs->a2, "a3", regs->a3); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "a4", regs->a4, "a5", regs->a5); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "a6", regs->a6, "a7", regs->a7); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "s2", regs->s2, "s3", regs->s3); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "s4", regs->s4, "s5", regs->s5); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "s6", regs->s6, "s7", regs->s7); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "s8", regs->s8, "s9", regs->s9); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "s10", regs->s10, "s11", regs->s11); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "t0", regs->t0, "t1", regs->t1); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "t2", regs->t2, "t3", regs->t3); sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__, hartid, "t4", regs->t4, "t5", regs->t5); sbi_printf("%s: hart%d: %s=0x%" PRILX "\n", __func__, hartid, "t6", regs->t6); sbi_hart_hang(); } /** * Redirect trap to lower privledge mode (S-mode or U-mode) * * @param regs pointer to register state * @param trap pointer to trap details * * @return 0 on success and negative error code on failure */ int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_trap_info *trap) { ulong hstatus, vsstatus, prev_mode; #if __riscv_xlen == 32 bool prev_virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE; #else bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE; #endif /* By default, we redirect to HS-mode */ bool next_virt = FALSE; /* Sanity check on previous mode */ prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT; if (prev_mode != PRV_S && prev_mode != PRV_U) return SBI_ENOTSUPP; /* For certain exceptions from VS/VU-mode we redirect to VS-mode */ if (misa_extension('H') && prev_virt) { switch (trap->cause) { case CAUSE_FETCH_PAGE_FAULT: case CAUSE_LOAD_PAGE_FAULT: case CAUSE_STORE_PAGE_FAULT: next_virt = TRUE; break; default: break; }; } /* Update MSTATUS MPV bits */ #if __riscv_xlen == 32 regs->mstatusH &= ~MSTATUSH_MPV; regs->mstatusH |= (next_virt) ? MSTATUSH_MPV : 0UL; #else regs->mstatus &= ~MSTATUS_MPV; regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL; #endif /* Update HSTATUS for VS/VU-mode to HS-mode transition */ if (misa_extension('H') && prev_virt && !next_virt) { /* Update HSTATUS SPVP and SPV bits */ hstatus = csr_read(CSR_HSTATUS); hstatus &= ~HSTATUS_SPVP; hstatus |= (prev_mode == PRV_S) ? HSTATUS_SPVP : 0; hstatus &= ~HSTATUS_SPV; hstatus |= (prev_virt) ? HSTATUS_SPV : 0; csr_write(CSR_HSTATUS, hstatus); csr_write(CSR_HTVAL, trap->tval2); csr_write(CSR_HTINST, trap->tinst); } /* Update exception related CSRs */ if (next_virt) { /* Update VS-mode exception info */


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