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-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/mips/mips.h6
2 files changed, 7 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2b79a6c..4409eeb 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2004-05-01 Richard Sandiford <rsandifo@redhat.com>
+
+ * config/mips/mips.h (TARGET_MACC_CHAINS): Fix comment.
+
2004-05-01 Falk Hueffner <falk@debian.org>
* config/alpha/alpha.md (builtin_insbl, builtin_inswl,
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 3c3936d..37111ca 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -346,10 +346,10 @@ extern const struct mips_cpu_info *mips_tune_info;
t1 = a * b
t2 = t1 + c * d
- t3 = c * d
- t4 = t3 - c * d
+ t3 = e * f
+ t4 = t3 - g * h
- t1 will have a higher priority and t2 and t3 will have a higher
+ t1 will have a higher priority than t2 and t3 will have a higher
priority than t4. However, before reload, there is no dependence
between t1 and t3, and they can often have similar priorities.
The scheduler will then tend to prefer: