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-rw-r--r--gcc/config/aarch64/aarch64.cc21
-rw-r--r--gcc/testsuite/gcc.target/aarch64/facg_1.c15
2 files changed, 36 insertions, 0 deletions
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 18dab2a..29dbacf 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -14081,6 +14081,27 @@ aarch64_rtx_costs (rtx x, machine_mode mode, int outer ATTRIBUTE_UNUSED,
if (VECTOR_MODE_P (mode))
{
+ /* Many vector comparison operations are represented as NEG
+ of a comparison. */
+ if (COMPARISON_P (op0))
+ {
+ rtx op00 = XEXP (op0, 0);
+ rtx op01 = XEXP (op0, 1);
+ machine_mode inner_mode = GET_MODE (op00);
+ /* FACGE/FACGT. */
+ if (GET_MODE_CLASS (inner_mode) == MODE_VECTOR_FLOAT
+ && GET_CODE (op00) == ABS
+ && GET_CODE (op01) == ABS)
+ {
+ op00 = XEXP (op00, 0);
+ op01 = XEXP (op01, 0);
+ }
+ *cost += rtx_cost (op00, inner_mode, GET_CODE (op0), 0, speed);
+ *cost += rtx_cost (op01, inner_mode, GET_CODE (op0), 1, speed);
+ if (speed)
+ *cost += extra_cost->vect.alu;
+ return true;
+ }
if (speed)
{
/* FNEG. */
diff --git a/gcc/testsuite/gcc.target/aarch64/facg_1.c b/gcc/testsuite/gcc.target/aarch64/facg_1.c
new file mode 100644
index 0000000..6c17fb6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/facg_1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include <arm_neon.h>
+
+int g(uint32x4_t, uint32x4_t);
+
+int foo (float32x4_t x, float32x4_t a, float32x4_t b)
+{
+ return g(vcagtq_f32 (x, a), vcagtq_f32 (x, b));
+}
+
+/* { dg-final { scan-assembler-times {facgt\tv[0-9]+\.4s, v[0-9]+\.4s, v[0-9]+\.4s} 2 } } */
+/* { dg-final { scan-assembler-not {\tfabs\t} } } */
+