diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/aarch64/iterators.md | 103 |
1 files changed, 50 insertions, 53 deletions
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 4786b02..720d79d 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -3165,6 +3165,10 @@ (define_int_iterator LAST [UNSPEC_LASTA UNSPEC_LASTB]) +;; Iterators for fp8 operations + +(define_int_iterator FAMINMAX_UNS [UNSPEC_FAMAX UNSPEC_FAMIN]) + (define_int_iterator SVE_INT_UNARY [UNSPEC_REVB UNSPEC_REVH UNSPEC_REVW]) @@ -3738,20 +3742,44 @@ [UNSPECV_ATOMIC_LDOP_OR UNSPECV_ATOMIC_LDOP_BIC UNSPECV_ATOMIC_LDOP_XOR UNSPECV_ATOMIC_LDOP_PLUS]) -(define_int_attr atomic_ldop - [(UNSPECV_ATOMIC_LDOP_OR "set") (UNSPECV_ATOMIC_LDOP_BIC "clr") - (UNSPECV_ATOMIC_LDOP_XOR "eor") (UNSPECV_ATOMIC_LDOP_PLUS "add")]) - -(define_int_attr atomic_ldoptab - [(UNSPECV_ATOMIC_LDOP_OR "ior") (UNSPECV_ATOMIC_LDOP_BIC "bic") - (UNSPECV_ATOMIC_LDOP_XOR "xor") (UNSPECV_ATOMIC_LDOP_PLUS "add")]) - (define_int_iterator SUBDI_BITS [8 16 32]) (define_int_iterator BHSD_BITS [8 16 32 64]) (define_int_iterator LUTI_BITS [2 4]) +(define_int_iterator GET_FPSCR + [UNSPECV_GET_FPSR UNSPECV_GET_FPCR]) + +(define_int_iterator SET_FPSCR + [UNSPECV_SET_FPSR UNSPECV_SET_FPCR]) + +(define_int_iterator FP8CVT_UNS + [UNSPEC_F1CVT + UNSPEC_F2CVT + UNSPEC_F1CVTLT + UNSPEC_F2CVTLT]) + +(define_int_iterator SVE2_FP8_TERNARY_VNX8HF + [UNSPEC_FMLALB_FP8 + UNSPEC_FMLALT_FP8]) + +(define_int_iterator SVE2_FP8_TERNARY_VNX4SF + [UNSPEC_FMLALLBB_FP8 + UNSPEC_FMLALLBT_FP8 + UNSPEC_FMLALLTB_FP8 + UNSPEC_FMLALLTT_FP8]) + +(define_int_iterator SVE2_FP8_TERNARY_LANE_VNX8HF + [UNSPEC_FMLALB_FP8 + UNSPEC_FMLALT_FP8]) + +(define_int_iterator SVE2_FP8_TERNARY_LANE_VNX4SF + [UNSPEC_FMLALLBB_FP8 + UNSPEC_FMLALLBT_FP8 + UNSPEC_FMLALLTB_FP8 + UNSPEC_FMLALLTT_FP8]) + ;; ------------------------------------------------------------------- ;; Int Iterators Attributes. ;; ------------------------------------------------------------------- @@ -3968,6 +3996,8 @@ (define_code_attr binqops_op_rev [(ss_plus "sqsub") (ss_minus "sqadd")]) +(define_code_attr faminmax_op [(smax "famax") (smin "famin")]) + ;; The SVE logical instruction that implements an unspec. (define_int_attr logicalf_op [(UNSPEC_ANDF "and") (UNSPEC_IORF "orr") @@ -4180,6 +4210,12 @@ (define_int_attr frintnzs_op [(UNSPEC_FRINT32Z "frint32z") (UNSPEC_FRINT32X "frint32x") (UNSPEC_FRINT64Z "frint64z") (UNSPEC_FRINT64X "frint64x")]) +(define_int_attr faminmax_cond_uns_op + [(UNSPEC_COND_SMAX "famax") (UNSPEC_COND_SMIN "famin")]) + +(define_int_attr faminmax_uns_op + [(UNSPEC_FAMAX "famax") (UNSPEC_FAMIN "famin")]) + ;; The condition associated with an UNSPEC_COND_<xx>. (define_int_attr cmp_op [(UNSPEC_COND_CMPEQ_WIDE "eq") (UNSPEC_COND_CMPGE_WIDE "ge") @@ -4724,12 +4760,6 @@ ;; Iterators and attributes for fpcr fpsr getter setters -(define_int_iterator GET_FPSCR - [UNSPECV_GET_FPSR UNSPECV_GET_FPCR]) - -(define_int_iterator SET_FPSCR - [UNSPECV_SET_FPSR UNSPECV_SET_FPCR]) - (define_int_attr fpscr_name [(UNSPECV_GET_FPSR "fpsr") (UNSPECV_SET_FPSR "fpsr") @@ -4738,26 +4768,13 @@ (define_int_attr bits_etype [(8 "b") (16 "h") (32 "s") (64 "d")]) -;; Iterators and attributes for faminmax - -(define_int_iterator FAMINMAX_UNS [UNSPEC_FAMAX UNSPEC_FAMIN]) - -(define_int_attr faminmax_cond_uns_op - [(UNSPEC_COND_SMAX "famax") (UNSPEC_COND_SMIN "famin")]) - -(define_int_attr faminmax_uns_op - [(UNSPEC_FAMAX "famax") (UNSPEC_FAMIN "famin")]) - -(define_code_attr faminmax_op - [(smax "famax") (smin "famin")]) - -;; Iterators and attributes for fp8 sve/sme conversions +(define_int_attr atomic_ldop + [(UNSPECV_ATOMIC_LDOP_OR "set") (UNSPECV_ATOMIC_LDOP_BIC "clr") + (UNSPECV_ATOMIC_LDOP_XOR "eor") (UNSPECV_ATOMIC_LDOP_PLUS "add")]) -(define_int_iterator FP8CVT_UNS - [UNSPEC_F1CVT - UNSPEC_F2CVT - UNSPEC_F1CVTLT - UNSPEC_F2CVTLT]) +(define_int_attr atomic_ldoptab + [(UNSPECV_ATOMIC_LDOP_OR "ior") (UNSPECV_ATOMIC_LDOP_BIC "bic") + (UNSPECV_ATOMIC_LDOP_XOR "xor") (UNSPECV_ATOMIC_LDOP_PLUS "add")]) (define_int_attr fp8_cvt_uns_op [(UNSPEC_F1CVT "f1cvt") @@ -4765,26 +4782,6 @@ (UNSPEC_F1CVTLT "f1cvtlt") (UNSPEC_F2CVTLT "f2cvtlt")]) -(define_int_iterator SVE2_FP8_TERNARY_VNX8HF - [UNSPEC_FMLALB_FP8 - UNSPEC_FMLALT_FP8]) - -(define_int_iterator SVE2_FP8_TERNARY_VNX4SF - [UNSPEC_FMLALLBB_FP8 - UNSPEC_FMLALLBT_FP8 - UNSPEC_FMLALLTB_FP8 - UNSPEC_FMLALLTT_FP8]) - -(define_int_iterator SVE2_FP8_TERNARY_LANE_VNX8HF - [UNSPEC_FMLALB_FP8 - UNSPEC_FMLALT_FP8]) - -(define_int_iterator SVE2_FP8_TERNARY_LANE_VNX4SF - [UNSPEC_FMLALLBB_FP8 - UNSPEC_FMLALLBT_FP8 - UNSPEC_FMLALLTB_FP8 - UNSPEC_FMLALLTT_FP8]) - (define_int_attr sve2_fp8_fma_op_vnx8hf [(UNSPEC_FMLALB_FP8 "fmlalb") (UNSPEC_FMLALT_FP8 "fmlalt")]) |