diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 157 | ||||
| -rw-r--r-- | gcc/DATESTAMP | 2 | ||||
| -rw-r--r-- | gcc/ada/ChangeLog | 18 | ||||
| -rw-r--r-- | gcc/c-family/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/cp/ChangeLog | 26 | ||||
| -rw-r--r-- | gcc/fortran/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 53 |
7 files changed, 270 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fc67dd4..388681f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,160 @@ +2021-02-03 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/98937 + * tree-ssa-strlen.c (strlen_dom_walker::~strlen_dom_walker): Define. + Flush pointer_query cache. + +2021-02-03 Aaron Sawdey <acsawdey@linux.ibm.com> + + * config/rs6000/genfusion.pl (gen_2logical): Add missing + fixes based on patch review. + * config/rs6000/fusion.md: Regenerate file. + +2021-02-03 Aaron Sawdey <acsawdey@linux.ibm.com> + + * config/rs6000/t-rs6000: Comment out auto generation of + fusion.md for now. + +2021-02-03 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX908. + * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Add gfx908. + (output_file_start): Add gfx908. + * config/gcn/gcn.opt (gpu_type): Add gfx908. + * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add march=gfx908. + (MULTILIB_DIRNAMES): Add gfx908. + * config/gcn/mkoffload.c (EF_AMDGPU_MACH_AMDGCN_GFX908): New define. + (main): Recognize gfx908. + * config/gcn/t-omp-device: Add gfx908. + +2021-02-03 Jonathan Wright <jonathan.wright@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Add + [su]mlsl_hi_lane[q] builtin macro generators. + * config/aarch64/aarch64-simd.md + (aarch64_<su>mlsl_hi_lane<mode>_insn): Define. + (aarch64_<su>mlsl_hi_lane<mode>): Define. + (aarch64_<su>mlsl_hi_laneq<mode>_insn): Define. + (aarch64_<su>mlsl_hi_laneq<mode>): Define. + * config/aarch64/arm_neon.h (vmlsl_high_lane_s16): Use RTL + builtin instead of inline asm. + (vmlsl_high_lane_s32): Likewise. + (vmlsl_high_lane_u16): Likewise. + (vmlsl_high_lane_u32): Likewise. + (vmlsl_high_laneq_s16): Likewise. + (vmlsl_high_laneq_s32): Likewise. + (vmlsl_high_laneq_u16): Likewise. + (vmlsl_high_laneq_u32): Likewise. + (vmlal_high_laneq_u32): Likewise. + +2021-02-03 Jonathan Wright <jonathan.wright@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Add + [su]mlal_hi_lane[q] builtin generator macros. + * config/aarch64/aarch64-simd.md + (aarch64_<su>mlal_hi_lane<mode>_insn): Define. + (aarch64_<su>mlal_hi_lane<mode>): Define. + (aarch64_<su>mlal_hi_laneq<mode>_insn): Define. + (aarch64_<su>mlal_hi_laneq<mode>): Define. + * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Use RTL + builtin instead of inline asm. + (vmlal_high_lane_s32): Likewise. + (vmlal_high_lane_u16): Likewise. + (vmlal_high_lane_u32): Likewise. + (vmlal_high_laneq_s16): Likewise. + (vmlal_high_laneq_s32): Likewise. + (vmlal_high_laneq_u16): Likewise. + (vmlal_high_laneq_u32): Likewise. + +2021-02-03 Jonathan Wright <jonathan.wright@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_hi_n + builtin generator macros. + * config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_hi_n<mode>_insn): + Define. + (aarch64_<su>mlsl_hi_n<mode>): Define. + * config/aarch64/arm_neon.h (vmlsl_high_n_s16): Use RTL builtin + instead of inline asm. + (vmlsl_high_n_s32): Likewise. + (vmlsl_high_n_u16): Likewise. + (vmlsl_high_n_u32): Likewise. + +2021-02-03 Jonathan Wright <jonathan.wright@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_hi_n + builtin generator macros. + * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_hi_n<mode>_insn): + Define. + (aarch64_<su>mlal_hi_n<mode>): Define. + * config/aarch64/arm_neon.h (vmlal_high_n_s16): Use RTL builtin + instead of inline asm. + (vmlal_high_n_s32): Likewise. + (vmlal_high_n_u16): Likewise. + (vmlal_high_n_u32): Likewise. + +2021-02-03 Jonathan Wright <jonathan.wright@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Add RTL builtin + generator macros. + * config/aarch64/aarch64-simd.md (*aarch64_<su>mlal_hi<mode>): + Rename to... + (aarch64_<su>mlal_hi<mode>_insn): This. + (aarch64_<su>mlal_hi<mode>): Define. + * config/aarch64/arm_neon.h (vmlal_high_s8): Use RTL builtin + instead of inline asm. + (vmlal_high_s16): Likewise. + (vmlal_high_s32): Likewise. + (vmlal_high_u8): Likewise. + (vmlal_high_u16): Likewise. + (vmlal_high_u32): Likewise. + +2021-02-03 Ilya Leoshkevich <iii@linux.ibm.com> + + * lra-spills.c (remove_pseudos): Call lra_update_insn_recog_data() + after calling alter_subreg() on a (mem). + +2021-02-03 Martin Liska <mliska@suse.cz> + + PR lto/98912 + * lto-streamer-out.c (produce_lto_section): Fill up missing + padding. + * lto-streamer.h (struct lto_section): Add _padding field. + +2021-02-03 Richard Biener <rguenther@suse.de> + + * lto-streamer.c (lto_get_section_name): Free temporary + buffer. + * tree-loop-distribution.c + (loop_distribution::merge_dep_scc_partitions): Free edge data. + +2021-02-03 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/97487 + * ifcvt.c (noce_can_force_operand): New function. + (noce_emit_move_insn): Use it. + (noce_try_sign_mask): Likewise. Formatting fix. + +2021-02-03 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/97971 + * lra-constraints.c (process_alt_operands): For inline asm, don't call + fatal_insn, but instead return false. + +2021-02-03 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/98287 + * config/i386/mmx.md (<insn><mode>3): For shifts don't enable expander + for V1DImode. + +2021-02-03 Tamar Christina <tamar.christina@arm.com> + + PR tree-optimization/98928 + * tree-vect-loop.c (vect_analyze_loop_2): Change + STMT_VINFO_SLP_VECT_ONLY to STMT_VINFO_SLP_VECT_ONLY_PATTERN. + * tree-vect-slp-patterns.c (complex_pattern::build): Likewise. + * tree-vectorizer.h (STMT_VINFO_SLP_VECT_ONLY_PATTERN): New. + (class _stmt_vec_info): Add slp_vect_pattern_only_p. + 2021-02-02 Richard Biener <rguenther@suse.de> * gimple-loop-interchange.cc (prepare_data_references): diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 465eb04..8aed06e 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20210203 +20210204 diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index 75f75ec..4397355 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,21 @@ +2021-02-03 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.c (components_to_record): If the first component + with rep clause is the _Parent field with variable size, temporarily + set it aside when computing the internal layout of the REP part again. + * gcc-interface/utils.c (finish_record_type): Revert to taking the + maximum when merging sizes for all record types with rep clause. + (merge_sizes): Put SPECIAL parameter last and adjust recursive calls. + +2021-02-03 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.c (gnat_to_gnu_entity) <E_Array_Type>: Make the + two fields of the fat pointer type addressable, and do not make the + template type read-only. + <E_Record_Type>: If the type has discriminants mark it as may_alias. + * gcc-interface/utils.c (make_dummy_type): Likewise. + (build_dummy_unc_pointer_types): Likewise. + 2021-01-26 Marius Hillenbrand <mhillen@linux.ibm.com> PR ada/98228 diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index fa67d1a..0369b70 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,8 @@ +2021-02-03 Ed Smith-Rowland <3dw4rd@verizon.net> + + * c-cppbuiltin.c (c_cpp_builtins): Define __cpp_size_t_suffix. + * c-lex.c (interpret_integer): Set node type for size literal. + 2021-01-28 Jakub Jelinek <jakub@redhat.com> * c.opt (-std=c++2a, -std=c++20, -std=gnu++2a, -std=gnu++20): Remove diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index de69476..2804cd1 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,29 @@ +2021-02-03 Marek Polacek <polacek@redhat.com> + + PR c++/98951 + * call.c (struct z_candidate): Mark rewritten and reversed as const. + (struct NonPublicField): Mark operator() as const. + (struct NonTrivialField): Likewise. + +2021-02-03 Jason Merrill <jason@redhat.com> + + PR c++/98926 + PR c++/98570 + * pt.c (spec_hasher::equal): Set processing_template_decl. + * Make-lang.in (check-g++-strict-gc): Add --param + hash-table-verification-limit=10000. + +2021-02-03 Marek Polacek <polacek@redhat.com> + + PR c++/98899 + * parser.c (cp_parser_class_specifier_1): Use any possible + DEFPARSE_INSTANTIATIONS to update DEFERRED_NOEXCEPT_PATTERN. + (cp_parser_save_noexcept): Initialize DEFPARSE_INSTANTIATIONS. + * pt.c (tsubst_exception_specification): Stash new_specs into + DEFPARSE_INSTANTIATIONS. + * tree.c (fixup_deferred_exception_variants): Use + UNPARSED_NOEXCEPT_SPEC_P. + 2021-02-02 Jason Merrill <jason@redhat.com> PR c++/98929 diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 5602503..9f75bb7 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,13 @@ +2021-02-03 Jeff Law <law@redhat.com> + + * intrinsic.texi (ANINT): Fix typo. + +2021-02-03 Tobias Burnus <tobias@codesourcery.com> + + PR fortran/98913 + * dependency.c (gfc_dep_resolver): Treat local access + to coarrays like any array access in dependency analysis. + 2021-01-28 Harald Anlauf <anlauf@gmx.de> PR fortran/86470 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a0c6e73..4163d76 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,56 @@ +2021-02-03 Jakub Jelinek <jakub@redhat.com> + + PR preprocessor/98882 + * gcc.dg/cpp/pr98882.c: New test. + +2021-02-03 Jason Merrill <jason@redhat.com> + + * g++.dg/cpp0x/alias-decl-dr1558.C: Pass --param + hash-table-verification-limit=10000. + +2021-02-03 Ed Smith-Rowland <3dw4rd@verizon.net> + + * g++.dg/cpp0x/udlit-shadow-neg.C: Test for 'z' and 'zu' shadowing. + * g++.dg/cpp23/feat-cxx2b.C: New test. + * g++.dg/cpp23/size_t-literals.C: New test. + * g++.dg/warn/Wsize_t-literals.C: New test. + +2021-02-03 Jakub Jelinek <jakub@redhat.com> + + PR c++/97804 + * g++.dg/cpp2a/no_unique_address11.C: New test. + +2021-02-03 Marek Polacek <polacek@redhat.com> + + PR c++/98899 + * g++.dg/cpp0x/noexcept65.C: New test. + +2021-02-03 Tobias Burnus <tobias@codesourcery.com> + + PR fortran/98913 + * gfortran.dg/coarray/array_temporary.f90: New test. + +2021-02-03 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/97487 + * gcc.dg/pr97487-1.c: New test. + * gcc.dg/pr97487-2.c: New test. + +2021-02-03 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/97971 + * gcc.target/i386/pr97971.c: New test. + +2021-02-03 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/98287 + * gcc.dg/pr98287.c: New test. + +2021-02-03 Tamar Christina <tamar.christina@arm.com> + + PR tree-optimization/98928 + * gcc.target/i386/pr98928.c: New test. + 2021-02-02 Martin Liska <mliska@suse.cz> PR target/97510 |