diff options
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 26 | ||||
-rw-r--r-- | gcc/doc/extend.texi | 77 |
2 files changed, 53 insertions, 50 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 26b06d7..c7c3593 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-09-12 Cameron McInally <cameron.mcinally@nyu.edu> + + * doc/extend.texi: Fix errors in x86 FMA builtin naming. + The FMA instruction names should have a 'v' prefix. + 2013-09-12 Richard Biener <rguenther@suse.de> * tree-loop-distribution.c (dot_rdg_1): Make graph prettier. @@ -60,7 +65,8 @@ (cbranchsi4_real_signed): New. (cbranchsi4_real): New. (peephole2): New. - * config/rl78/rl78-virt.md (ashrsi3_virt): Add custom cases for constant shifts. + * config/rl78/rl78-virt.md (ashrsi3_virt): Add custom cases for + constant shifts. (lshrsi3_virt): Likewise. (ashlsi3_virt): Likewise. (cbranchqi4_virt_signed): New. @@ -93,8 +99,8 @@ (add_postponed_content_update): New. (process_postponed_content_update): New. (gen_and_emit_move): New. - (transcode_memory_rtx): Record new location content. Use - gen_and_emit_move. + (transcode_memory_rtx): Record new location content. + Use gen_and_emit_move. (force_into_acc): New. (move_to_acc): Use gen_and_emit_move. (move_from_acc): Likewise. @@ -192,9 +198,9 @@ (MASK_REGNO_P): New. (ANY_MASK_REG_P): Ditto. (HI_REGISTER_NAMES): Add new mask registers. - * config/i386/i386.md (MASK0_REG, MASK1_REG, MASK2_REG, - MASK3_REG, MASK4_REG, MASK5_REG, MASK6_REG, - MASK7_REG): Constants for new mask registers. + * config/i386/i386.md (MASK0_REG, MASK1_REG, MASK2_REG, MASK3_REG, + MASK4_REG, MASK5_REG, MASK6_REG, MASK7_REG): Constants for new + mask registers. (attribute "type"): Add mskmov, msklog. (attribute "length_immediate"): Support them. (attribute "memory"): Ditto. @@ -219,7 +225,8 @@ (*one_cmpl<mode>2_1): Remove HImode and handle it... (*one_cmplhi2_1): ...Here, now with mask registers support. (*one_cmplqi2_1): Support new mask registers. - (HI/QImode arithmetics splitter): Don't split if mask registers are used. + (HI/QImode arithmetics splitter): Don't split if mask registers + are used. (HI/QImode not splitter): Ditto. * config/i386/predicated.md (mask_reg_operand): New. (general_reg_operand): Ditto. @@ -312,9 +319,8 @@ * tree-data-ref.h (build_rdg): Drop all parameters but loop. * tree-data-ref.c (create_rdg_vertices): Collect all data references, signal failure to the caller, use data-ref API. - (build_rdg): Compute data references only once. Maintain - lifetime of data references and data dependences from within - RDG. + (build_rdg): Compute data references only once. Maintain lifetime + of data references and data dependences from within RDG. (free_rdg): Free dependence relations. * tree-loop-distribution.c (rdg_flag_uses): Drop weird code inventing extra dependences. diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index eb0946b..cb48220 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -10204,8 +10204,7 @@ void __builtin_ia32_mwait (unsigned int, unsigned int) @end smallexample The following built-in functions are available when @option{-mssse3} is used. -All of them generate the machine instruction that is part of the name -with MMX registers. +All of them generate the machine instruction that is part of the name. @smallexample v2si __builtin_ia32_phaddd (v2si, v2si) @@ -10227,8 +10226,7 @@ v4hi __builtin_ia32_pabsw (v4hi) @end smallexample The following built-in functions are available when @option{-mssse3} is used. -All of them generate the machine instruction that is part of the name -with SSE registers. +All of them generate the machine instruction that is part of the name. @smallexample v4si __builtin_ia32_phaddd128 (v4si, v4si) @@ -10876,42 +10874,41 @@ v8hi __builtin_ia32_vpshlw (v8hi, v8hi) @end smallexample The following built-in functions are available when @option{-mfma4} is used. -All of them generate the machine instruction that is part of the name -with MMX registers. - -@smallexample -v2df __builtin_ia32_fmaddpd (v2df, v2df, v2df) -v4sf __builtin_ia32_fmaddps (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fmaddsd (v2df, v2df, v2df) -v4sf __builtin_ia32_fmaddss (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fmsubpd (v2df, v2df, v2df) -v4sf __builtin_ia32_fmsubps (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fmsubsd (v2df, v2df, v2df) -v4sf __builtin_ia32_fmsubss (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fnmaddpd (v2df, v2df, v2df) -v4sf __builtin_ia32_fnmaddps (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fnmaddsd (v2df, v2df, v2df) -v4sf __builtin_ia32_fnmaddss (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fnmsubpd (v2df, v2df, v2df) -v4sf __builtin_ia32_fnmsubps (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fnmsubsd (v2df, v2df, v2df) -v4sf __builtin_ia32_fnmsubss (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fmaddsubpd (v2df, v2df, v2df) -v4sf __builtin_ia32_fmaddsubps (v4sf, v4sf, v4sf) -v2df __builtin_ia32_fmsubaddpd (v2df, v2df, v2df) -v4sf __builtin_ia32_fmsubaddps (v4sf, v4sf, v4sf) -v4df __builtin_ia32_fmaddpd256 (v4df, v4df, v4df) -v8sf __builtin_ia32_fmaddps256 (v8sf, v8sf, v8sf) -v4df __builtin_ia32_fmsubpd256 (v4df, v4df, v4df) -v8sf __builtin_ia32_fmsubps256 (v8sf, v8sf, v8sf) -v4df __builtin_ia32_fnmaddpd256 (v4df, v4df, v4df) -v8sf __builtin_ia32_fnmaddps256 (v8sf, v8sf, v8sf) -v4df __builtin_ia32_fnmsubpd256 (v4df, v4df, v4df) -v8sf __builtin_ia32_fnmsubps256 (v8sf, v8sf, v8sf) -v4df __builtin_ia32_fmaddsubpd256 (v4df, v4df, v4df) -v8sf __builtin_ia32_fmaddsubps256 (v8sf, v8sf, v8sf) -v4df __builtin_ia32_fmsubaddpd256 (v4df, v4df, v4df) -v8sf __builtin_ia32_fmsubaddps256 (v8sf, v8sf, v8sf) +All of them generate the machine instruction that is part of the name. + +@smallexample +v2df __builtin_ia32_vfmaddpd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfmaddps (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfmaddsd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfmaddss (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfmsubpd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfmsubps (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfmsubsd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfmsubss (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfnmaddpd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfnmaddps (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfnmaddsd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfnmaddss (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfnmsubpd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfnmsubps (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfnmsubsd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfnmsubss (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfmaddsubpd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfmaddsubps (v4sf, v4sf, v4sf) +v2df __builtin_ia32_vfmsubaddpd (v2df, v2df, v2df) +v4sf __builtin_ia32_vfmsubaddps (v4sf, v4sf, v4sf) +v4df __builtin_ia32_vfmaddpd256 (v4df, v4df, v4df) +v8sf __builtin_ia32_vfmaddps256 (v8sf, v8sf, v8sf) +v4df __builtin_ia32_vfmsubpd256 (v4df, v4df, v4df) +v8sf __builtin_ia32_vfmsubps256 (v8sf, v8sf, v8sf) +v4df __builtin_ia32_vfnmaddpd256 (v4df, v4df, v4df) +v8sf __builtin_ia32_vfnmaddps256 (v8sf, v8sf, v8sf) +v4df __builtin_ia32_vfnmsubpd256 (v4df, v4df, v4df) +v8sf __builtin_ia32_vfnmsubps256 (v8sf, v8sf, v8sf) +v4df __builtin_ia32_vfmaddsubpd256 (v4df, v4df, v4df) +v8sf __builtin_ia32_vfmaddsubps256 (v8sf, v8sf, v8sf) +v4df __builtin_ia32_vfmsubaddpd256 (v4df, v4df, v4df) +v8sf __builtin_ia32_vfmsubaddps256 (v8sf, v8sf, v8sf) @end smallexample |