diff options
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/nds32/nds32.c | 10 | ||||
-rw-r--r-- | gcc/config/nds32/nds32.h | 13 |
3 files changed, 28 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index cff776f..f4fae58 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,13 @@ 2015-01-13 Chung-Ju Wu <jasonwucj@gmail.com> + * config/nds32/nds32.h (TARGET_CMODEL_SMALL): New macro. + (TARGET_CMODEL_MEDIUM): New macro. + (TARGET_CMODEL_LARGE): New macro. + * config/nds32/nds32.c (nds32_asm_file_start): Display corresponding + code model setting in assembly code. + +2015-01-13 Chung-Ju Wu <jasonwucj@gmail.com> + * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Remove MASK_GP_DIRECT flag. * config/nds32/nds32.h (MULTILIB_DEFAULTS): Have -mcmodel=medium as diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c index d2ffb61..91e797e 100644 --- a/gcc/config/nds32/nds32.c +++ b/gcc/config/nds32/nds32.c @@ -2157,6 +2157,13 @@ nds32_asm_file_start (void) if (TARGET_ISA_V3M) fprintf (asm_out_file, "\t! ISA family\t\t: %s\n", "V3M"); + if (TARGET_CMODEL_SMALL) + fprintf (asm_out_file, "\t! Code model\t\t: %s\n", "SMALL"); + if (TARGET_CMODEL_MEDIUM) + fprintf (asm_out_file, "\t! Code model\t\t: %s\n", "MEDIUM"); + if (TARGET_CMODEL_LARGE) + fprintf (asm_out_file, "\t! Code model\t\t: %s\n", "LARGE"); + fprintf (asm_out_file, "\t! Endian setting\t: %s\n", ((TARGET_BIG_ENDIAN) ? "big-endian" : "little-endian")); @@ -2178,9 +2185,6 @@ nds32_asm_file_start (void) fprintf (asm_out_file, "\t! 16-bit instructions\t: %s\n", ((TARGET_16_BIT) ? "Yes" : "No")); - fprintf (asm_out_file, "\t! GP base access\t: %s\n", - ((TARGET_GP_DIRECT) ? "Yes" - : "No")); fprintf (asm_out_file, "\t! Reduced registers set\t: %s\n", ((TARGET_REDUCED_REGS) ? "Yes" : "No")); diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h index d9a55ad..ac6cf42 100644 --- a/gcc/config/nds32/nds32.h +++ b/gcc/config/nds32/nds32.h @@ -344,6 +344,19 @@ enum nds32_builtins #define TARGET_ISA_V3 (nds32_arch_option == ARCH_V3) #define TARGET_ISA_V3M (nds32_arch_option == ARCH_V3M) +#define TARGET_CMODEL_SMALL \ + (nds32_cmodel_option == CMODEL_SMALL) +#define TARGET_CMODEL_MEDIUM \ + (nds32_cmodel_option == CMODEL_MEDIUM) +#define TARGET_CMODEL_LARGE \ + (nds32_cmodel_option == CMODEL_LARGE) + +/* When -mcmodel=small or -mcmodel=medium, + compiler may generate gp-base instruction directly. */ +#define TARGET_GP_DIRECT \ + (nds32_cmodel_option == CMODEL_SMALL\ + || nds32_cmodel_option == CMODEL_MEDIUM) + #define TARGET_SOFT_FLOAT 1 #define TARGET_HARD_FLOAT 0 |