diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 125 | ||||
| -rw-r--r-- | gcc/DATESTAMP | 2 | ||||
| -rw-r--r-- | gcc/m2/ChangeLog | 35 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 99 |
4 files changed, 260 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e5c55b2..1db75a1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,128 @@ +2023-10-11 Kito Cheng <kito.cheng@sifive.com> + + * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New. + +2023-10-11 Jeff Law <jlaw@ventanamicro.com> + + * config/riscv/riscv.md (jump): Adjust sequence to use a "jump" + pseudo op instead of a "call" pseudo op. + +2023-10-11 Kito Cheng <kito.cheng@sifive.com> + + * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext): + New. + (riscv_subset_list::parse_single_multiletter_ext): Ditto. + (riscv_subset_list::clone): Ditto. + (riscv_subset_list::parse_single_ext): Ditto. + (riscv_subset_list::set_loc): Ditto. + (riscv_set_arch_by_subset_list): Ditto. + * common/config/riscv/riscv-common.cc + (riscv_subset_list::parse_single_std_ext): New. + (riscv_subset_list::parse_single_multiletter_ext): Ditto. + (riscv_subset_list::clone): Ditto. + (riscv_subset_list::parse_single_ext): Ditto. + (riscv_subset_list::set_loc): Ditto. + (riscv_set_arch_by_subset_list): Ditto. + +2023-10-11 Kito Cheng <kito.cheng@sifive.com> + + * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting + from argument rather than get setting from global setting. + (riscv_override_options_internal): New, splited from + riscv_override_options, also take a gcc_options argument. + (riscv_option_override): Splited most part to + riscv_override_options_internal. + +2023-10-11 Kito Cheng <kito.cheng@sifive.com> + + * doc/options.texi (Mask): Document TARGET_<NAME>_P and + TARGET_<NAME>_OPTS_P. + (InverseMask): Ditto. + * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and + TARGET_<NAME>_OPTS_P macro. + (InverseMask): Ditto. + +2023-10-11 Andrew Pinski <pinskia@gmail.com> + + PR tree-optimization/111282 + * match.pd (`a & ~(a ^ b)`, `a & (a == b)`, + `a & ((~a) ^ b)`): New patterns. + +2023-10-11 Mary Bennett <mary.bennett@embecosm.com> + + * common/config/riscv/riscv-common.cc: Add the XCValu + extension. + * config/riscv/constraints.md: Add builtins for the XCValu + extension. + * config/riscv/predicates.md (immediate_register_operand): + Likewise. + * config/riscv/corev.def: Likewise. + * config/riscv/corev.md: Likewise. + * config/riscv/riscv-builtins.cc (AVAIL): Likewise. + (RISCV_ATYPE_UHI): Likewise. + * config/riscv/riscv-ftypes.def: Likewise. + * config/riscv/riscv.opt: Likewise. + * config/riscv/riscv.cc (riscv_print_operand): Likewise. + * doc/extend.texi: Add XCValu documentation. + * doc/sourcebuild.texi: Likewise. + +2023-10-11 Mary Bennett <mary.bennett@embecosm.com> + + * common/config/riscv/riscv-common.cc: Add XCVmac. + * config/riscv/riscv-ftypes.def: Add XCVmac builtins. + * config/riscv/riscv-builtins.cc: Likewise. + * config/riscv/riscv.md: Likewise. + * config/riscv/riscv.opt: Likewise. + * doc/extend.texi: Add XCVmac builtin documentation. + * doc/sourcebuild.texi: Likewise. + * config/riscv/corev.def: New file. + * config/riscv/corev.md: New file. + +2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/autovec.md: Fix index bug. + * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function. + * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug. + (gather_scatter_valid_offset_mode_p): New function. + +2023-10-11 Pan Li <pan2.li@intel.com> + + * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern + for lrint/lintf. + * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl + for expanding lint. + * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl + for vfcvt.x.f.v. + (expand_vec_lrint): New function impl for expanding lint. + * config/riscv/vector-iterators.md: New mode attr and iterator. + +2023-10-11 Richard Biener <rguenther@suse.de> + Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/111519 + * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse + argument and pass it through to recursive calls and + count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but + change stmt for gimple_assign_single_p statements for which we don't + immediately punt. + (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass + it through to recursive calls and count_nonzero_bytes calls. Don't + use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't + shadow the stmt argument. + +2023-10-11 Roger Sayle <roger@nextmovesoftware.com> + + PR middle-end/101955 + PR tree-optimization/106245 + * simplify-rtx.cc (simplify_relational_operation_1): Simplify + the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1). + +2023-10-11 liuhongt <hongtao.liu@intel.com> + + PR target/111745 + * config/i386/mmx.md (divv4hf3): Refine predicate of + operands[2] with register_operand. + 2023-10-10 Andrew Waterman <andrew@sifive.com> Philipp Tomsich <philipp.tomsich@vrull.eu> Jeff Law <jlaw@ventanamicro.com> diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 5a90a07..ed29cb2 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20231011 +20231012 diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog index 4116dd1..dc59819 100644 --- a/gcc/m2/ChangeLog +++ b/gcc/m2/ChangeLog @@ -1,3 +1,38 @@ +2023-10-11 Gaius Mulley <gaiusmod2@gmail.com> + + * gm2-compiler/M2GCCDeclare.mod (DeclareSubrange): Check + the base type of the subrange against the ZTYPE and call + DeclareSubrangeNarrow if necessary. + (DeclareSubrangeNarrow): New procedure function. + +2023-10-11 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/111675 + * gm2-compiler/M2CaseList.mod (appendTree): Replace + InitStringCharStar with InitString. + * gm2-compiler/M2GCCDeclare.mod: Import AreConstantsEqual. + (DeclareSubrange): Add zero alignment test and call + BuildSmallestTypeRange if necessary. + (WalkSubrangeDependants): Walk the align expression. + (IsSubrangeDependants): Test the align expression. + * gm2-compiler/M2Quads.mod (BuildStringAdrParam): Correct end name. + * gm2-compiler/P2SymBuild.mod (BuildTypeAlignment): Allow subranges + to be zero aligned (packed). + * gm2-compiler/SymbolTable.mod (Subrange): Add Align field. + (MakeSubrange): Set Align to NulSym. + (PutAlignment): Assign Subrange.Align to align. + (GetAlignment): Return Subrange.Align. + * gm2-gcc/m2expr.cc (noBitsRequired): Rewrite. + (calcNbits): Rename ... + (m2expr_calcNbits): ... to this and test for negative values. + (m2expr_BuildTBitSize): Replace calcNBits with m2expr_calcNbits. + * gm2-gcc/m2expr.def (calcNbits): Export. + * gm2-gcc/m2expr.h (m2expr_calcNbits): New prototype. + * gm2-gcc/m2type.cc (noBitsRequired): Remove. + (m2type_BuildSmallestTypeRange): Call m2expr_calcNbits. + (m2type_BuildSubrangeType): Create range_type from + build_range_type (type, lowval, highval). + 2023-09-29 Gaius Mulley <gaiusmod2@gmail.com> * gm2-compiler/M2Quads.mod (EndBuildFor): Improve diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fe7ae2a..f4e5983 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,102 @@ +2023-10-11 Andrew Pinski <pinskia@gmail.com> + + PR tree-optimization/111282 + * gcc.dg/tree-ssa/and-1.c: Update testcase to avoid + matching `~1 & (a ^ 1)` simplification. + * gcc.dg/tree-ssa/bitops-6.c: New test. + +2023-10-11 Mary Bennett <mary.bennett@embecosm.com> + + * lib/target-supports.exp: Add proc for the XCValu extension. + * gcc.target/riscv/cv-alu-compile.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-addn.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-addrn.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-addun.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-addurn.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-clip.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-clipu.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-subn.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-subrn.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-subun.c: New test. + * gcc.target/riscv/cv-alu-fail-compile-suburn.c: New test. + * gcc.target/riscv/cv-alu-fail-compile.c: New test. + +2023-10-11 Mary Bennett <mary.bennett@embecosm.com> + + * lib/target-supports.exp: Add new effective target check. + * gcc.target/riscv/cv-mac-compile.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mac.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-machhsn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-machhsrn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-machhun.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-machhurn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-macsn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-macsrn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-macun.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-macurn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-msu.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mulhhsn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mulhhsrn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mulhhun.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mulhhurn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mulsn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mulsrn.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mulun.c: New test. + * gcc.target/riscv/cv-mac-fail-compile-mulurn.c: New test. + * gcc.target/riscv/cv-mac-test-autogeneration.c: New test. + +2023-10-11 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/111675 + * gm2/extensions/run/pass/packedrecord3.mod: New test. + +2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * gcc.target/riscv/rvv/autovec/gather-scatter/offset_extend-1.c: New test. + +2023-10-11 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/unop/test-math.h: New define for + CVT like test case. + * gcc.target/riscv/rvv/autovec/vls/def.h: Ditto. + * gcc.target/riscv/rvv/autovec/unop/math-lrint-0.c: New test. + * gcc.target/riscv/rvv/autovec/unop/math-lrint-1.c: New test. + * gcc.target/riscv/rvv/autovec/unop/math-lrint-run-0.c: New test. + * gcc.target/riscv/rvv/autovec/unop/math-lrint-run-1.c: New test. + * gcc.target/riscv/rvv/autovec/vls/math-lrint-0.c: New test. + * gcc.target/riscv/rvv/autovec/vls/math-lrint-1.c: New test. + +2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * gcc.dg/tree-ssa/ssa-dom-cse-2.c: Remove riscv. + +2023-10-11 Richard Biener <rguenther@suse.de> + Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/111519 + * gcc.dg/torture/pr111519.c: New testcase. + +2023-10-11 Roger Sayle <roger@nextmovesoftware.com> + + * gcc.target/i386/pr106245-1.c: New test case. + +2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * lib/target-supports.exp: Add RVV. + +2023-10-11 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr111745.c: New test. + +2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * gcc.dg/vect/vect-live-2.c: Make pattern match more accurate. + +2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * gcc.dg/vect/vect-multitypes-16.c: Adapt check for RVV. + * lib/target-supports.exp: Add vect_ext_char_longlong property. + 2023-10-10 Jason Merrill <jason@redhat.com> PR c++/109422 |