diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/xtensa/xtensa.c | 4 | ||||
| -rw-r--r-- | gcc/config/xtensa/xtensa.h | 7 | ||||
| -rw-r--r-- | gcc/config/xtensa/xtensa.md | 6 | ||||
| -rw-r--r-- | gcc/config/xtensa/xtensa.opt | 6 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 10 |
6 files changed, 34 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0da7907..79ef713 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2008-03-14 Bob Wilson <bob.wilson@acm.org> + + * doc/invoke.texi (Option Summary, Xtensa Options): Document + -mserialize-volatile and -mno-serialize-volatile Xtensa options. + * config/xtensa/xtensa.c (print_operand): Do not emit MEMW instructions + unless TARGET_SERIALIZE_VOLATILE is enabled. + * config/xtensa/xtensa.md (*lsiu, *ssiu): Likewise. + * config/xtensa/xtensa.h (TARGET_DEFAULT): Add MASK_SERIALIZE_VOLATILE. + * config/xtensa/xtensa.opt (mserialize_volatile): New option. + 2008-03-14 Richard Guenther <rguenther@suse.de> PR tree-optimization/34172 diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c index 76cd5f4..2fb0d34 100644 --- a/gcc/config/xtensa/xtensa.c +++ b/gcc/config/xtensa/xtensa.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Tensilica's Xtensa architecture. - Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007 + Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. @@ -1991,7 +1991,7 @@ print_operand (FILE *file, rtx x, int letter) { /* For a volatile memory reference, emit a MEMW before the load or store. */ - if (MEM_VOLATILE_P (x)) + if (MEM_VOLATILE_P (x) && TARGET_SERIALIZE_VOLATILE) fprintf (file, "memw\n\t"); } else diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index 7e0e940..60fc785 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -1,5 +1,5 @@ /* Definitions of Tensilica's Xtensa target machine for GNU compiler. - Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007 + Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. @@ -74,8 +74,9 @@ extern unsigned xtensa_current_frame_size; #define TARGET_S32C1I XCHAL_HAVE_S32C1I #define TARGET_ABSOLUTE_LITERALS XSHAL_USE_ABSOLUTE_LITERALS -#define TARGET_DEFAULT ( \ - (XCHAL_HAVE_L32R ? 0 : MASK_CONST16)) +#define TARGET_DEFAULT \ + ((XCHAL_HAVE_L32R ? 0 : MASK_CONST16) | \ + MASK_SERIALIZE_VOLATILE) #define OVERRIDE_OPTIONS override_options () diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 3774a61..541eba3 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -1,5 +1,5 @@ ;; GCC machine description for Tensilica's Xtensa architecture. -;; Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007 +;; Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 ;; Free Software Foundation, Inc. ;; Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. @@ -928,7 +928,7 @@ (plus:SI (match_dup 1) (match_dup 2)))] "TARGET_HARD_FLOAT" { - if (volatile_refs_p (PATTERN (insn))) + if (TARGET_SERIALIZE_VOLATILE && volatile_refs_p (PATTERN (insn))) output_asm_insn ("memw", operands); return "lsiu\t%0, %1, %2"; } @@ -944,7 +944,7 @@ (plus:SI (match_dup 0) (match_dup 1)))] "TARGET_HARD_FLOAT" { - if (volatile_refs_p (PATTERN (insn))) + if (TARGET_SERIALIZE_VOLATILE && volatile_refs_p (PATTERN (insn))) output_asm_insn ("memw", operands); return "ssiu\t%2, %0, %1"; } diff --git a/gcc/config/xtensa/xtensa.opt b/gcc/config/xtensa/xtensa.opt index ef3a6af..0be75c4 100644 --- a/gcc/config/xtensa/xtensa.opt +++ b/gcc/config/xtensa/xtensa.opt @@ -1,6 +1,6 @@ ; Options for the Tensilica Xtensa port of the compiler. -; Copyright (C) 2005, 2007 Free Software Foundation, Inc. +; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc. ; ; This file is part of GCC. ; @@ -37,3 +37,7 @@ Automatically align branch targets to reduce branch penalties mtext-section-literals Target Intersperse literal pools with code in the text section + +mserialize-volatile +Target Report Mask(SERIALIZE_VOLATILE) +-mno-serialize-volatile Do not serialize volatile memory references with MEMW instructions diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index c56f890..27bf020 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -800,6 +800,7 @@ See i386 and x86-64 Options. @emph{Xtensa Options} @gccoptlist{-mconst16 -mno-const16 @gol -mfused-madd -mno-fused-madd @gol +-mserialize-volatile -mno-serialize-volatile @gol -mtext-section-literals -mno-text-section-literals @gol -mtarget-align -mno-target-align @gol -mlongcalls -mno-longcalls} @@ -14694,6 +14695,15 @@ add/subtract instructions also ensures that the program output is not sensitive to the compiler's ability to combine multiply and add/subtract operations. +@item -mserialize-volatile +@itemx -mno-serialize-volatile +@opindex mserialize-volatile +@opindex mno-serialize-volatile +When this option is enabled, GCC inserts @code{MEMW} instructions before +@code{volatile} memory references to guarantee sequential consistency. +The default is @option{-mserialize-volatile}. Use +@option{-mno-serialize-volatile} to omit the @code{MEMW} instructions. + @item -mtext-section-literals @itemx -mno-text-section-literals @opindex mtext-section-literals |