diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.opt | 14 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 17 |
3 files changed, 28 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 837f085..e3ebbd9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,13 @@ 2007-01-12 Nathan Sidwell <nathan@codesourcery.com> Richard Sandiford <richard@codesourcery.com> + * doc/invoke.texi: Document -mno-bitfield, -mno-rtd and -mno-short. + * config/m68k/m68k.opt: Resort options. + (mbitfield, mrtd, mshort): Remove RejectNegative properties. + +2007-01-12 Nathan Sidwell <nathan@codesourcery.com> + Richard Sandiford <richard@codesourcery.com> + * doc/invoke.texi: Document the macros that are defined by m68k's -mtune and -mhard-float options. * config/m68k/m68k-protos.h (m68k_cpp_cpu_ident) Declare. diff --git a/gcc/config/m68k/m68k.opt b/gcc/config/m68k/m68k.opt index af7bd0f..2dc2427 100644 --- a/gcc/config/m68k/m68k.opt +++ b/gcc/config/m68k/m68k.opt @@ -39,10 +39,6 @@ m5407 Target RejectNegative Generate code for a 5407 -mcfv4e -Target RejectNegative -Generate code for a ColdFire v4e - m68000 Target RejectNegative Generate code for a 68000 @@ -101,7 +97,7 @@ Target RejectNegative Joined Specify the name of the target architecture mbitfield -Target Report RejectNegative Mask(BITFIELD) +Target Report Mask(BITFIELD) Use the bit-field instructions mc68000 @@ -112,6 +108,10 @@ mc68020 Target RejectNegative Generate code for a 68020 +mcfv4e +Target RejectNegative +Generate code for a ColdFire v4e + mcpu= Target RejectNegative Joined Specify the target CPU @@ -149,7 +149,7 @@ Target Report Mask(PCREL) Generate pc-relative code mrtd -Target Report RejectNegative Mask(RTD) +Target Report Mask(RTD) Use different calling convention using 'rtd' msep-data @@ -161,7 +161,7 @@ Target RejectNegative Joined UInteger ID of shared library to build mshort -Target Report RejectNegative Mask(SHORT) +Target Report Mask(SHORT) Consider type 'int' to be 16 bits wide msoft-float diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a3b9c90..221551c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -583,9 +583,9 @@ Objective-C and Objective-C++ Dialects}. @gccoptlist{-march=@var{arch} -mcpu=@var{cpu} -mtune=@var{tune} -m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol -m68060 -mcpu32 -m5200 -m5206e -m528x -m5307 -m5407 @gol --mcfv4e -mbitfield -mc68000 -mc68020 @gol --mnobitfield -mrtd -mdiv -mno-div -mshort @gol --mhard-float -m68881 -msoft-float -mpcrel @gol +-mcfv4e -mbitfield -mno-bitfield -mc68000 -mc68020 @gol +-mnobitfield -mrtd -mno-rtd -mdiv -mno-div -mshort @gol +-mno-short -mhard-float -m68881 -msoft-float -mpcrel @gol -malign-int -mstrict-align -msep-data -mno-sep-data @gol -mshared-library-id=n -mid-shared-library -mno-id-shared-library} @@ -10510,8 +10510,14 @@ Consider type @code{int} to be 16 bits wide, like @code{short int}. Additionally, parameters passed on the stack are also aligned to a 16-bit boundary even on targets whose API mandates promotion to 32-bit. +@item -mno-short +@opindex -mno-short +Do not consider type @code{int} to be 16 bits wide. This is the default. + @item -mnobitfield +@itemx -mno-bitfield @opindex mnobitfield +@opindex mno-bitfield Do not use the bit-field instructions. The @option{-m68000}, @option{-mcpu32} and @option{-m5200} options imply @w{@option{-mnobitfield}}. @@ -10545,6 +10551,11 @@ harmlessly ignored.) The @code{rtd} instruction is supported by the 68010, 68020, 68030, 68040, 68060 and CPU32 processors, but not by the 68000 or 5200. +@item -mno-rtd +@opindex mno-rtd +Do not use the calling conventions selected by @option{-mrtd}. +This is the default. + @item -malign-int @itemx -mno-align-int @opindex malign-int |