diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 12 | ||||
| -rw-r--r-- | gcc/config/arm/arm.h | 6 | ||||
| -rw-r--r-- | gcc/config/avr/avr.h | 2 | ||||
| -rw-r--r-- | gcc/config/i386/i386.h | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 4 | ||||
| -rw-r--r-- | gcc/config/picochip/picochip.h | 2 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.h | 2 | ||||
| -rw-r--r-- | gcc/config/xtensa/xtensa.h | 4 | ||||
| -rw-r--r-- | gcc/doc/tm.texi | 11 | ||||
| -rw-r--r-- | gcc/ira-color.c | 2 | ||||
| -rw-r--r-- | gcc/ira.c | 6 | ||||
| -rw-r--r-- | gcc/system.h | 3 |
12 files changed, 44 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3b1a968..74b960b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2010-04-29 Bernd Schmidt <bernds@codesourcery.com> + + PR target/42895 + * doc/tm.texi (ADJUST_REG_ALLOC_ORDER): Renamed from + ORDER_REGS_FOR_LOCAL_ALLOC. All instances of this macro changed. + (HONOR_REG_ALLOC_ORDER): Describe new macro. + * ira.c (setup_alloc_regs): Use ADJUST_REG_ALLOC_ORDER if defined. + * ira-color.c (assign_hard_reg): Take prologue/epilogue costs into + account only if HONOR_REG_ALLOC_ORDER is not defined. + * config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Define. + * system.h (ORDER_REGS_FOR_LOCAL_ALLOC): Poison. + 2010-04-29 Jon Grant <04@jguk.org> * collect2.c (vflag): Change type from int to bool. diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index ca430e9..ca46db1 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1121,7 +1121,11 @@ extern int arm_structure_size_boundary; } /* Use different register alloc ordering for Thumb. */ -#define ORDER_REGS_FOR_LOCAL_ALLOC arm_order_regs_for_local_alloc () +#define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc () + +/* Tell IRA to use the order we define rather than messing it up with its + own cost calculations. */ +#define HONOR_REG_ALLOC_ORDER /* Interrupt functions can only use registers that have already been saved by the prologue, even if they would normally be diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h index 522f00f..67e0c8f 100644 --- a/gcc/config/avr/avr.h +++ b/gcc/config/avr/avr.h @@ -232,7 +232,7 @@ extern GTY(()) section *progmem_section; 32,33,34,35 \ } -#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc () +#define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc () #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 163cda1..9be3eb8 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -955,7 +955,7 @@ enum target_cpu_default registers listed in CALL_USED_REGISTERS, keeping the others available for storage of persistent values. - The ORDER_REGS_FOR_LOCAL_ALLOC actually overwrite the order, + The ADJUST_REG_ALLOC_ORDER actually overwrite the order, so this is just empty initializer for array. */ #define REG_ALLOC_ORDER \ @@ -964,11 +964,11 @@ enum target_cpu_default 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52 } -/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order +/* ADJUST_REG_ALLOC_ORDER is a macro which permits reg_alloc_order to be rearranged based on a particular function. When using sse math, we want to allocate SSE before x87 registers and vice versa. */ -#define ORDER_REGS_FOR_LOCAL_ALLOC x86_order_regs_for_local_alloc () +#define ADJUST_REG_ALLOC_ORDER x86_order_regs_for_local_alloc () #define OVERRIDE_ABI_FORMAT(FNDECL) ix86_call_abi_override (FNDECL) diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 2829708..f5f0bd4 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2059,12 +2059,12 @@ enum reg_class 182,183,184,185,186,187 \ } -/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order +/* ADJUST_REG_ALLOC_ORDER is a macro which permits reg_alloc_order to be rearranged based on a particular function. On the mips16, we want to allocate $24 (T_REG) before other registers for instructions for which it is possible. */ -#define ORDER_REGS_FOR_LOCAL_ALLOC mips_order_regs_for_local_alloc () +#define ADJUST_REG_ALLOC_ORDER mips_order_regs_for_local_alloc () /* True if VALUE is an unsigned 6-bit number. */ diff --git a/gcc/config/picochip/picochip.h b/gcc/config/picochip/picochip.h index 4d0c962..bf2ecc0 100644 --- a/gcc/config/picochip/picochip.h +++ b/gcc/config/picochip/picochip.h @@ -261,7 +261,7 @@ extern enum picochip_dfa_type picochip_schedule_type; /* We can dynamically change the REG_ALLOC_ORDER using the following hook. It would be desirable to change it for leaf functions so we can put r12 at the end of this list.*/ -#define ORDER_REGS_FOR_LOCAL_ALLOC picochip_order_regs_for_local_alloc () +#define ADJUST_REG_ALLOC_ORDER picochip_order_regs_for_local_alloc () /* How Values Fit in Registers */ diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index b4b43c0..bd9daa5 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1181,7 +1181,7 @@ extern enum reg_class sparc_regno_reg_class[FIRST_PSEUDO_REGISTER]; 96, 97, 98, 99, /* %fcc0-3 */ \ 100, 0, 14, 30, 31, 101} /* %icc, %g0, %o6, %i6, %i7, %sfp */ -#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc () +#define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc () extern char sparc_leaf_regs[]; #define LEAF_REGISTERS sparc_leaf_regs diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index b9d896a..d7cab5a 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -286,7 +286,7 @@ extern unsigned xtensa_current_frame_size; incoming argument in a2 is live throughout the function and local-alloc decides to use a2, then the incoming argument must either be spilled or copied to another register. To get around - this, we define ORDER_REGS_FOR_LOCAL_ALLOC to redefine + this, we define ADJUST_REG_ALLOC_ORDER to redefine reg_alloc_order for leaf functions such that lowest numbered registers are used first with the exception that the incoming argument registers are not used until after other register choices @@ -300,7 +300,7 @@ extern unsigned xtensa_current_frame_size; 35, \ } -#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc () +#define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc () /* For Xtensa, the only point of this is to prevent GCC from otherwise giving preference to call-used registers. To minimize window diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 51172e4..6582ab1 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -2092,7 +2092,7 @@ machines, define @code{REG_ALLOC_ORDER} to be an initializer that lists the highest numbered allocable register first. @end defmac -@defmac ORDER_REGS_FOR_LOCAL_ALLOC +@defmac ADJUST_REG_ALLOC_ORDER A C statement (sans semicolon) to choose the order in which to allocate hard registers for pseudo-registers local to a basic block. @@ -2106,6 +2106,15 @@ The macro body should not assume anything about the contents of On most machines, it is not necessary to define this macro. @end defmac +@defmac HONOR_REG_ALLOC_ORDER +Normally, IRA tries to estimate the costs for saving a register in the +prologue and restoring it in the epilogue. This discourages it from +using call-saved registers. If a machine wants to ensure that IRA +allocates registers in the order given by REG_ALLOC_ORDER even if some +call-saved registers appear earlier than call-used ones, this macro +should be defined. +@end defmac + @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno}) In some case register allocation order is not enough for the Integrated Register Allocator (@acronym{IRA}) to generate a good code. diff --git a/gcc/ira-color.c b/gcc/ira-color.c index e01a6ab..47aacfe 100644 --- a/gcc/ira-color.c +++ b/gcc/ira-color.c @@ -586,6 +586,7 @@ assign_hard_reg (ira_allocno_t allocno, bool retry_p) continue; cost = costs[i]; full_cost = full_costs[i]; +#ifndef HONOR_REG_ALLOC_ORDER if (! allocated_hardreg_p[hard_regno] && ira_hard_reg_not_in_set_p (hard_regno, mode, call_used_reg_set)) /* We need to save/restore the hard register in @@ -598,6 +599,7 @@ assign_hard_reg (ira_allocno_t allocno, bool retry_p) cost += add_cost; full_cost += add_cost; } +#endif if (min_cost > cost) min_cost = cost; if (min_full_cost > full_cost) @@ -431,9 +431,6 @@ setup_class_hard_regs (void) HARD_REG_SET processed_hard_reg_set; ira_assert (SHRT_MAX >= FIRST_PSEUDO_REGISTER); - /* We could call ORDER_REGS_FOR_LOCAL_ALLOC here (it is usually - putting hard callee-used hard registers first). But our - heuristics work better. */ for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) { COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]); @@ -490,6 +487,9 @@ setup_available_class_regs (void) static void setup_alloc_regs (bool use_hard_frame_p) { +#ifdef ADJUST_REG_ALLOC_ORDER + ADJUST_REG_ALLOC_ORDER; +#endif COPY_HARD_REG_SET (no_unit_alloc_regs, fixed_reg_set); if (! use_hard_frame_p) SET_HARD_REG_BIT (no_unit_alloc_regs, HARD_FRAME_POINTER_REGNUM); diff --git a/gcc/system.h b/gcc/system.h index 3f7732f..e764e58 100644 --- a/gcc/system.h +++ b/gcc/system.h @@ -761,7 +761,8 @@ extern void fancy_abort (const char *, int, const char *) ATTRIBUTE_NORETURN; TARGET_ASM_EXCEPTION_SECTION TARGET_ASM_EH_FRAME_SECTION \ SMALL_ARG_MAX ASM_OUTPUT_SHARED_BSS ASM_OUTPUT_SHARED_COMMON \ ASM_OUTPUT_SHARED_LOCAL ASM_MAKE_LABEL_LINKONCE \ - STACK_CHECK_PROBE_INTERVAL STACK_CHECK_PROBE_LOAD + STACK_CHECK_PROBE_INTERVAL STACK_CHECK_PROBE_LOAD \ + ORDER_REGS_FOR_LOCAL_ALLOC /* Hooks that are no longer used. */ #pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE \ |