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-rw-r--r--gcc/config/i386/i386-expand.cc3
-rw-r--r--gcc/testsuite/gcc.target/i386/sse4-pr112681.c11
2 files changed, 13 insertions, 1 deletions
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index fe56d2f..4bd7d4f 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -2453,7 +2453,8 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label)
/* Generate XOR since we can't check that one operand is zero
vector. */
tmp = gen_reg_rtx (mode);
- emit_insn (gen_rtx_SET (tmp, gen_rtx_XOR (mode, op0, op1)));
+ rtx ops[3] = { tmp, op0, op1 };
+ ix86_expand_vector_logical_operator (XOR, mode, ops);
tmp = gen_lowpart (p_mode, tmp);
emit_insn (gen_rtx_SET (gen_rtx_REG (CCZmode, FLAGS_REG),
gen_rtx_UNSPEC (CCZmode,
diff --git a/gcc/testsuite/gcc.target/i386/sse4-pr112681.c b/gcc/testsuite/gcc.target/i386/sse4-pr112681.c
new file mode 100644
index 0000000..6c91087
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse4-pr112681.c
@@ -0,0 +1,11 @@
+/* PR target/112681 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse4 -mno-avx" } */
+
+struct S { void *c; char d[16]; } a, b;
+
+int
+foo (void)
+{
+ return __builtin_memcmp (a.d, b.d, sizeof (a.d)) != 0;
+}